Patents by Inventor Toshiya Yonehara

Toshiya Yonehara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11894452
    Abstract: A semiconductor device according to an embodiment includes a nitride semiconductor layer; an insulating layer; a first region disposed between the nitride semiconductor layer and the insulating layer and containing at least one element of hydrogen and deuterium; and a second region disposed in the nitride semiconductor layer, adjacent to the first region, and containing fluorine.
    Type: Grant
    Filed: December 8, 2021
    Date of Patent: February 6, 2024
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tatsuo Shimizu, Masahiko Kuraguchi, Toshiya Yonehara, Akira Mukai
  • Publication number: 20220102544
    Abstract: A semiconductor device according to an embodiment includes a nitride semiconductor layer; an insulating layer; a first region disposed between the nitride semiconductor layer and the insulating layer and containing at least one element of hydrogen and deuterium; and a second region disposed in the nitride semiconductor layer, adjacent to the first region, and containing fluorine.
    Type: Application
    Filed: December 8, 2021
    Publication date: March 31, 2022
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Tatsuo SHIMIZU, Masahiko KURAGUCHI, Toshiya YONEHARA, Akira MUKAI
  • Patent number: 11227942
    Abstract: A semiconductor device according to an embodiment includes a nitride semiconductor layer; an insulating layer; a first region disposed between the nitride semiconductor layer and the insulating layer and containing at least one element of hydrogen and deuterium; and a second region disposed in the nitride semiconductor layer, adjacent to the first region, and containing fluorine.
    Type: Grant
    Filed: August 24, 2018
    Date of Patent: January 18, 2022
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tatsuo Shimizu, Masahiko Kuraguchi, Toshiya Yonehara, Akira Mukai
  • Publication number: 20210356755
    Abstract: A diffractive optical element includes a unit structure periodically arranged in a first direction and configured to diffract incident light in the first direction. The diffractive optical element has a phase pattern designed such that an angular separation between an outermost diffracted light beam and a second-outermost diffracted light beam along the first direction is smaller than the divergence angle of the incident light.
    Type: Application
    Filed: July 29, 2021
    Publication date: November 18, 2021
    Applicant: AGC Inc.
    Inventors: Toshiya YONEHARA, Ryota MURAKAMI, Koichi TASHIMA, Kensuke ONO
  • Patent number: 10916646
    Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, first and second semiconductor regions, and a first insulating film. The first semiconductor region includes a first partial region, a second partial region, a third partial region between the first and second partial regions, a fourth partial region between the first and third partial regions, and a fifth partial region between the third and second partial regions. The second semiconductor region includes a sixth partial region and a seventh partial region. The third electrode overlaps the sixth and seventh partial regions. The first insulating film includes a portion provided between the third electrode and the third partial region, between the third electrode and the fourth partial region, between the third electrode and the fifth partial region, between the third electrode and the sixth partial region, and between the third electrode and the seventh partial region.
    Type: Grant
    Filed: March 11, 2019
    Date of Patent: February 9, 2021
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Daimotsu Kato, Toshiya Yonehara, Hiroshi Ono, Yosuke Kajiwara, Masahiko Kuraguchi, Tatsuo Shimizu
  • Patent number: 10879415
    Abstract: A photodetector includes a first semiconductor layer and a second semiconductor layer provided on the first semiconductor layer and detecting light. The first semiconductor layer has a cavity portion for reflecting incident light.
    Type: Grant
    Filed: February 1, 2019
    Date of Patent: December 29, 2020
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Honam Kwon, Toshiya Yonehara, Hitoshi Yagi, Ikuo Fujiwara, Kazuhiro Suzuki
  • Patent number: 10600900
    Abstract: In one embodiment, a semiconductor device is provided with a semiconductor layer made of a nitride semiconductor, a first gate electrode, a first structure body between the first gate electrode and the semiconductor layer, and a first insulating layer between the semiconductor layer and the first structure body. The first structure body has a first intermediate layer made of a conductor to suppress generation of charges at respective interfaces with adjacent layers, a first layer having dielectric property between the first gate electrode and the first intermediate layer, and a second layer having dielectric property between the first gate electrode and the first layer, and has dipoles at an interface between the first layer and the second layer.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: March 24, 2020
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshiya Yonehara, Tatsuo Shimizu, Hiroshi Ono, Daimotsu Kato
  • Patent number: 10600930
    Abstract: A photodetector according to an embodiment includes: a first semiconductor layer; a porous semiconductor layer disposed on the first semiconductor layer; and at least one photo-sensing element including a second semiconductor layer of a first conductivity type disposed in a region of the porous semiconductor layer and a third semiconductor layer of a second conductivity type disposed on the second semiconductor layer.
    Type: Grant
    Filed: December 20, 2016
    Date of Patent: March 24, 2020
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kazuhiro Suzuki, Risako Ueno, Hiroto Honda, Koichi Ishii, Toshiya Yonehara, Hideyuki Funaki
  • Patent number: 10566451
    Abstract: A semiconductor device according to an embodiment includes a first nitride semiconductor layer; a second nitride semiconductor layer located on the first nitride semiconductor layer, a first and second electrode located on or above the first nitride semiconductor layer; a trench located in the second nitride semiconductor layer between the first electrode and the second electrode, and including a bottom surface and a side surface, the bottom surface being located in one of the first nitride semiconductor layer and the second nitride semiconductor layer; a gate electrode located in the trench; a gate insulating layer located between the bottom surface and the gate electrode and between the side surface and the gate electrode; and a region located in at least one of the first nitride semiconductor layer and the second nitride semiconductor layer, including a first portion adjacent to the bottom surface, and containing fluorine.
    Type: Grant
    Filed: August 24, 2018
    Date of Patent: February 18, 2020
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tatsuo Shimizu, Toshiya Yonehara, Akira Mukai
  • Patent number: 10535744
    Abstract: A semiconductor device according to an embodiment includes a first nitride semiconductor layer; a second nitride semiconductor layer on the first nitride semiconductor layer; a first electrode and a second electrode disposed on or above the first nitride semiconductor layer; a gate electrode above the first nitride semiconductor layer; and a gate insulating layer, the gate insulating layer including a silicon oxide film and an aluminum oxynitride film, the aluminum oxynitride film disposed between the first nitride semiconductor layer and the silicon oxide film, a first atomic ratio of nitrogen relative to a sum of oxygen and nitrogen at a first position in the aluminum oxynitride film being higher than a second atomic ratio of nitrogen relative to a sum of oxygen and nitrogen at a second position in the aluminum oxynitride film, and the second position being closer to the silicon oxide film than the first position.
    Type: Grant
    Filed: February 13, 2019
    Date of Patent: January 14, 2020
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tatsuo Shimizu, Toshiya Yonehara, Hiroshi Ono, Daimotsu Kato, Akira Mukai
  • Publication number: 20190386127
    Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, first and second semiconductor regions, and a first insulating film. The first semiconductor region includes a first partial region, a second partial region, a third partial region between the first and second partial regions, a fourth partial region between the first and third partial regions, and a fifth partial region between the third and second partial regions. The second semiconductor region includes a sixth partial region and a seventh partial region. The third electrode overlaps the sixth and seventh partial regions. The first insulating film includes a portion provided between the third electrode and the third partial region, between the third electrode and the fourth partial region, between the third electrode and the fifth partial region, between the third electrode and the sixth partial region, and between the third electrode and the seventh partial region.
    Type: Application
    Filed: March 11, 2019
    Publication date: December 19, 2019
    Applicants: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Daimotsu KATO, Toshiya Yonehara, Hiroshi Ono, Yosuke Kajiwara, Masahiko Kuraguchi, Tatsuo Shimizu
  • Patent number: 10497572
    Abstract: A method for manufacturing a semiconductor device according to an embodiment includes: forming an insulating layer having a first plane in contact with a nitride semiconductor layer and a second plane opposite to the first plane and containing at least one of an oxide and an oxynitride; and performing first heat treatment at 600° C. or more and 1100° C. or less in a state where a voltage making a first plane side positive relative to a second plane side is applied to the insulating layer.
    Type: Grant
    Filed: August 20, 2018
    Date of Patent: December 3, 2019
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tatsuo Shimizu, Yasutaka Nishida, Toshiya Yonehara
  • Publication number: 20190280112
    Abstract: A semiconductor device according to an embodiment includes a nitride semiconductor layer; an insulating layer; a first region disposed between the nitride semiconductor layer and the insulating layer and containing at least one element of hydrogen and deuterium; and a second region disposed in the nitride semiconductor layer, adjacent to the first region, and containing fluorine.
    Type: Application
    Filed: August 24, 2018
    Publication date: September 12, 2019
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Tatsuo Shimizu, Masahiko Kuraguchi, Toshiya Yonehara, Akira Mukai
  • Publication number: 20190280111
    Abstract: A semiconductor device according to an embodiment includes a first nitride semiconductor layer; a second nitride semiconductor layer located on the first nitride semiconductor layer, a first and second electrode located on or above the first nitride semiconductor layer; a trench located in the second nitride semiconductor layer between the first electrode and the second electrode, and including a bottom surface and a side surface, the bottom surface being located in one of the first nitride semiconductor layer and the second nitride semiconductor layer; a gate electrode located in the trench; a gate insulating layer located between the bottom surface and the gate electrode and between the side surface and the gate electrode; and a region located in at least one of the first nitride semiconductor layer and the second nitride semiconductor layer, including a first portion adjacent to the bottom surface, and containing fluorine.
    Type: Application
    Filed: August 24, 2018
    Publication date: September 12, 2019
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Tatsuo SHIMIZU, Toshiya YONEHARA, Akira MUKAI
  • Publication number: 20190259620
    Abstract: A method for manufacturing a semiconductor device according to an embodiment includes: forming an insulating layer having a first plane in contact with a nitride semiconductor layer and a second plane opposite to the first plane and containing at least one of an oxide and an oxynitride; and performing first heat treatment at 600° C. or more and 1100° C. or less in a state where a voltage making a first plane side positive relative to a second plane side is applied to the insulating layer.
    Type: Application
    Filed: August 20, 2018
    Publication date: August 22, 2019
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Tatsuo Shimizu, Yasutaka Nishida, Toshiya Yonehara
  • Patent number: 10347734
    Abstract: A semiconductor device includes a nitride semiconductor layer, a first electrode and second electrode on the nitride semiconductor layer, a gate electrode, and a gate insulating layer between the nitride semiconductor layer and the gate electrode. The gate insulating layer has a first oxide region containing at least any one element of aluminum and boron, gallium, and silicon. When a distance between the first end portion and the second end portion of the first oxide region is defined as d1, and a position separated by d1/10 from the first end portion toward the second end portion is defined as a first position, an atomic concentration of gallium at the first position is 80% or more and 120% or less of that of the at least any one element.
    Type: Grant
    Filed: February 6, 2018
    Date of Patent: July 9, 2019
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tatsuo Shimizu, Hisashi Saito, Hiroshi Ono, Toshiya Yonehara
  • Publication number: 20190189758
    Abstract: A semiconductor device according to an embodiment includes a first nitride semiconductor layer; a second nitride semiconductor layer on the first nitride semiconductor layer; a first electrode and a second electrode disposed on or above the first nitride semiconductor layer; a gate electrode above the first nitride semiconductor layer; and a gate insulating layer, the gate insulating layer including a silicon oxide film and an aluminum oxynitride film, the aluminum oxynitride film disposed between the first nitride semiconductor layer and the silicon oxide film, a first atomic ratio of nitrogen relative to a sum of oxygen and nitrogen at a first position in the aluminum oxynitride film being higher than a second atomic ratio of nitrogen relative to a sum of oxygen and nitrogen at a second position in the aluminum oxynitride film, and the second position being closer to the silicon oxide film than the first position.
    Type: Application
    Filed: February 13, 2019
    Publication date: June 20, 2019
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Tatsuo SHIMIZU, Toshiya YONEHARA, Hiroshi ONO, Daimotsu KATO, Akira MUKAI
  • Publication number: 20190165198
    Abstract: A photodetector includes a first semiconductor layer and a second semiconductor layer provided on the first semiconductor layer and detecting light. The first semiconductor layer has a cavity portion for reflecting incident light.
    Type: Application
    Filed: February 1, 2019
    Publication date: May 30, 2019
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Honam KWON, Toshiya YONEHARA, Hitoshi YAGI, Ikuo FUJIWARA, Kazuhiro SUZUKI
  • Publication number: 20190115461
    Abstract: In one embodiment, a semiconductor device is provided with a semiconductor layer made of a nitride semiconductor, a first gate electrode, a first structure body between the first gate electrode and the semiconductor layer, and a first insulating layer between the semiconductor layer and the first structure body. The first structure body has a first intermediate layer made of a conductor to suppress generation of charges at respective interfaces with adjacent layers, a first layer having dielectric property between the first gate electrode and the first intermediate layer, and a second layer having dielectric property between the first gate electrode and the first layer, and has dipoles at an interface between the first layer and the second layer.
    Type: Application
    Filed: August 31, 2018
    Publication date: April 18, 2019
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Toshiya Yonehara, Tatsuo Shimizu, Hiroshi Ono, Daimotsu Kato
  • Patent number: 10256308
    Abstract: A semiconductor device according to an embodiment includes a first nitride semiconductor layer; a second nitride semiconductor layer on the first nitride semiconductor layer; a first electrode and a second electrode disposed on or above the first nitride semiconductor layer; a gate electrode above the first nitride semiconductor layer; and a gate insulating layer, the gate insulating layer including a silicon oxide film and an aluminum oxynitride film, the aluminum oxynitride film disposed between the first nitride semiconductor layer and the silicon oxide film, a first atomic ratio of nitrogen relative to a sum of oxygen and nitrogen at a first position in the aluminum oxynitride film being higher than a second atomic ratio of nitrogen relative to a sum of oxygen and nitrogen at a second position in the aluminum oxynitride film, and the second position being closer to the silicon oxide film than the first position.
    Type: Grant
    Filed: February 27, 2018
    Date of Patent: April 9, 2019
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tatsuo Shimizu, Toshiya Yonehara, Hiroshi Ono, Daimotsu Kato, Akira Mukai