Patents by Inventor Toshiyuki Morita

Toshiyuki Morita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11580156
    Abstract: A workpiece image search apparatus includes: a workpiece image deformation unit that generates a third workpiece image by deforming a second workpiece image so that a difference in workpiece shape between a first workpiece image and the second workpiece image becomes smaller, wherein the first workpiece image is obtained by projecting a first workpiece shape of a first workpiece on a two-dimensional plane, and the second workpiece image is obtained by projecting a second workpiece shape of a second workpiece on a two-dimensional plane; and a similarity calculation unit that calculates a similarity between the first workpiece shape and the second workpiece shape by comparing the third workpiece image with the first workpiece image.
    Type: Grant
    Filed: November 28, 2019
    Date of Patent: February 14, 2023
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Hiroyuki Kinoshita, Ryosuke Kawanishi, Toshiyuki Morita
  • Publication number: 20220350835
    Abstract: A workpiece image search apparatus includes: a workpiece image deformation unit that generates a third workpiece image by deforming a second workpiece image so that a difference in workpiece shape between a first workpiece image and the second workpiece image becomes smaller, wherein the first workpiece image is obtained by projecting a first workpiece shape of a first workpiece on a two-dimensional plane, and the second workpiece image is obtained by projecting a second workpiece shape of a second workpiece on a two-dimensional plane; and a similarity calculation unit that calculates a similarity between the first workpiece shape and the second workpiece shape by comparing the third workpiece image with the first workpiece image.
    Type: Application
    Filed: November 28, 2019
    Publication date: November 3, 2022
    Applicant: Mitsubishi Electric Corporation
    Inventors: Hiroyuki KINOSHITA, Ryosuke KAWANISHI, Toshiyuki MORITA
  • Patent number: 11404377
    Abstract: A semiconductor device according to an embodiment includes: a semiconductor substrate having a diffusion region including an impurity; and a contact provided on the diffusion region. The contact includes a metal film, a barrier metal film covering the metal film, and a conductive film provided between the barrier metal film and the diffusion region and including a conductive material having a higher heat of formation than a heat of formation of the barrier metal film.
    Type: Grant
    Filed: September 14, 2020
    Date of Patent: August 2, 2022
    Assignee: Kioxia Corporation
    Inventor: Toshiyuki Morita
  • Publication number: 20210280526
    Abstract: A semiconductor device according to an embodiment includes: a semiconductor substrate having a diffusion region including an impurity; and a contact provided on the diffusion region. The contact includes a metal film, a barrier metal film covering the metal film, and a conductive film provided between the barrier metal film and the diffusion region and including a conductive material having a higher heat of formation than a heat of formation of the barrier metal film.
    Type: Application
    Filed: September 14, 2020
    Publication date: September 9, 2021
    Applicant: Kioxia Corporation
    Inventor: Toshiyuki MORITA
  • Patent number: 10767252
    Abstract: The present invention provides a carburized part which is formed by processing a steel into a shape of a part and performing a carburizing treatment on the steel, the steel having a composition consisting essentially of, in terms of % by mass: 0.10% to 0.40% of C; 0.05% to 2.00% of Si; 0.30% to 2.00% of Mn; 0.30% to 3.00% of Cr; 0.025% or less of N; and as a pinning particle forming element which forms a pinning particle by nitrification, one or two or more elements selected from: 0.020% to 0.100% of Al; 0.01% to 0.20% of Nb; and 0.005% to 0.20% of Ti, and optionally: 0.80% or less of Mo, with the remainder being Fe and inevitable impurities, in which a crystal grain size number of a surface layer of the part at a depth of 50 ?m or less from a surface is greater than 5, and the crystal grain size number of an inner portion of the part at a depth of 3 mm or more from the surface is 5 or less.
    Type: Grant
    Filed: June 3, 2014
    Date of Patent: September 8, 2020
    Assignee: DAIDO STEEL CO., LTD.
    Inventors: Tomohiro Andoh, Naoki Umemori, Toshiyuki Morita, Yasushi Matsumura
  • Patent number: 10689721
    Abstract: The present invention provides a case hardening steel which satisfies the following expression (1) representing a relationship between a maximum deformation resistance ?MAX (MPa) and a DI value, the maximum deformation resistance ?MAX (MPa) being obtained when a test piece which has a size of ? 15×22.5 mm and is cut out from a material after spheroidizing, is subjected to compressive deformation by cold forging at a compression ratio of 70% in a state that an end surface thereof is restrained, and the DI value being obtained from a Jominy quenching test: ?MAX<12.8×DI+745 . . . Expression (1). Additionally, the present invention obtains a carburized part by subjecting the case hardening steel to carburizing and quenching.
    Type: Grant
    Filed: January 23, 2015
    Date of Patent: June 23, 2020
    Assignee: DAIDO STEEL CO., LTD.
    Inventors: Kyohei Nakayama, Toshiyuki Morita, Keisuke Inoue
  • Patent number: 10438892
    Abstract: A semiconductor device according to present embodiment has first wirings provided in a first area and made of a first metal. A first gap is provided between the first wirings adjacent to each other. Second wirings or contact plugs are provided in a second area in which the first wirings are not provided. The second wirings or contact plugs are made of a second metal. A first insulation film is provided between the second wirings or contact plugs adjacent to each other. The first insulation film has second gaps. A second insulation film is provided on the first wirings, the first gap, and the second gaps.
    Type: Grant
    Filed: September 12, 2017
    Date of Patent: October 8, 2019
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Toshiyuki Morita
  • Patent number: 10428414
    Abstract: The present invention provides a carburized part having a total amount of TiC, AlN and ZrC, which are precipitate particles, of 4.5×10?10 mole or less per 1 mm2 of grain boundary area of prior austenite grains after carburization. According to the present invention, it is possible to provide a carburized part which allows effective inhibition of abnormal grain growth in spite of a carburizing treatment and makes it possible to solve the problem of reduction in properties caused by abnormal grain growth.
    Type: Grant
    Filed: June 24, 2014
    Date of Patent: October 1, 2019
    Assignee: DAIDO STEEL CO., LTD.
    Inventors: Kyohei Nakayama, Yasuaki Sakai, Toshiyuki Morita, Keisuke Inoue
  • Patent number: 10287668
    Abstract: Provided is a case hardening steel which allows effective inhibition of abnormal grain growth during carburizing treatment or the like and makes it possible to solve the problem of abnormal grain growth-induced reduction in characteristics. In the case hardening steel, a total amount of TiC, ZrC and AlN which are precipitate particles contained in 100 g of a steel material after subjecting the case hardening steel to hot rolling is 3.5×10?4 mole or less.
    Type: Grant
    Filed: June 23, 2014
    Date of Patent: May 14, 2019
    Assignee: DAIDO STEEL CO., LTD.
    Inventors: Kyohei Nakayama, Yasuaki Sakai, Toshiyuki Morita, Keisuke Inoue
  • Publication number: 20180218982
    Abstract: A semiconductor device according to present embodiment has first wirings provided in a first area and made of a first metal. A first gap is provided between the first wirings adjacent to each other. Second wirings or contact plugs are provided in a second area in which the first wirings are not provided. The second wirings or contact plugs are made of a second metal. A first insulation film is provided between the second wirings or contact plugs adjacent to each other. The first insulation film has second gaps. A second insulation film is provided on the first wirings, the first gap, and the second gaps.
    Type: Application
    Filed: September 12, 2017
    Publication date: August 2, 2018
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventor: Toshiyuki MORITA
  • Publication number: 20180210420
    Abstract: A display device and a display method to enable, by reducing the amount of data to be displayed, reduction of the time required for display even when the data to be dealt with is three-dimensional coordinate data are obtained. A display device according to the invention includes a tool-movement-path calculation means 14 to calculate, on the basis of data of a machining program on which movement commands for a tool in a three-dimensional coordinate system are written, tool movement paths through which the tool moves in the three-dimensional coordinate system, a path-replacement-processing unit 19 to replace, on the basis of the tool movement paths calculated by the tool-movement-path calculation means 14 and a predetermined index, consecutive tool movement paths with a replacement path, and a display unit 20 to display the replacement path replaced by the path-replacement-processing unit 19.
    Type: Application
    Filed: July 23, 2014
    Publication date: July 26, 2018
    Applicant: Mitsubishi Electric Corporation
    Inventors: Hiroki KANEKO, Susumu MATSUBARA, Kenji IRIGUCHI, Nobuyuki TAKAHASHI, Toshiyuki MORITA
  • Publication number: 20170018431
    Abstract: A semiconductor manufacturing apparatus according to an embodiment includes a container that stores a processing liquid for plating processing of a substrate. A holder can hold the substrate. A cooler cools the substrate to a temperature lower than a temperature of the processing liquid before the holder immerses the substrate in the processing liquid in the container.
    Type: Application
    Filed: February 12, 2016
    Publication date: January 19, 2017
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Toshiyuki MORITA, Hiroshi TOYODA
  • Patent number: 9514977
    Abstract: A semiconductor device according to the present embodiment includes a first wiring part located above a substrate and made of a first metal material. A second wiring part is provided as being superimposed on the first wiring part and having a width substantially equal to that of the first wiring part. A first resistivity of the first wiring part is lower than a second resistivity of the second wiring part when the first and second wiring parts have a first width. The second resistivity is lower than the first resistivity when the first and second wiring parts have a second width larger than the first width. The semiconductor device includes both of an area in which the first and second wiring parts have the first width and an area in which the first and second wiring parts have the second width.
    Type: Grant
    Filed: March 7, 2014
    Date of Patent: December 6, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshiyuki Morita, Seiichi Omoto, Kazuaki Nakajima, Hiroshi Toyoda
  • Publication number: 20160333432
    Abstract: The present invention provides a case hardening steel which satisfies the following expression (1) representing a relationship between a maximum deformation resistance ?MAX (MPa) and a DI value, the maximum deformation resistance ?MAX (MPa) being obtained when a test piece which has a size of ?15×22.5 mm and is cut out from a material after spheroidizing, is subjected to compressive deformation by cold forging at a compression ratio of 70% in a state that an end surface thereof is restrained, and the DI value being obtained from a Jominy quenching test: ?MAX<12.8×DI+745 . . . Expression (1). Additionally, the present invention obtains a carburized part by subjecting the case hardening steel to carburizing and quenching.
    Type: Application
    Filed: January 23, 2015
    Publication date: November 17, 2016
    Applicant: DAIDO STEEL CO., LTD.
    Inventors: Kyohei NAKAYAMA, Toshiyuki MORITA, Keisuke INOUE
  • Publication number: 20160247710
    Abstract: In one embodiment, a method of manufacturing a semiconductor device includes forming plugs in a first insulator, and forming a first film on the first insulator and the plugs. The method further includes forming openings in the first film to expose the plugs in the openings, and forming a second insulator on side faces of the openings. The method further includes forming an interconnect material adjacent to the second insulator in the openings to form interconnects including the interconnect material on the plugs in the openings. The method further includes removing the first film after forming the interconnects, and forming a third insulator on the interconnects to form an air gap between the interconnects.
    Type: Application
    Filed: July 10, 2015
    Publication date: August 25, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Toshiyuki Morita, Jun Takayasu
  • Publication number: 20160145732
    Abstract: The present invention provides a carburized part having a total amount of TiC, AlN and ZrC, which are precipitate particles, of 4.5×10?10 mole or less per 1 mm2 of grain boundary area of prior austenite grains after carburization. According to the present invention, it is possible to provide a carburized part which allows effective inhibition of abnormal grain growth in spite of a carburizing treatment and makes it possible to solve the problem of reduction in properties caused by abnormal grain growth.
    Type: Application
    Filed: June 24, 2014
    Publication date: May 26, 2016
    Applicant: DAIDO STEEL CO., LTD.
    Inventors: Kyohei NAKAYAMA, Yasuaki SAKAI, Toshiyuki MORITA, Keisuke INOUE
  • Publication number: 20160122858
    Abstract: The present invention provides a carburized part which is formed by processing a steel into a shape of a part and performing a carburizing treatment on the steel, the steel having a composition consisting essentially of, in terms of % by mass: 0.10% to 0.40% of C; 0.05% to 2.00% of Si; 0.30% to 2.00% of Mn; 0.30% to 3.00% of Cr; 0.025% or less of N; and as a pinning particle forming element which forms a pinning particle by nitrification, one or two or more elements selected from: 0.020% to 0.100% of Al; 0.01% to 0.20% of Nb; and 0.005% to 0.20% of Ti, and optionally: 0.80% or less of Mo, with the remainder being Fe and inevitable impurities, in which a crystal grain size number of a surface layer of the part at a depth of 50 ?m or less from a surface is greater than 5, and the crystal grain size number of an inner portion of the part at a depth of 3 mm or more from the surface is 5 or less.
    Type: Application
    Filed: June 3, 2014
    Publication date: May 5, 2016
    Applicant: DAIDO STEEL CO., LTD.
    Inventors: Tomohiro ANDOH, Naoki UMEMORI, Toshiyuki MORITA, Yasushi MATSUMURA
  • Patent number: 9199402
    Abstract: With a mandrel inserted in a through hole formed in an extrusion die, a preform filled in the through hole is extruded into a filling space defined between an inner surface of the through hole and an outer surface of the mandrel by pressing the preform with a pressing punch. Consequently, a cylindrical extruded form in which a plurality of stress concentration portions extending along an extruding direction are formed so as to be spaced apart from each other in a circumferential direction is formed. Then, an external force is applied to the extruded form thus obtained to thereby divide the extruded form at the stress concentration portions into a plurality of permanent magnets.
    Type: Grant
    Filed: January 8, 2013
    Date of Patent: December 1, 2015
    Assignees: DAIDO STEEL CO., LTD., DAIDO ELECTRONICS CO., LTD.
    Inventors: Hiroshi Miyawaki, Toshiyuki Morita, Tatsuya Kagohashi
  • Patent number: 9122267
    Abstract: An interference checking device includes a contour shape analyzing unit that extracts a contour shape of a tool cross section and a tool length by analyzing a two-dimensional image of a rotating tool, a rotation center analyzing unit that obtains a rotation center of the rotating tool by analyzing the contour shape, a three-dimensional-rotation-shape generating unit that generates a three-dimensional shape of the rotating tool on the basis of the contour shape, the tool length, and the rotation center, and an interference check processing unit that checks whether the rotating tool and a component other than the rotating tool interfere with each other when numerical control machining is performed on a workpiece by using the rotating tool, by using the three-dimensional shape, in which the three-dimensional-rotation-shape generating unit generates the three-dimensional shape by using a left-side contour shape.
    Type: Grant
    Filed: February 21, 2013
    Date of Patent: September 1, 2015
    Assignee: Mitsubishi Electric Corporation
    Inventors: Toshiyuki Morita, Nobuyuki Takahashi, Tadahiro Otsuka
  • Publication number: 20150171003
    Abstract: A semiconductor device according to the present embodiment includes a first wiring part located above a substrate and made of a first metal material. A second wiring part is provided as being superimposed on the first wiring part and having a width substantially equal to that of the first wiring part. A first resistivity of the first wiring part is lower than a second resistivity of the second wiring part when the first and second wiring parts have a first width. The second resistivity is lower than the first resistivity when the first and second wiring parts have a second width larger than the first width. The semiconductor device includes both of an area in which the first and second wiring parts have the first width and an area in which the first and second wiring parts have the second width.
    Type: Application
    Filed: March 7, 2014
    Publication date: June 18, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshiyuki MORITA, Seiichi OMOTO, Kazuaki NAKAJIMA, Hiroshi TOYODA