Abstract: An object of the present invention is to provide a method of forecasting and detecting a polishing endpoint and the device thereof and a real time film thickness monitoring method and the device thereof capable of suppressing a Joule heat loss to the minimum due to an eddy current, and precisely forecasting and detecting the polishing endpoint, and moreover, precisely calculating a remaining film amount to be removed and a polishing rate and the like on the spot so as to be able to accurately evaluate whether the predetermined conductive film is appropriately removed.

Abstract: To eliminate the unevenness of the remaining film thickness of the wafers, and increase the polishing efficiency, reduce the running cost and enhance the yield. A CMP apparatus 1 is equipped with a polishing recipe preparing means 3 that prepares polishing conditions so that the polishing conditions such as polishing speed, polishing pressure, abrasive and the like for the wafers become optimal, a remaining film thickness forecasting means 4 that forecasts the remaining film thickness of the wafer to be polished under the polishing conditions after polishing, a remaining film thickness measuring apparatus 4 that measures the remaining film thickness of the wafer after the polishing, and a computer 6 that controls the polishing conditions on the basis of the measurement results of the remaining film thickness.

Abstract: To eliminate the unevenness of the film thickness of the wafers, and increase the polishing efficiency, reduce the running cost and enhance the production yield. A CMP apparatus 1 includes a film thickness measuring means 6 that measures the film thickness of the wafers before polishing, a polishing recipe preparing means 7 that prepares polishing conditions so that the polishing conditions such as polishing speed, polishing pressure, and the like for the wafers become optimal, a polishing time forecasting means that forecasts the polishing time of the wafer on the basis of the optimal polishing condition and the measured value, a polishing time measuring means that measures the actual polishing time of the wafer, and a computer 9 that controls the polishing condition on the basis of the measured value and the like of the polishing time.

Abstract: The present invention aims to provide a wafer polish monitoring method and device for detecting the end point of the polishing of a conductive film with high precision and accuracy by monitoring the variation of the film thickness of the conductive film without adverse influence of slurry or the like after the film thickness of the conductive film decreases to an extremely small film thickness defined by the skin depth.

Abstract: An unevenness elimination end-point detection apparatus for a CMP apparatus which polishes a film to be polished formed on a wafer surface includes: light irradiation means for irradiating a light on a polishing surface of the wafer during polishing of the wafer; photoelectric conversion means for converting a light intensity of a reflected light from the polishing surface into an electric signal to output the electric signal as a light intensity signal; and determination means for determining an elimination end-point of the initial unevenness of the wafer on the basis of the light intensity signal output from the photoelectric conversion means. The irradiated light is white light and the white light is split and input to the photoelectric conversion means, and light intensity signals are output in units of wavelengths of split lights. In this manner, an elimination end-point of the initial unevenness can be optically detected during wafer polishing.

Abstract: To provide an end point detection method applying a resonance phenomenon, an end point detection apparatus, and a chemical mechanical polishing apparatus on which the detection apparatus is loaded for monitoring variation in the thickness of an electrically conductive film in real time, reliably detecting a polishing end point of the electrically conductive film at high accuracy, without generating noise, low power consumption, and capable of reducing the cost.

Abstract: The present invention provides a bottomed cylindrical container, comprising a body wall, a bottom wall, and a ring-shaped foot downwardly extending from the bottom wall, said container being produced by thermo-molding a resin sheet, characterized in that said foot is formed by folding an inner wall by compressed fluid to be fusion-bonded with an outer wall, so as to form the foot comprising the inner wall and the outer wall. The present invention also provides a bottomed cylindrical container, comprising a body wall having a grounding edge at a lower end thereof, and a bottom wall, said container being produced by thermo-molding a resin sheet, characterized in that said bottom wall connects with an upper edge of an inner wall produced by folding back the body wall along the grounding edge and by fusion-bonding it to an inner periphery of the body wall. In addition, the present invention provides the methods for thermo-molding these containers and their apparatuses.

Abstract: An encryption process is employed in the LSI design so as to improve confidentiality of the circuit design data over conventional examples. In the encryption process, confidential circuit design data is encrypted to produce encrypted design data and a cipher key. The encrypted design data is provided to the user who conducts a design/verification process. The key is also provided as required. In the design/verification process, the encrypted design data is subjected to various processes without disclosing the contents of the original circuit. In a decoding process, the encrypted design data subjected to the design/verification process is decoded to produce original circuit design data.

Abstract: An encryption process is employed in the LSI design so as to improve confidentiality of the circuit design data over conventional examples. In the encryption process, confidential circuit design data is encrypted to produce encrypted design data and a cipher key. The encrypted design data is provided to the user who conducts a design/verification process. The key is also provided as required. In the design/verification process, the encrypted design data is subjected to various processes without disclosing the contents of the original circuit. In a decoding process, the encrypted design data subjected to the design/verification process is decoded to produce original circuit design data.

Abstract: An encryption process is employed in the LSI design so as to improve confidentiality of the circuit design data over conventional examples. In the encryption process, confidential circuit design data is encrypted to produce encrypted design data and a cipher key. The encrypted design data is provided to the user who conducts a design/verification process. The key is also provided as required. In the design/verification process, the encrypted design data is subjected to various processes without disclosing the contents of the original circuit. In a decoding process, the encrypted design data subjected to the design/verification process is decoded to produce original circuit design data.

Abstract: The present invention provides a semiconductor device, in which a plurality of chip IPs are mounted onto a common semiconductor circuit board, an evaluation method for the same, and a function setting method for the same. Various IP groups can be mounted as chip IPs onto a silicon circuit board. The silicon circuit board includes a silicon substrate, a wiring layer and pads. IPs (chip IPs) are mounted onto the pads by lamination. Means for selecting, switching and setting the functions of the IPs are provided, making the semiconductor device suitable for small-variety mass-production.

Abstract: The present invention provides a semiconductor device, in which a plurality of chip IPs are mounted onto a common semiconductor circuit board, an evaluation method for the same, and a function setting method for the same. Various IP groups can be mounted as chip IPs onto a silicon circuit board. The silicon circuit board includes a silicon substrate, a wiring layer and pads. IPs (chip IPs) are mounted onto the pads by lamination. Means for selecting, switching and setting the functions of the IPs are provided, making the semiconductor device suitable for small-variety mass-production.

Abstract: Conventional transcoding techniques cannot generate a continuous encoded stream when the transcode operation is interrupted due to insufficient power, etc. and later resumed, causing a degradation in the quality of the image or sound at the point of interruption. A transcoding technique of the present invention determines whether a transcode operation is to be interrupted due to power failure, etc. and if so, stores coding information required to resume the transcode operation at the point of interruption.

Abstract: Information about an exclusive operation among a plurality of blocks and interconnection information about a sharable resource within each of these blocks are defined. Based on the sharable resource information and the inter-block exclusive operation information, a resource sharable among the blocks is extracted. Module specifications, in which information about interfaces, power dissipation, operation models and top-level hierarchy interconnection is stored, exclusive operation information describing an exclusive operation rule among the blocks, and prioritized function information used for preventing respective functions from being enabled at the same time are input to an generator, which is an automatic generating tool.

Abstract: A database for design of an integrated circuit device having data stored therein in a flexibly utilizable state, and a method for designing an integrated circuit device using such a database. A virtual core database (VCDB) for storing design data and a VCDB management system (VCDBMS) as a control system are provided. The VCDB includes virtual core (VC) clusters, test vector clusters, and purpose-specific function testing models. The VCDB also includes a system testing database having shared test clusters and peripheral model clusters. The VCDBMS includes a function testing assist section for generating test scenarios, the purpose-specific function testing models, system testing models, and the like, a VC interface synthesis section, and the like.

Abstract: The present invention provides a bottomed cylindrical container, comprising a body wall, a bottom wall, and a ring-shaped foot downwardly extending from the bottom wall, said container being produced by thermo-molding a resin sheet, characterized in that said foot is formed by folding an inner wall by compressed fluid to be fusion-bonded with an outer wall, so as to form the foot comprising the inner wall and the outer wall. The present invention also provides a bottomed cylindrical container, comprising a body wall having a grounding edge at a lower end thereof, and a bottom wall, said container being produced by thermo-molding a resin sheet, characterized in that said bottom wall connects with an upper edge of an inner wall produced by folding back the body wall along the grounding edge and by fusion-bonding it to an inner periphery of the body wall. In addition, the present invention provides the methods for thermo-molding these containers and their apparatuses.

Abstract: The method for designing an integrated circuit device of the present invention includes the steps of: obtaining the number of operations by a functional simulation; determining a specification model based on the number of operations; determining an behavioral model corresponding to the specification model based on the number of operations per cycle required; determining a RTL model corresponding to the behavioral model based on the number of operations per cycle required; and obtaining design data corresponding to the RTL model for implementing the function.

Abstract: The method for designing an integrated circuit device of the present invention includes the steps of: obtaining the number of operations by a functional simulation; determining a specification model based on the number of operations; determining an behavioral model corresponding to the specification model based on the number of operations per cycle required; determining a RTL model corresponding to the behavioral model based on the number of operations per cycle required; and obtaining design data corresponding to the RTL model for implementing the function.

Abstract: A function information storage section of each of a plurality of IPs of a device stores a plurality of sets of correlations between the working voltage V and the processing time T required when operated at this voltage. The device also includes a system controller for controlling the operation of each IP. When the voltage exceeds a limitation at a certain time as a result of analysis, the working voltage of each IP is changed to fall within the limitation.

Abstract: A database, in which data is stored in a flexibly usable state, is provided for use in the design of an integrated circuit device, and a method for designing an integrated circuit device using such a database is also provided. A design environment includes: a virtual core database (VCDB), which is hierarchical design data storage; and a virtual core database management system (VCDBMS) as a control system. The VCDB includes architecture information and a VC cluster. The VC cluster includes: a specification VC for storing therein data at a specification level; an architecture VC for storing therein data at an architectural level; an RTL-VC for storing therein data at a register transfer level; and a performance index used for evaluating the performance of the respective VCs. By providing these VCs for respective layers, new VCs can be generated, data within the VCs can be modified and instances can be generated at the respective levels. As a result, the data can be used flexibly and recycled as well.