Patents by Inventor Toyohiro Aoki

Toyohiro Aoki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240112965
    Abstract: A semiconductor device includes a substrate, which further includes a cavity and a trench extended from the cavity. The semiconductor includes a first chip and a second chip on the substrate, a bridge chip interconnecting between the first and second chips and residing in the cavity, and underfill material filling the cavity and the trench, and surrounding the bridge chip.
    Type: Application
    Filed: October 3, 2022
    Publication date: April 4, 2024
    Inventors: Chinami Marushima, Toyohiro Aoki, Takashi Hisada, Marc A. Bergendahl
  • Publication number: 20240006371
    Abstract: An interconnect system may connect a first semiconductor device with second semiconductor device. The interconnect system includes patterned mask, conductive pads, solder bumps, and an adhesion layer. The patterned mask may be retained after it is utilized to fabricate the conductive pads and the solder bumps. The patterned mask may be thinned, and the adhesion layer may be formed upon the thinned patterned mask and upon the solder bumps. The adhesion layer and the solder bumps may be partially removed or planarized and the top surface of the adhesion layer that remains between the solder bumps may be coplanar with the top surface of the solder bumps.
    Type: Application
    Filed: June 29, 2022
    Publication date: January 4, 2024
    Inventors: Keiji Matsumoto, Toyohiro Aoki, Takahito Watanabe, RISA MIYAZAWA, Takashi Hisada
  • Patent number: 11848272
    Abstract: A method of fabricating a bridged multi-chip assembly structure includes providing a carrier substrate. The method further includes arranging a plurality of chips on the carrier substrate in a predetermined layout. Each chip has a front surface including a set of terminals formed thereon. The method further includes depositing a molding material between the plurality of chips and on the carrier substrate. The method further includes removing the carrier substrate from the plurality of chips fixed by the molding material. The method further includes bonding a bridge chip to corresponding sets of terminals of at least two chips of the plurality of chips fixed by the molding material.
    Type: Grant
    Filed: August 16, 2021
    Date of Patent: December 19, 2023
    Assignee: International Business Machines Corporation
    Inventors: Akihiro Horibe, Toyohiro Aoki, Takashi Hisada
  • Publication number: 20230343713
    Abstract: A method of fabricating a bridged multi-chip assembly structure includes providing a carrier substrate. The method further includes arranging a plurality of chips on the carrier substrate in a predetermined layout. Each chip has a front surface including a set of terminals formed thereon. The method further includes depositing a molding material between the plurality of chips and on the carrier substrate. The method further includes removing the carrier substrate from the plurality of chips fixed by the molding material. The method further includes bonding a bridge chip to corresponding sets of terminals of at least two chips of the plurality of chips fixed by the molding material.
    Type: Application
    Filed: June 29, 2023
    Publication date: October 26, 2023
    Inventors: Akihiro Horibe, Toyohiro Aoki, Takashi Hisada
  • Publication number: 20230317652
    Abstract: A semiconductor device includes two integrated circuit (IC) chips. The first IC chip includes substrate, a spacer connected to the substrate and including holes, wherein at least one of the holes has a first shape, and solder bumps positioned in the holes, respectively. The second IC chip includes a substrate, electrode pads extending from the substrate and connected to the solder bumps, respectively. At least one of the electrode pads that corresponds to the at least one of the solder bumps has a second shape, and the first shape and the second shape are non-coextensive such that there is at least one gap between the first shape and the second shape when projected on each other.
    Type: Application
    Filed: March 30, 2022
    Publication date: October 5, 2023
    Inventors: Toyohiro Aoki, KOKI NAKAMURA, Takashi Hisada
  • Publication number: 20230307307
    Abstract: An interconnected semiconductor subassembly structure includes an interconnect structure; a first semiconductor die bonded to a first portion of a top surface of the interconnect structure; a second semiconductor die bonded to a second portion of the top surface of the interconnect structure; and a resin layer located within at least a first portion of a gap between the first semiconductor die and the second semiconductor die, wherein at least one of a top surface and a bottom surface of the resin layer located within the at least first portion of the gap has a concave meniscus shape.
    Type: Application
    Filed: September 11, 2022
    Publication date: September 28, 2023
    Inventors: Akihiro Horibe, Toyohiro Aoki, CHINAMI MARUSHIMA, Takahito Watanabe, Takashi Hisada
  • Publication number: 20230299067
    Abstract: Interconnecting a first chip and a second chip includes mounting the first and second chips to a chip handler having an opening and at least one support surface. Each of the first chip and the second chip has a first surface including a first set of terminals and a second surface opposite to the first surface. The first surface of the first chip and the first surface of the second chip mounted to the chip handler are supported by the at least one support surface of the chip handler. The first and second chips are placed on a chip support member with the chip handler from the second surfaces. A bridge member is inserted by a bridge handler through the opening of the chip handler to place the bridge member onto the first sets of terminals of the first and second chips that are exposed from the opening.
    Type: Application
    Filed: May 26, 2023
    Publication date: September 21, 2023
    Inventors: Akihiro Horibe, Takahito Watanabe, Toyohiro Aoki, Takashi Hisada, Hiroyuki Mori
  • Patent number: 11735575
    Abstract: Interconnecting a first chip and a second chip by a bridge member includes a chip handler for handling the first chip and the second chip. Each of the first chip and the second chip has a first surface including a first set of terminals and a second surface opposite to the first surface. The chip handler has an opening and at least one support surface for supporting the first surfaces of the first chip and the second chip when the first chip and the second chip are mounted to the chip handler. A chip support member supports the first chip and the second chip from the second surfaces, and a bridge handler is provided for inserting the bridge member through the opening of the chip handler and for placing the bridge member onto the first sets of terminals of the first chip and the second chip.
    Type: Grant
    Filed: May 27, 2021
    Date of Patent: August 22, 2023
    Assignee: International Business Machines Corporation
    Inventors: Akihiro Horibe, Takahito Watanabe, Toyohiro Aoki, Takashi Hisada, Hiroyuki Mori
  • Publication number: 20230241700
    Abstract: An injection apparatus for injection material is disclosed. The injection apparatus includes a tank for storing material. The injection apparatus further includes a head body that has a surface for contacting a substrate and an opening part opened at the surface for discharging the material in fluid-communication with the tank. The injection apparatus further includes a member connected to the opening part, in which the member allows gas to flow into and flow out from the opening part.
    Type: Application
    Filed: April 6, 2023
    Publication date: August 3, 2023
    Inventors: Toyohiro Aoki, Eiji Nakamura, Takashi Hisada
  • Publication number: 20230245997
    Abstract: A semiconductor structure includes a wafer having a wafer outer surface; a semiconductor chip; and a plurality of copper pillars on the semiconductor chip. The pillars have curved end portions and pillar outside surfaces. Also included are a plurality of copper pads on the wafer. The pads have end portions aligned with the curved end portions of the plurality of copper pillars on the semiconductor chip, and the curved end portions of the plurality of copper pillars and the end portions of the plurality of copper pads define a plurality of bonding material receiving regions. The pads have pad outside surfaces. A copper bonding layer is on the pillar outside surfaces, the pad outside surfaces, the bonding material receiving regions, and portions of the outer surface of the wafer. The portions have an annular shape about the copper pads when viewed in plan.
    Type: Application
    Filed: January 31, 2022
    Publication date: August 3, 2023
    Inventors: KOKI NAKAMURA, Toyohiro Aoki, Takashi Hisada
  • Patent number: 11684988
    Abstract: An injection apparatus for injection material is disclosed. The injection apparatus includes a tank for storing material. The injection apparatus further includes a head body that has a surface for contacting a substrate and an opening part opened at the surface for discharging the material in fluid-communication with the tank. The injection apparatus further includes a member connected to the opening part, in which the member allows gas to flow into and flow out from the opening part.
    Type: Grant
    Filed: March 9, 2022
    Date of Patent: June 27, 2023
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Toyohiro Aoki, Eiji Nakamura, Takashi Hisada
  • Publication number: 20230178445
    Abstract: An electronic device is formed by dispensing an underfill material around a perimeter of an integrated circuit (IC) chip bonded to a supporting substrate. A void in present in the underfill material that is present between the IC chip and the supporting substrate. An opening is present through at least one of the IC chip and the supporting substrate into communication with the void. A vacuum may be applied to the void through the opening that is present through the IC chip to reduce a size of the void to a first volume. The opening that is present through the IC chip is sealed with a sealing plate. The underfill material is cured after the sealing of the opening to reduce of the void to at least a second volume that is less than the first volume.
    Type: Application
    Filed: December 6, 2021
    Publication date: June 8, 2023
    Inventors: Toyohiro Aoki, CHINAMI MARUSHIMA, RISA MIYAZAWA, Akihiro Horibe, Takashi Hisada
  • Publication number: 20230154887
    Abstract: An apparatus for injecting solder material in via holes located in a top surface of a wafer is provided. The apparatus includes an injection head having a contact surface for contacting the top surface of the wafer, and at least one aperture for injecting the solder material though the injection head into the via holes. The apparatus further includes an evacuating device connected to the injection head for evacuating gas from the via holes. The injection head has a chamfer part on an edge of a contact surface contacting the top surface of the wafer.
    Type: Application
    Filed: November 18, 2021
    Publication date: May 18, 2023
    Inventors: Sayuri Hada, Toyohiro Aoki, Takashi Hisada, Shintaro Yamamichi
  • Publication number: 20230051337
    Abstract: A method of fabricating a bridged multi-chip assembly structure includes providing a carrier substrate. The method further includes arranging a plurality of chips on the carrier substrate in a predetermined layout. Each chip has a front surface including a set of terminals formed thereon. The method further includes depositing a molding material between the plurality of chips and on the carrier substrate. The method further includes removing the carrier substrate from the plurality of chips fixed by the molding material. The method further includes bonding a bridge chip to corresponding sets of terminals of at least two chips of the plurality of chips fixed by the molding material.
    Type: Application
    Filed: August 16, 2021
    Publication date: February 16, 2023
    Inventors: Akihiro Horibe, Toyohiro Aoki, Takashi Hisada
  • Publication number: 20220384412
    Abstract: Interconnecting a first chip and a second chip by a bridge member includes a chip handler for handling the first chip and the second chip. Each of the first chip and the second chip has a first surface including a first set of terminals and a second surface opposite to the first surface. The chip handler has an opening and at least one support surface for supporting the first surfaces of the first chip and the second chip when the first chip and the second chip are mounted to the chip handler. A chip support member supports the first chip and the second chip from the second surfaces, and a bridge handler is provided for inserting the bridge member through the opening of the chip handler and for placing the bridge member onto the first sets of terminals of the first chip and the second chip.
    Type: Application
    Filed: May 27, 2021
    Publication date: December 1, 2022
    Inventors: Akihiro Horibe, Takahito Watanabe, Toyohiro Aoki, Takashi Hisada, Hiroyuki Mori
  • Publication number: 20220193805
    Abstract: An injection apparatus for injection material is disclosed. The injection apparatus includes a tank for storing material. The injection apparatus further includes a head body that has a surface for contacting a substrate and an opening part opened at the surface for discharging the material in fluid-communication with the tank. The injection apparatus further includes a member connected to the opening part, in which the member allows gas to flow into and flow out from the opening part.
    Type: Application
    Filed: March 9, 2022
    Publication date: June 23, 2022
    Inventors: Toyohiro Aoki, Eiji Nakamura, Takashi Hisada
  • Patent number: 11329018
    Abstract: A technique for fabricating a bump structure is disclosed. A substrate that includes a set of pads formed on a surface thereof is prepared, in which the pads includes first conductive material. A metallic adhesion layer is coated on each pad. A bump base is formed on each pad by sintering conductive particles using a mold layer, in which the conductive particles includes second conductive material different from the first conductive material.
    Type: Grant
    Filed: October 23, 2019
    Date of Patent: May 10, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Takashi Hisada, Toyohiro Aoki, Eiji Nakamura
  • Patent number: 11298769
    Abstract: An injection apparatus for injection material is disclosed. The injection apparatus includes a tank for storing material. The injection apparatus further includes a head body that has a surface for contacting a substrate and an opening part opened at the surface for discharging the material in fluid-communication with the tank. The injection apparatus further includes a member connected to the opening part, in which the member allows gas to flow into and flow out from the opening part.
    Type: Grant
    Filed: May 13, 2019
    Date of Patent: April 12, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Toyohiro Aoki, Eiji Nakamura, Takashi Hisada
  • Patent number: 11181704
    Abstract: A technique for fabricating bumps on a substrate is disclosed. A substrate that includes a set of pads formed on a surface thereof is prepared. A bump base is formed on each pad of the substrate. Each bump base has a tip extending outwardly from the corresponding pad. A resist layer is patterned on the substrate to have a set of holes through the resist layer. Each hole is aligned with the corresponding pad and having space configured to surround the tip of the bump base formed on the corresponding pad. The set of the holes in the resist layer is filled with conductive material to form a set of bumps on the substrate. The resist layer is stripped from the substrate with leaving the set of the bumps.
    Type: Grant
    Filed: January 16, 2020
    Date of Patent: November 23, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Toyohiro Aoki, Takashi Hisada, Eiji Nakamura, Masao Tokunari
  • Patent number: 11164845
    Abstract: A method for fabricating a resist structure is presented. The method includes preparing a substrate on which plural conductive pads are formed; and patterning a lower resist to form plural lower cavities. The lower resist is deposited above the substrate. Each of the plural lower cavities are located above a corresponding one of the plural conductive pads. Additionally, the method includes patterning an upper resist to form plural upper cavities. The upper resist is deposited on the lower resist. Each of the plural upper cavities are located on a corresponding one of the plural lower cavities and have a diameter larger than a diameter of the corresponding one of the plural lower cavities.
    Type: Grant
    Filed: January 30, 2020
    Date of Patent: November 2, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Eiji Nakamura, Toyohiro Aoki, Takashi Hisada, Risa Miyazawa