Patents by Inventor Toyohiro Aoki

Toyohiro Aoki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10090586
    Abstract: A joined structure which is configured such that a space between adjacent substrates is filled with a filling material. The joined structure includes a first substrate having a first conductor formed on a surface of the first substrate, a second substrate having a second conductor formed on a surface of the second substrate, arranged so that a surface of the first substrate faces a surface of the second substrate, a connecting conductor which electrically connects the first conductor and the second conductor, and a filling material between the first substrate and the second substrate. The filling material is formed into such a shape that a space is provided which corresponds to at least one of the first conductor, the second and the connecting conductor.
    Type: Grant
    Filed: July 10, 2017
    Date of Patent: October 2, 2018
    Assignee: International Business Machines Corporation
    Inventors: Toyohiro Aoki, Noam Kaminski, Keishi Okamoto, Kazushige Toriyama
  • Publication number: 20180277509
    Abstract: Methods for depositing material on a chip include forming a mold layer. The mold layer includes one or more openings over respective contact areas, each of the one or more openings having an upper volume and a lower volume. The upper volume has a smaller diameter than a diameter of the lower volume. Each contact area is within the respective lower volume. A material is injected into the one or more openings under pressure.
    Type: Application
    Filed: May 24, 2018
    Publication date: September 27, 2018
    Inventors: Toyohiro Aoki, Takashi Hisada, Eiji Nakamura, Kuniaki Sueoka
  • Publication number: 20180269173
    Abstract: Wafers include multiple bulk redistribution layers. A contact pad is formed on a surface of one of the bulk redistribution layers. A final redistribution layer is formed on the surface and in contact with the contact pad. Solder is formed on the contact pad. The solder includes a pedestal portion formed to a same height as the final redistribution layer and a ball portion above the pedestal portion.
    Type: Application
    Filed: May 23, 2018
    Publication date: September 20, 2018
    Inventors: Toyohiro Aoki, Takashi Hisada, Eiji I. Nakamura
  • Patent number: 10037967
    Abstract: Methods for depositing material on a chip include forming a mold layer on a substrate. The mold layer has one or more openings over respective contact areas on the substrate. The one or more openings are formed from an upper volume and a lower volume, the upper volume having a smaller diameter than a diameter of the lower volume. A material is injected into the one or more openings under pressure, such that gas trapped in the one or more openings displaces into the lower volume until the injected material in the one or more openings makes contact with each respective contact area.
    Type: Grant
    Filed: March 9, 2017
    Date of Patent: July 31, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Toyohiro Aoki, Takashi Hisada, Eiji Nakamura, Kuniaki Sueoka
  • Patent number: 10037958
    Abstract: Wafers include multiple bulk redistribution layers. A terminal contact pad is on a surface of one of the bulk redistribution layers. A final redistribution layer is formed on the surface and in contact with the terminal contact pad. The final redistribution layer is formed from a material other than a material of the plurality of bulk redistribution layers. A solder ball is formed on the terminal contact pad.
    Type: Grant
    Filed: June 16, 2017
    Date of Patent: July 31, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Toyohiro Aoki, Takashi Hisada, Eiji I. Nakamura
  • Publication number: 20180108631
    Abstract: Wafers and methods of forming solder balls include etching a hole in a final redistribution layer over a terminal contact pad on a wafer to expose the terminal contact pad. Solder is injected into the hole using an injection nozzle that is in direct contact with the final redistribution layer. The final redistribution layer is etched back. The injected solder is reflowed to form a solder ball.
    Type: Application
    Filed: October 2, 2017
    Publication date: April 19, 2018
    Inventors: Toyohiro Aoki, Takashi Hisada, Eiji Nakamura
  • Publication number: 20180108630
    Abstract: Wafers include multiple bulk redistribution layers. A terminal contact pad is on a surface of one of the bulk redistribution layers. A final redistribution layer is formed on the surface and in contact with the terminal contact pad. The final redistribution layer is formed from a material other than a material of the plurality of bulk redistribution layers. A solder ball is formed on the terminal contact pad.
    Type: Application
    Filed: June 16, 2017
    Publication date: April 19, 2018
    Inventors: Toyohiro Aoki, Takashi Hisada, Eiji Nakamura
  • Publication number: 20180076164
    Abstract: A method of forming solder bumps includes preparing a substrate having a surface on which a plurality of electrode pads are formed, forming a resist layer on the substrate, the resist layer having a plurality of openings, each of the openings being aligned with a corresponding electrode pad of the plurality of electrode pads, forming a conductive pillar in each of the openings of the resist layer, forming conductive layers to cover at least side walls of the resist layer in the openings to block gas emanating from the resist layer, filling molten solder in each of the openings in which the conductive layers has been formed and removing the resist layer.
    Type: Application
    Filed: April 27, 2017
    Publication date: March 15, 2018
    Inventors: Toyohiro Aoki, Takashi Hisada, Hiroyuki Mori, Eiji Nakamura, Yasumitsu Orii
  • Publication number: 20180076163
    Abstract: A method of forming solder bumps includes preparing a substrate having a surface on which a plurality of electrode pads are formed, forming a resist layer on the substrate, the resist layer having a plurality of openings, each of the openings being aligned with a corresponding electrode pad of the plurality of electrode pads, forming a conductive pillar in each of the openings of the resist layer, forming conductive layers to cover at least side walls of the resist layer in the openings to block gas emanating from the resist layer, filling molten solder in each of the openings in which the conductive layers has been formed and removing the resist layer.
    Type: Application
    Filed: September 14, 2016
    Publication date: March 15, 2018
    Inventors: Toyohiro Aoki, Takashi Hisada, Hiroyuki Mori, Eiji Nakamura, Yasumitsu Orii
  • Publication number: 20180076165
    Abstract: A method of forming solder bumps includes preparing a substrate having a surface on which a plurality of electrode pads are formed, forming a resist layer on the substrate, the resist layer having a plurality of openings, each of the openings being aligned with a corresponding electrode pad of the plurality of electrode pads, forming a conductive pillar in each of the openings of the resist layer, forming conductive layers to cover at least side walls of the resist layer in the openings to block gas emanating from the resist layer, filling molten solder in each of the openings in which the conductive layers has been formed and removing the resist layer.
    Type: Application
    Filed: September 25, 2017
    Publication date: March 15, 2018
    Inventors: Toyohiro Aoki, Takashi Hisada, Hiroyuki Mori, Eiji Nakamura, Yasumitsu Orii
  • Publication number: 20180061796
    Abstract: A method of the present invention includes preparing a substrate having a surface on which a electrode pad is formed, forming a resist layer on the substrate, the resist layer having an opening on the electrode pad, filling conductive paste in the opening of the resist layer; sintering the conductive paste in the opening to form a conductive layer which covers a side wall of the resist layer and a surface of the electrode pad in the opening, a space on the conductive layer leading to the upper end of the opening being formed, filling solder in the space on the conductive layer and removing the resist layer.
    Type: Application
    Filed: July 26, 2017
    Publication date: March 1, 2018
    Inventors: Toyohiro Aoki, Takashi Hisada, Eiji I. Nakamura
  • Publication number: 20180061797
    Abstract: A method of the present invention includes preparing a substrate having a surface on which a electrode pad is formed, forming a resist layer on the substrate, the resist layer having an opening on the electrode pad, filling conductive paste in the opening of the resist layer; sintering the conductive paste in the opening to form a conductive layer which covers a side wall of the resist layer and a surface of the electrode pad in the opening, a space on the conductive layer leading to the upper end of the opening being formed, filling solder in the space on the conductive layer and removing the resist layer.
    Type: Application
    Filed: November 3, 2017
    Publication date: March 1, 2018
    Inventors: Toyohiro Aoki, Takashi Hisada, Eiji I. Nakamura
  • Patent number: 9859241
    Abstract: A method of the present invention includes preparing a substrate having a surface on which a electrode pad is formed, forming a resist layer on the substrate, the resist layer having an opening on the electrode pad, filling conductive paste in the opening of the resist layer; sintering the conductive paste in the opening to form a conductive layer which covers a side wall of the resist layer and a surface of the electrode pad in the opening, a space on the conductive layer leading to the upper end of the opening being formed, filling solder in the space on the conductive layer and removing the resist layer.
    Type: Grant
    Filed: September 1, 2016
    Date of Patent: January 2, 2018
    Assignee: International Business Machines Corporation
    Inventors: Toyohiro Aoki, Takashi Hisada, Eiji I Nakamura
  • Patent number: 9837367
    Abstract: Wafers and methods of forming solder balls include forming a final redistribution layer over terminal contact pad on a surface of a wafer. The wafer includes multiple bulk redistribution layers. A hole is etched in the final redistribution layer to expose the terminal contact pad. Solder is injected into the hole using an injection nozzle that is in direct contact with the final redistribution layer. The final redistribution layer is etched back. The injected solder is reflowed to form a solder ball.
    Type: Grant
    Filed: October 19, 2016
    Date of Patent: December 5, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Toyohiro Aoki, Takashi Hisada, Eiji I. Nakamura
  • Publication number: 20170338152
    Abstract: A method for filling a through hole with solder includes mounting a substrate having a through hole formed therein on a permeable barrier layer having pores that enable gas to flow through the permeable barrier. A solder source is positioned over the through hole. Molten solder is delivered in the through hole with a positive pressure from the solder source such that gas in the through holes passes the permeable barrier while the molten solder remains in the through hole.
    Type: Application
    Filed: August 7, 2017
    Publication date: November 23, 2017
    Inventors: Toyohiro Aoki, Akihiro Horibe, Kuniaki Sueoka, Kazushige Toriyama
  • Publication number: 20170309998
    Abstract: A joined structure which is configured such that a space between adjacent substrates is filled with a filling material. The joined structure includes a first substrate having a first conductor formed on a surface of the first substrate, a second substrate having a second conductor formed on a surface of the second substrate, arranged so that a surface of the first substrate faces a surface of the second substrate, a connecting conductor which electrically connects the first conductor and the second conductor, and a filling material between the first substrate and the second substrate. The filling material is formed into such a shape that a space is provided which corresponds to at least one of the first conductor, the second and the connecting conductor.
    Type: Application
    Filed: July 10, 2017
    Publication date: October 26, 2017
    Inventors: Toyohiro Aoki, Noam Kaminski, Keishi Okamoto, Kazushige Toriyama
  • Patent number: 9780442
    Abstract: A joined structure which is configured such that a space between adjacent substrates is filled with a filling material. The joined structure includes a first substrate having a first conductor formed on a surface of the first substrate, a second substrate having a second conductor formed on a surface of the second substrate, arranged so that a surface of the first substrate faces a surface of the second substrate, a connecting conductor which electrically connects the first conductor and the second conductor, and a filling material between the first substrate and the second substrate. The filling material is formed into such a shape that a space is provided which corresponds to at least one of the first conductor, the second and the connecting conductor.
    Type: Grant
    Filed: June 10, 2015
    Date of Patent: October 3, 2017
    Assignee: International Business Machines Corporation
    Inventors: Toyohiro Aoki, Noam Kaminski, Keishi Okamoto, Kazushige Toriyama
  • Publication number: 20170263498
    Abstract: A method for filling a through hole with solder includes mounting a substrate having a through hole formed therein on a permeable barrier layer having pores that enable gas to flow through the permeable barrier. A solder source is positioned over the through hole. Molten solder is delivered in the through hole with a positive pressure from the solder source such that gas in the through holes passes the permeable barrier while the molten solder remains in the through hole.
    Type: Application
    Filed: March 11, 2016
    Publication date: September 14, 2017
    Inventors: Toyohiro Aoki, Akihiro Horibe, Kuniaki Sueoka, Kazushige Toriyama
  • Publication number: 20170120361
    Abstract: Forming a solder joint between metal layers by preparing a structure having solder material placed between two metal layers and heating the structure to grow an intermetallic compound in a space between the two metal layers. Growing the intermetallic compound includes setting a first surface, in contact with the solder material between the two metal layers, to a first temperature, thereby enabling growth of the intermetallic compound; setting a second surface, in contact with the solder material between the two metal layers, to a second temperature, wherein the second temperature is higher than the first temperature; and maintaining a temperature gradient (temperature/unit thickness) between the two metal layers at a predetermined value or higher until the intermetallic compound substantially fills the space between the two metal layers.
    Type: Application
    Filed: January 10, 2017
    Publication date: May 4, 2017
    Inventors: Toyohiro Aoki, Akihiro Horibe, Hiroyuki Mori, Yasumitsu Orii, Kazushige Toriyama, Ting-Li Yang
  • Patent number: 9586281
    Abstract: Forming a solder joint between metal layers by preparing a structure having solder material placed between two metal layers and heating the structure to grow an intermetallic compound in a space between the two metal layers. Growing the intermetallic compound includes setting a first surface, in contact with the solder material between the two metal layers, to a first temperature, thereby enabling growth of the intermetallic compound; setting a second surface, in contact with the solder material between the two metal layers, to a second temperature, wherein the second temperature is higher than the first temperature; and maintaining a temperature gradient (temperature/unit thickness) between the two metal layers at a predetermined value or higher until the intermetallic compound substantially fills the space between the two metal layers.
    Type: Grant
    Filed: August 21, 2015
    Date of Patent: March 7, 2017
    Assignee: International Business Machines Corporation
    Inventors: Toyohiro Aoki, Akihiro Horibe, Hiroyuki Mori, Yasumitsu Orii, Kazushige Toriyama, Ting-Li Yang