Patents by Inventor Troy J. Beukema
Troy J. Beukema has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8634786Abstract: Provision of gigabit-rate data transmission over wireless radio links, using carrier frequencies in the millimeter-wave range (>30 GHz). More specifically, a circuit for detection of amplitude-shift keyed (ASK) or other amplitude modulations (AM) which can be easily incorporated into an integrated circuit receiver system is described, making the receiver capable of supporting both complex IQ modulation schemes and simpler, non-coherent on-off or multiple-level keying signals. Several novel radio architectures are also described which, with the addition of a frequency discriminator network, have the capability of handling frequency shift keyed (FSK) or other frequency modulations (FM), as well as AM and complex IQ modulation schemes. These radio architectures support this wide variety of modulations by efficiently sharing detector hardware components.Type: GrantFiled: August 20, 2012Date of Patent: January 21, 2014Assignee: International Business Machines CorporationInventors: Troy J. Beukema, Scott K. Reynolds
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Patent number: 8599966Abstract: A data receiver, a method of operating a data receiver, and an integrated coupling system in a data receiver are disclosed. In one embodiment, the data receiver comprises an input terminal for receiving an input data signal, an input amplifier for amplifying selected components of the input data signal, and an input signal path for transmitting specified high-frequency components and a baseline component of the input data signal from the input terminal to the input amplifier. The data receiver further comprises a feed-forward resistive network connected to the input terminal and to the input amplifier. This feed forward resistive network is used to forward a low-frequency drift compensation signal from the input terminal to the input amplifier, using a passive resistive network, to compensate for low frequency variations in the input data signal, and to develop a desired bias voltage at the input amplifier.Type: GrantFiled: June 30, 2011Date of Patent: December 3, 2013Assignee: International Business Machines CorporationInventors: Troy J. Beukema, Gautam Gangasani, Thomas H. Toifl
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Patent number: 8543079Abstract: Provision of gigabit-rate data transmission over wireless radio links, using carrier frequencies in the millimeter-wave range (>30 GHz). More specifically, a circuit for detection of amplitude-shift keyed (ASK) or other amplitude modulations (AM) which can be easily incorporated into an integrated circuit receiver system is described, making the receiver capable of supporting both complex IQ modulation schemes and simpler, non-coherent on-off or multiple-level keying signals. Several novel radio architectures are also described which, with the addition of a frequency discriminator network, have the capability of handling frequency shift keyed (FSK) or other frequency modulations (FM), as well as AM and complex IQ modulation schemes. These radio architectures support this wide variety of modulations by efficiently sharing detector hardware components.Type: GrantFiled: August 20, 2012Date of Patent: September 24, 2013Assignee: International Business Machines CorporationInventors: Troy J. Beukema, Scott K. Reynolds
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Publication number: 20130215954Abstract: Analog signal current integrators are provided having tunable peaking functions. Analog signal current integrators with tunable peaking functions enable data rate dependent loss compensation for applications in high data rate receiver integrated circuits incorporating advanced equalization functions, such as decision-feedback equalizers. For instance, a current integrator circuit includes a current integrating amplifier circuit comprising an adjustable circuit element to tune a peaking response of the current integrator circuit, and a peaking control circuit to generate a control signal to adjust a value of the adjustable circuit element as a function of an operating condition of the current integrator circuit. The operating condition may be a specified data rate or a communication channel characteristic or both. The adjustable circuit element may be a degeneration capacitor or a bias current source.Type: ApplicationFiled: February 17, 2012Publication date: August 22, 2013Applicant: International Business Machines CorporationInventors: Troy J. Beukema, John F. Bulzacchelli
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Patent number: 8401135Abstract: A serial data receiver includes an amplitude path including a first signal conditioner that adds a first offset or subtracts a second offset based on a selection input, a preamp configured to receive a signal from a transmitter and provide an input signal to the amplitude path, an amplitude latch coupled to the amplitude path, a data latch having a data output and a decision feedback equalization (DFE) logic block coupled to the first conditioning element and the data output and configured to generate the selection output based on the data output of the data latch.Type: GrantFiled: February 2, 2010Date of Patent: March 19, 2013Assignee: International Business Machines CorporationInventors: Troy J. Beukema, William R. Kelly, Michael A. Sorna, Daniel W. Storaska
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Publication number: 20130045701Abstract: Provision of gigabit-rate data transmission over wireless radio links, using carrier frequencies in the millimeter-wave range (>30 GHz). More specifically, a circuit for detection of amplitude-shift keyed (ASK) or other amplitude modulations (AM) which can be easily incorporated into an integrated circuit receiver system is described, making the receiver capable of supporting both complex IQ modulation schemes and simpler, non-coherent on-off or multiple-level keying signals. Several novel radio architectures are also described which, with the addition of a frequency discriminator network, have the capability of handling frequency shift keyed (FSK) or other frequency modulations (FM), as well as AM and complex IQ modulation schemes. These radio architectures support this wide variety of modulations by efficiently sharing detector hardware components.Type: ApplicationFiled: August 20, 2012Publication date: February 21, 2013Applicant: International Business Machines CorporationInventors: Troy J. Beukema, Scott K. Reynolds
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Publication number: 20130044837Abstract: Provision of gigabit-rate data transmission over wireless radio links, using carrier frequencies in the millimeter-wave range (>30 GHz). More specifically, a circuit for detection of amplitude-shift keyed (ASK) or other amplitude modulations (AM) which can be easily incorporated into an integrated circuit receiver system is described, making the receiver capable of supporting both complex IQ modulation schemes and simpler, non-coherent on-off or multiple-level keying signals. Several novel radio architectures are also described which, with the addition of a frequency discriminator network, have the capability of handling frequency shift keyed (FSK) or other frequency modulations (FM), as well as AM and complex IQ modulation schemes. These radio architectures support this wide variety of modulations by efficiently sharing detector hardware components.Type: ApplicationFiled: August 20, 2012Publication date: February 21, 2013Applicant: International Business Machines CorporationInventors: Troy J. Beukema, Scott K. Reynolds
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Publication number: 20130045702Abstract: Provision of gigabit-rate data transmission over wireless radio links, using carrier frequencies in the millimeter-wave range (>30 GHz). More specifically, a circuit for detection of amplitude-shift keyed (ASK) or other amplitude modulations (AM) which can be easily incorporated into an integrated circuit receiver system is described, making the receiver capable of supporting both complex IQ modulation schemes and simpler, non-coherent on-off or multiple-level keying signals. Several novel radio architectures are also described which, with the addition of a frequency discriminator network, have the capability of handling frequency shift keyed (FSK) or other frequency modulations (FM), as well as AM and complex IQ modulation schemes. These radio architectures support this wide variety of modulations by efficiently sharing detector hardware components.Type: ApplicationFiled: August 20, 2012Publication date: February 21, 2013Applicant: International Business Machines CorporationInventors: Troy J. Beukema, Scott K. Reynolds
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Publication number: 20130002347Abstract: A data receiver, a method of operating a data receiver, and an integrated coupling system in a data receiver are disclosed. In one embodiment, the data receiver comprises an input terminal for receiving an input data signal, an input amplifier for amplifying selected components of the input data signal, and an input signal path for transmitting specified high-frequency components and a baseline component of the input data signal from the input terminal to the input amplifier. The data receiver further comprises a feed-forward resistive network connected to the input terminal and to the input amplifier. This feed forward resistive network is used to forward a low-frequency drift compensation signal from the input terminal to the input amplifier, using a passive resistive network, to compensate for low frequency variations in the input data signal, and to develop a desired bias voltage at the input amplifier.Type: ApplicationFiled: June 30, 2011Publication date: January 3, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Troy J. Beukema, Gautam Gangasani, Thomas H. Toifl
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Patent number: 8249542Abstract: This disclosure addresses providing gigabit-rate data transmission over wireless radio links, using carrier frequencies in the millimeter-wave range (>30 GHz). More specifically, a circuit for detection of amplitude-shift keyed (ASK) or other amplitude modulations (AM) which can be easily incorporated into an integrated circuit receiver system is described, making the receiver capable of supporting both complex IQ modulation schemes and simpler, non-coherent on-off or multiple-level keying signals. Several novel radio architectures are also described which, with the addition of a frequency discriminator network, have the capability of handling frequency shift keyed (FSK) or other frequency modulations (FM), as well as AM and complex IQ modulation schemes. These radio architectures support this wide variety of modulations by efficiently sharing detector hardware components.Type: GrantFiled: July 22, 2008Date of Patent: August 21, 2012Assignee: International Business Machines CorporationInventors: Troy J. Beukema, Scott K. Reynolds
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Patent number: 8139700Abstract: A system and method for closed loop clock correction includes adjusting two or more input signals comprising at least one in-phase clock and one quadrature clock, and applying adjusted quadrature clock signals to a device capable of generating a 4-quadrant interpolated output clock phase. An interpolated output clock phase is delayed to form a clock for a measurement device. Two or more adjusted input signals are measured on a measurement device over a range of interpolated output clock phases. Errors are determined on the in-phase clock and the quadrature clock using sampled information from the measurement device. The in-phase clock and the quadrature clock are adapted using determined error information.Type: GrantFiled: June 26, 2009Date of Patent: March 20, 2012Assignee: International Business Machines CorporationInventors: Troy J. Beukema, Steven M. Clements, Chun-Ming Hsu, William R. Kelly, Elizabeth M. May, Sergey V. Rylov
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Patent number: 8004441Abstract: A digital-to-analog (DAC) converter that includes a plurality of dynamically operated slave digital-to-analog (DAC) converters, each having a switched current mirror and a storage capacitor, and a static master digital-to-analog (DAC) converter in communication with the plurality of dynamically operated slave DAC converters, that distributes a current to at least one of the plurality of slave DAC converters such that voltage across the storage capacitor of the at least one slave DAC converter controls the switch current mirror so that the at least one slave DAC converter outputs currents that are equivalent to digital codes applied to the static master DAC converter. A ring counter is used to periodically refresh the charges on the storage capacitors that are lost by leakage. In addition to the periodic updates, an end user may perform immediate updates of selected slave DACs if necessary, via the ring counter.Type: GrantFiled: March 18, 2010Date of Patent: August 23, 2011Assignee: International Business Machines CorporationInventors: Troy J. Beukema, Marcel A. Kossel, Thomas Toifl, Jonas Weiss
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Publication number: 20110188566Abstract: A serial data receiver includes an amplitude path including a first signal conditioner that adds a first offset or subtracts a second offset based on a selection input, a preamp configured to receive a signal from a transmitter and provide an input signal to the amplitude path, an amplitude latch coupled to the amplitude path, a data latch having a data output and a decision feedback equalization (DFE) logic block coupled to the first conditioning element and the data output and configured to generate the selection output based on the data output of the data latch.Type: ApplicationFiled: February 2, 2010Publication date: August 4, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Troy J. Beukema, William R. Kelly, Michael A. Sorna, Daniel W. Storaska
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Publication number: 20100329403Abstract: A system and method for closed loop clock correction includes adjusting two or more input signals comprising at least one in-phase clock and one quadrature clock, and applying adjusted quadrature clock signals to a device capable of generating a 4-quadrant interpolated output clock phase. An interpolated output clock phase is delayed to form a clock for a measurement device. Two or more adjusted input signals are measured on a measurement device over a range of interpolated output clock phases. Errors are determined on the in-phase clock and the quadrature clock using sampled information from the measurement device. The in-phase clock and the quadrature clock are adapted using determined error information.Type: ApplicationFiled: June 26, 2009Publication date: December 30, 2010Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Troy J. Beukema, Steven M. Clements, Chun-Ming Hsu, William R. Kelly, Elizabeth M. May, Sergey V. Rylov
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Patent number: 7512395Abstract: This disclosure addresses providing gigabit-rate data transmission over wireless radio links, using carrier frequencies in the millimeter-wave range (>30 GHz). More specifically, a circuit for detection of amplitude-shift keyed (ASK) or other amplitude modulations (AM) which can be easily incorporated into an integrated circuit receiver system is described, making the receiver capable of supporting both complex IQ modulation schemes and simpler, non-coherent on-off or multiple-level keying signals. Several novel radio architectures are also described which, with the addition of a frequency discriminator network, have the capability of handling frequency shift keyed (FSK) or other frequency modulations (FM), as well as AM and complex IQ modulation schemes.Type: GrantFiled: January 31, 2006Date of Patent: March 31, 2009Assignee: International Business Machines CorporationInventors: Troy J. Beukema, Scott K. Reynolds
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Publication number: 20080280577Abstract: This disclosure addresses providing gigabit-rate data transmission over wireless radio links, using carrier frequencies in the millimeter-wave range (>30 GHz). More specifically, a circuit for detection of amplitude-shift keyed (ASK) or other amplitude modulations (AM) which can be easily incorporated into an integrated circuit receiver system is described, making the receiver capable of supporting both complex IQ modulation schemes and simpler, non-coherent on-off or multiple-level keying signals. Several novel radio architectures are also described which, with the addition of a frequency discriminator network, have the capability of handling frequency shift keyed (FSK) or other frequency modulations (FM), as well as AM and complex IQ modulation schemes. These radio architectures support this wide variety of modulations by efficiently sharing detector hardware components.Type: ApplicationFiled: July 22, 2008Publication date: November 13, 2008Applicant: International Business Machines CorporationInventors: Troy J. Beukema, Scott K. Reynolds
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Patent number: 6393083Abstract: An apparatus and method for an improved hardware implementation of a digital phase shifter which provides a simplified process for phase correction of digital signals and eliminates the use of a lookup ROM and complex digital Multipliers. The digital phase shifter operates by applying a phase correction to complex digital I/Q samples in separate stages, where each stage performs a phase rotation by an amount specified directly by the binary values of an integer input phase. In one aspect, an apparatus for applying a phase shift to a complex digital signal comprises a plurality of phase shift stages each having a phase shift value associated therewith, whereby each of the plurality of phase shift stages selectively applies the corresponding phase shift value to the complex digital signal.Type: GrantFiled: July 31, 1998Date of Patent: May 21, 2002Assignee: International Business Machines CorporationInventor: Troy J. Beukema
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Patent number: 6243413Abstract: A modular home-networking communications system which uses a physical layer modulation scheme suitable for transmission in both RF and powerline communication channels. The modulation system is based on direct-sequence spread-spectrum (DS-SS) using Barker codes to spread the information symbols, which provides both operation at low signal to noise ratio and very good resistance to time dispersion distortion due to the excellent autocorrelation properties of the Barker codes. This type of modulation system is ideal for the powerline communications channel since it spreads the transmission power over a wide range of frequency, lowering the power spectral density enough that it will provide long distance coverage without violating FCC radiated emission and conducted power regulations.Type: GrantFiled: April 3, 1998Date of Patent: June 5, 2001Assignee: International Business Machines CorporationInventor: Troy J. Beukema
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Patent number: 5715240Abstract: A method determines the signal usability of an adjacent channel in a multi-cell communication system without the aid of synchronization symbols. In general, a three step search is used to arrive at the adjacent channel signal quality. The first step is a coarse timing phase search. This is accomplished through a signal quality estimates (606). The second step arrives at the optimum time phase by first interpolating (608) the received signal around the time phase selected in the first step to generate additional samples. After the interpolation (608), signal quality estimates are calculated (610) for the time phases immediately surrounding the time phase found in the first step. The optimum time phase corresponds to the maximum of these quality estimates. Finally, in the third step, the signal quality estimate is calculated for the optimum time phase. This provides the adjacent channel signal quality estimate desired.Type: GrantFiled: May 3, 1996Date of Patent: February 3, 1998Assignee: Motorola, Inc.Inventors: Jaime A. Borras, Steven C. Jasper, James P. Michels, Troy J. Beukema
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Patent number: 5509034Abstract: A method and apparatus of frequency synchronization is described for a reference oscillator. Using a reference oscillator set to a first frequency, the process begins by scanning for a radio frequency carrier modulated with a predetermined pattern. The radio frequency carrier is located such that a received pattern comprising a frequency shifted version of the predetermined pattern is identified and time synchronization is established. The received pattern, the predetermined pattern, and stepped alterations to the first frequency are combined to provide a set of results that represent pattern correlation versus reference oscillator frequency. The first frequency is offset using the set of results, such that frequency synchronization is improved.Type: GrantFiled: February 14, 1994Date of Patent: April 16, 1996Inventor: Troy J. Beukema