Patents by Inventor Troy J. Beukema

Troy J. Beukema has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8634786
    Abstract: Provision of gigabit-rate data transmission over wireless radio links, using carrier frequencies in the millimeter-wave range (>30 GHz). More specifically, a circuit for detection of amplitude-shift keyed (ASK) or other amplitude modulations (AM) which can be easily incorporated into an integrated circuit receiver system is described, making the receiver capable of supporting both complex IQ modulation schemes and simpler, non-coherent on-off or multiple-level keying signals. Several novel radio architectures are also described which, with the addition of a frequency discriminator network, have the capability of handling frequency shift keyed (FSK) or other frequency modulations (FM), as well as AM and complex IQ modulation schemes. These radio architectures support this wide variety of modulations by efficiently sharing detector hardware components.
    Type: Grant
    Filed: August 20, 2012
    Date of Patent: January 21, 2014
    Assignee: International Business Machines Corporation
    Inventors: Troy J. Beukema, Scott K. Reynolds
  • Patent number: 8599966
    Abstract: A data receiver, a method of operating a data receiver, and an integrated coupling system in a data receiver are disclosed. In one embodiment, the data receiver comprises an input terminal for receiving an input data signal, an input amplifier for amplifying selected components of the input data signal, and an input signal path for transmitting specified high-frequency components and a baseline component of the input data signal from the input terminal to the input amplifier. The data receiver further comprises a feed-forward resistive network connected to the input terminal and to the input amplifier. This feed forward resistive network is used to forward a low-frequency drift compensation signal from the input terminal to the input amplifier, using a passive resistive network, to compensate for low frequency variations in the input data signal, and to develop a desired bias voltage at the input amplifier.
    Type: Grant
    Filed: June 30, 2011
    Date of Patent: December 3, 2013
    Assignee: International Business Machines Corporation
    Inventors: Troy J. Beukema, Gautam Gangasani, Thomas H. Toifl
  • Patent number: 8543079
    Abstract: Provision of gigabit-rate data transmission over wireless radio links, using carrier frequencies in the millimeter-wave range (>30 GHz). More specifically, a circuit for detection of amplitude-shift keyed (ASK) or other amplitude modulations (AM) which can be easily incorporated into an integrated circuit receiver system is described, making the receiver capable of supporting both complex IQ modulation schemes and simpler, non-coherent on-off or multiple-level keying signals. Several novel radio architectures are also described which, with the addition of a frequency discriminator network, have the capability of handling frequency shift keyed (FSK) or other frequency modulations (FM), as well as AM and complex IQ modulation schemes. These radio architectures support this wide variety of modulations by efficiently sharing detector hardware components.
    Type: Grant
    Filed: August 20, 2012
    Date of Patent: September 24, 2013
    Assignee: International Business Machines Corporation
    Inventors: Troy J. Beukema, Scott K. Reynolds
  • Publication number: 20130215954
    Abstract: Analog signal current integrators are provided having tunable peaking functions. Analog signal current integrators with tunable peaking functions enable data rate dependent loss compensation for applications in high data rate receiver integrated circuits incorporating advanced equalization functions, such as decision-feedback equalizers. For instance, a current integrator circuit includes a current integrating amplifier circuit comprising an adjustable circuit element to tune a peaking response of the current integrator circuit, and a peaking control circuit to generate a control signal to adjust a value of the adjustable circuit element as a function of an operating condition of the current integrator circuit. The operating condition may be a specified data rate or a communication channel characteristic or both. The adjustable circuit element may be a degeneration capacitor or a bias current source.
    Type: Application
    Filed: February 17, 2012
    Publication date: August 22, 2013
    Applicant: International Business Machines Corporation
    Inventors: Troy J. Beukema, John F. Bulzacchelli
  • Patent number: 8401135
    Abstract: A serial data receiver includes an amplitude path including a first signal conditioner that adds a first offset or subtracts a second offset based on a selection input, a preamp configured to receive a signal from a transmitter and provide an input signal to the amplitude path, an amplitude latch coupled to the amplitude path, a data latch having a data output and a decision feedback equalization (DFE) logic block coupled to the first conditioning element and the data output and configured to generate the selection output based on the data output of the data latch.
    Type: Grant
    Filed: February 2, 2010
    Date of Patent: March 19, 2013
    Assignee: International Business Machines Corporation
    Inventors: Troy J. Beukema, William R. Kelly, Michael A. Sorna, Daniel W. Storaska
  • Publication number: 20130045701
    Abstract: Provision of gigabit-rate data transmission over wireless radio links, using carrier frequencies in the millimeter-wave range (>30 GHz). More specifically, a circuit for detection of amplitude-shift keyed (ASK) or other amplitude modulations (AM) which can be easily incorporated into an integrated circuit receiver system is described, making the receiver capable of supporting both complex IQ modulation schemes and simpler, non-coherent on-off or multiple-level keying signals. Several novel radio architectures are also described which, with the addition of a frequency discriminator network, have the capability of handling frequency shift keyed (FSK) or other frequency modulations (FM), as well as AM and complex IQ modulation schemes. These radio architectures support this wide variety of modulations by efficiently sharing detector hardware components.
    Type: Application
    Filed: August 20, 2012
    Publication date: February 21, 2013
    Applicant: International Business Machines Corporation
    Inventors: Troy J. Beukema, Scott K. Reynolds
  • Publication number: 20130044837
    Abstract: Provision of gigabit-rate data transmission over wireless radio links, using carrier frequencies in the millimeter-wave range (>30 GHz). More specifically, a circuit for detection of amplitude-shift keyed (ASK) or other amplitude modulations (AM) which can be easily incorporated into an integrated circuit receiver system is described, making the receiver capable of supporting both complex IQ modulation schemes and simpler, non-coherent on-off or multiple-level keying signals. Several novel radio architectures are also described which, with the addition of a frequency discriminator network, have the capability of handling frequency shift keyed (FSK) or other frequency modulations (FM), as well as AM and complex IQ modulation schemes. These radio architectures support this wide variety of modulations by efficiently sharing detector hardware components.
    Type: Application
    Filed: August 20, 2012
    Publication date: February 21, 2013
    Applicant: International Business Machines Corporation
    Inventors: Troy J. Beukema, Scott K. Reynolds
  • Publication number: 20130045702
    Abstract: Provision of gigabit-rate data transmission over wireless radio links, using carrier frequencies in the millimeter-wave range (>30 GHz). More specifically, a circuit for detection of amplitude-shift keyed (ASK) or other amplitude modulations (AM) which can be easily incorporated into an integrated circuit receiver system is described, making the receiver capable of supporting both complex IQ modulation schemes and simpler, non-coherent on-off or multiple-level keying signals. Several novel radio architectures are also described which, with the addition of a frequency discriminator network, have the capability of handling frequency shift keyed (FSK) or other frequency modulations (FM), as well as AM and complex IQ modulation schemes. These radio architectures support this wide variety of modulations by efficiently sharing detector hardware components.
    Type: Application
    Filed: August 20, 2012
    Publication date: February 21, 2013
    Applicant: International Business Machines Corporation
    Inventors: Troy J. Beukema, Scott K. Reynolds
  • Publication number: 20130002347
    Abstract: A data receiver, a method of operating a data receiver, and an integrated coupling system in a data receiver are disclosed. In one embodiment, the data receiver comprises an input terminal for receiving an input data signal, an input amplifier for amplifying selected components of the input data signal, and an input signal path for transmitting specified high-frequency components and a baseline component of the input data signal from the input terminal to the input amplifier. The data receiver further comprises a feed-forward resistive network connected to the input terminal and to the input amplifier. This feed forward resistive network is used to forward a low-frequency drift compensation signal from the input terminal to the input amplifier, using a passive resistive network, to compensate for low frequency variations in the input data signal, and to develop a desired bias voltage at the input amplifier.
    Type: Application
    Filed: June 30, 2011
    Publication date: January 3, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Troy J. Beukema, Gautam Gangasani, Thomas H. Toifl
  • Patent number: 8249542
    Abstract: This disclosure addresses providing gigabit-rate data transmission over wireless radio links, using carrier frequencies in the millimeter-wave range (>30 GHz). More specifically, a circuit for detection of amplitude-shift keyed (ASK) or other amplitude modulations (AM) which can be easily incorporated into an integrated circuit receiver system is described, making the receiver capable of supporting both complex IQ modulation schemes and simpler, non-coherent on-off or multiple-level keying signals. Several novel radio architectures are also described which, with the addition of a frequency discriminator network, have the capability of handling frequency shift keyed (FSK) or other frequency modulations (FM), as well as AM and complex IQ modulation schemes. These radio architectures support this wide variety of modulations by efficiently sharing detector hardware components.
    Type: Grant
    Filed: July 22, 2008
    Date of Patent: August 21, 2012
    Assignee: International Business Machines Corporation
    Inventors: Troy J. Beukema, Scott K. Reynolds
  • Patent number: 8139700
    Abstract: A system and method for closed loop clock correction includes adjusting two or more input signals comprising at least one in-phase clock and one quadrature clock, and applying adjusted quadrature clock signals to a device capable of generating a 4-quadrant interpolated output clock phase. An interpolated output clock phase is delayed to form a clock for a measurement device. Two or more adjusted input signals are measured on a measurement device over a range of interpolated output clock phases. Errors are determined on the in-phase clock and the quadrature clock using sampled information from the measurement device. The in-phase clock and the quadrature clock are adapted using determined error information.
    Type: Grant
    Filed: June 26, 2009
    Date of Patent: March 20, 2012
    Assignee: International Business Machines Corporation
    Inventors: Troy J. Beukema, Steven M. Clements, Chun-Ming Hsu, William R. Kelly, Elizabeth M. May, Sergey V. Rylov
  • Patent number: 8004441
    Abstract: A digital-to-analog (DAC) converter that includes a plurality of dynamically operated slave digital-to-analog (DAC) converters, each having a switched current mirror and a storage capacitor, and a static master digital-to-analog (DAC) converter in communication with the plurality of dynamically operated slave DAC converters, that distributes a current to at least one of the plurality of slave DAC converters such that voltage across the storage capacitor of the at least one slave DAC converter controls the switch current mirror so that the at least one slave DAC converter outputs currents that are equivalent to digital codes applied to the static master DAC converter. A ring counter is used to periodically refresh the charges on the storage capacitors that are lost by leakage. In addition to the periodic updates, an end user may perform immediate updates of selected slave DACs if necessary, via the ring counter.
    Type: Grant
    Filed: March 18, 2010
    Date of Patent: August 23, 2011
    Assignee: International Business Machines Corporation
    Inventors: Troy J. Beukema, Marcel A. Kossel, Thomas Toifl, Jonas Weiss
  • Publication number: 20110188566
    Abstract: A serial data receiver includes an amplitude path including a first signal conditioner that adds a first offset or subtracts a second offset based on a selection input, a preamp configured to receive a signal from a transmitter and provide an input signal to the amplitude path, an amplitude latch coupled to the amplitude path, a data latch having a data output and a decision feedback equalization (DFE) logic block coupled to the first conditioning element and the data output and configured to generate the selection output based on the data output of the data latch.
    Type: Application
    Filed: February 2, 2010
    Publication date: August 4, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Troy J. Beukema, William R. Kelly, Michael A. Sorna, Daniel W. Storaska
  • Publication number: 20100329403
    Abstract: A system and method for closed loop clock correction includes adjusting two or more input signals comprising at least one in-phase clock and one quadrature clock, and applying adjusted quadrature clock signals to a device capable of generating a 4-quadrant interpolated output clock phase. An interpolated output clock phase is delayed to form a clock for a measurement device. Two or more adjusted input signals are measured on a measurement device over a range of interpolated output clock phases. Errors are determined on the in-phase clock and the quadrature clock using sampled information from the measurement device. The in-phase clock and the quadrature clock are adapted using determined error information.
    Type: Application
    Filed: June 26, 2009
    Publication date: December 30, 2010
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Troy J. Beukema, Steven M. Clements, Chun-Ming Hsu, William R. Kelly, Elizabeth M. May, Sergey V. Rylov
  • Patent number: 7512395
    Abstract: This disclosure addresses providing gigabit-rate data transmission over wireless radio links, using carrier frequencies in the millimeter-wave range (>30 GHz). More specifically, a circuit for detection of amplitude-shift keyed (ASK) or other amplitude modulations (AM) which can be easily incorporated into an integrated circuit receiver system is described, making the receiver capable of supporting both complex IQ modulation schemes and simpler, non-coherent on-off or multiple-level keying signals. Several novel radio architectures are also described which, with the addition of a frequency discriminator network, have the capability of handling frequency shift keyed (FSK) or other frequency modulations (FM), as well as AM and complex IQ modulation schemes.
    Type: Grant
    Filed: January 31, 2006
    Date of Patent: March 31, 2009
    Assignee: International Business Machines Corporation
    Inventors: Troy J. Beukema, Scott K. Reynolds
  • Publication number: 20080280577
    Abstract: This disclosure addresses providing gigabit-rate data transmission over wireless radio links, using carrier frequencies in the millimeter-wave range (>30 GHz). More specifically, a circuit for detection of amplitude-shift keyed (ASK) or other amplitude modulations (AM) which can be easily incorporated into an integrated circuit receiver system is described, making the receiver capable of supporting both complex IQ modulation schemes and simpler, non-coherent on-off or multiple-level keying signals. Several novel radio architectures are also described which, with the addition of a frequency discriminator network, have the capability of handling frequency shift keyed (FSK) or other frequency modulations (FM), as well as AM and complex IQ modulation schemes. These radio architectures support this wide variety of modulations by efficiently sharing detector hardware components.
    Type: Application
    Filed: July 22, 2008
    Publication date: November 13, 2008
    Applicant: International Business Machines Corporation
    Inventors: Troy J. Beukema, Scott K. Reynolds
  • Patent number: 6393083
    Abstract: An apparatus and method for an improved hardware implementation of a digital phase shifter which provides a simplified process for phase correction of digital signals and eliminates the use of a lookup ROM and complex digital Multipliers. The digital phase shifter operates by applying a phase correction to complex digital I/Q samples in separate stages, where each stage performs a phase rotation by an amount specified directly by the binary values of an integer input phase. In one aspect, an apparatus for applying a phase shift to a complex digital signal comprises a plurality of phase shift stages each having a phase shift value associated therewith, whereby each of the plurality of phase shift stages selectively applies the corresponding phase shift value to the complex digital signal.
    Type: Grant
    Filed: July 31, 1998
    Date of Patent: May 21, 2002
    Assignee: International Business Machines Corporation
    Inventor: Troy J. Beukema
  • Patent number: 6243413
    Abstract: A modular home-networking communications system which uses a physical layer modulation scheme suitable for transmission in both RF and powerline communication channels. The modulation system is based on direct-sequence spread-spectrum (DS-SS) using Barker codes to spread the information symbols, which provides both operation at low signal to noise ratio and very good resistance to time dispersion distortion due to the excellent autocorrelation properties of the Barker codes. This type of modulation system is ideal for the powerline communications channel since it spreads the transmission power over a wide range of frequency, lowering the power spectral density enough that it will provide long distance coverage without violating FCC radiated emission and conducted power regulations.
    Type: Grant
    Filed: April 3, 1998
    Date of Patent: June 5, 2001
    Assignee: International Business Machines Corporation
    Inventor: Troy J. Beukema
  • Patent number: 5715240
    Abstract: A method determines the signal usability of an adjacent channel in a multi-cell communication system without the aid of synchronization symbols. In general, a three step search is used to arrive at the adjacent channel signal quality. The first step is a coarse timing phase search. This is accomplished through a signal quality estimates (606). The second step arrives at the optimum time phase by first interpolating (608) the received signal around the time phase selected in the first step to generate additional samples. After the interpolation (608), signal quality estimates are calculated (610) for the time phases immediately surrounding the time phase found in the first step. The optimum time phase corresponds to the maximum of these quality estimates. Finally, in the third step, the signal quality estimate is calculated for the optimum time phase. This provides the adjacent channel signal quality estimate desired.
    Type: Grant
    Filed: May 3, 1996
    Date of Patent: February 3, 1998
    Assignee: Motorola, Inc.
    Inventors: Jaime A. Borras, Steven C. Jasper, James P. Michels, Troy J. Beukema
  • Patent number: 5509034
    Abstract: A method and apparatus of frequency synchronization is described for a reference oscillator. Using a reference oscillator set to a first frequency, the process begins by scanning for a radio frequency carrier modulated with a predetermined pattern. The radio frequency carrier is located such that a received pattern comprising a frequency shifted version of the predetermined pattern is identified and time synchronization is established. The received pattern, the predetermined pattern, and stepped alterations to the first frequency are combined to provide a set of results that represent pattern correlation versus reference oscillator frequency. The first frequency is offset using the set of results, such that frequency synchronization is improved.
    Type: Grant
    Filed: February 14, 1994
    Date of Patent: April 16, 1996
    Inventor: Troy J. Beukema