Abstract: A method for fabricating metal gate transistor is disclosed. The method includes the steps of: providing a substrate, wherein the substrate comprises a transistor region defined thereon; forming a gate insulating layer on the substrate; forming a stacked film on the gate insulating layer, wherein the stacked film comprises at least one etching stop layer, a polysilicon layer, and a hard mask; patterning the gate insulating layer and the stacked film for forming a dummy gate on the substrate; forming a dielectric layer on the dummy gate; performing a planarizing process for partially removing the dielectric layer until reaching the top of the dummy gate; removing the polysilicon layer of the dummy gate; removing the etching stop layer of the dummy gate for forming an opening; and forming a conductive layer in the opening for forming a gate.

Abstract: A method of fabricating transistors includes: providing a substrate including an N-type well and P-type well; forming a first gate on the N-type well and a second gate on the P-type well, respectively; forming a third spacer on the first gate; forming an epitaxial layer in the substrate at two sides of the first gate; forming a fourth spacer on the second gate; forming a silicon cap layer covering the surface of the epitaxial layer and the surface of the substrate at two sides of the fourth spacer; and forming a first source/drain doping region and a second source/drain doping region at two sides of the first gate and the second gate respectively.

Abstract: A method for fabricating an ultra-high tensile-stressed nitride film is disclosed. A PECVD process is first performed to deposit a transitional silicon nitride film over a substrate. The transitional silicon nitride film has a first concentration of hydrogen atoms. The transitional silicon nitride film is subjected to UV curing process for reducing the first concentration of hydrogen atoms to a second concentration of hydrogen atoms.

Abstract: A metal-oxide-semiconductor (MOS) transistor device is disclosed. The MOS transistor device comprises a semiconductor substrate; a gate structure on the semiconductor substrate; source/drain regions on the semiconductor substrate adjacent to the gate structure; an ultra-high tensile-stressed nitride film having a hydrogen concentration of less than 1E22 atoms/cm3 covering the gate structure and the source/drain regions; and an inter-layer dielectric (ILD) film over the ultra-high tensile-stressed nitride film.

Abstract: A metal-oxide-semiconductor (MOS) transistor device is disclosed. The MOS transistor device comprises a semiconductor substrate; a gate structure on the semiconductor substrate; source/drain regions on the semiconductor substrate adjacent to the gate structure; an ultra-high tensile-stressed nitride film having a hydrogen concentration of less than 1E22 atoms/cm3 covering the gate structure and the source/drain regions; and an inter-layer dielectric (ILD) film over the ultra-high tensile-stressed nitride film.

Abstract: A method for fabricating an ultra-high tensile-stressed nitride film is disclosed. A PECVD process is first performed to deposit a transitional silicon nitride film over a substrate. The transitional silicon nitride film has a first concentration of hydrogen atoms. The transitional silicon nitride film is subjected to UV curing process for reducing the first concentration of hydrogen atoms to a second concentration of hydrogen atoms.

Abstract: A connector including pivoting parts at both ends of a locking part to be connected and pivoted to the main body of the connector. A through hole is installed at the corresponding location of a supporting arm of a terminal. A pivoting and rotating part is installed at the inner wall of said hole. The front end of the supporting arm of the terminal is installed with a through-hole-penetrating elastic compression part and a dented part accompanied with a pivoting, part. At the front end of the contact arm of the terminal is installed with a guiding arm. First and second protruding parts are installed respectively on the guiding arm allowing the elastic compression part and dented part to tightly compress the pivoting and rotating part of the locking part when the locking part is locked. The first protruding part and FPCB form a compressing and holding action to each other.

Abstract: A process for fabricating electrodes for the capacitor dielectric of semiconductor memory devices with low leakage current characteristics is disclosed. The process comprises the steps of first depositing a titanium oxide film over a semiconductor silicon substrate. The deposited titanium oxide film is then annealed. A layer of tungsten nitride top electrode is then deposited on the annealed titanium oxide film. A second annealing procedure is then conducted to simulate post electrode high temperature process.

Abstract: Composite TiO.sub.2 /Ta.sub.2 O.sub.5 films by in-situ sequential CVD deposition are presented for a storage capacitor of a three-dimensional cell in DRAM applications. The capacitor with the Ta.sub.2 O.sub.5 /TiO.sub.2 /Ta.sub.2 O.sub.5 alternating layer structure has comparable leakage current density and higher capacitance per unit area as compared to a capacitor with Ta.sub.2 O.sub.5 and TiO.sub.2 single layer structures.

Abstract: A connector contact mounting hardware includes an elongated strip of contact holder frame having pairs of notched upright wings on two opposite sides, and a plurality of contacts respectively made of a round wire rod and retained in respective retaining notches on either pair of upright wings, each contact having a front contact body extended out of either upright wing on one side for plating with gold, a notched tail extended out of a corresponding upright wing on an opposite side for plating with tin and for mounting a conductor, and a dovetial-like lower portion between the front contact body and the notched tail.