Abstract: A display panel includes a plurality of sub-pixel structures and a plurality of transfer elements. The sub-pixel structures include a plurality of first sub-pixel structures. A data line of each of the first sub-pixel structures is disposed adjacent to a corresponding transfer element, and a scan line of each of the first sub-pixel structures is electrically connected to the corresponding transfer element. The first sub-pixel structures include a plurality of first-type sub-pixel structures and a plurality of second-type sub-pixel structures. When the display panel displays a grayscale picture, each of the first-type sub-pixel structures has first brightness, each of the second-type sub-pixel structures has second brightness. The first brightness is less than the second brightness. A total number of the first sub-pixel structures of the display panel is A, a number of the first-type sub-pixel structures in the first sub-pixel structures is a, and 50%<(a/A)<100%.

Abstract: A pixel array substrate includes data lines, first gate lines, pixel structures, first common lines, and conductive line sets. The conductive line sets are arranged in a first direction. Each of the conductive line sets includes first conductive line groups and a second conductive line group sequentially arranged in the first direction. Each of the first conductive line groups includes second gate lines and a second common line. The second conductive line group includes first auxiliary lines and a second common line. An arrangement order of the second gate lines and the second common line of each of the first conductive line groups in the first direction are the same as an arrangement order of the first auxiliary lines and the second common line of the second conductive line group in the first direction, respectively.

Abstract: An antenna system is on a first conductor, spaced apart from a second conductor and includes a first dielectric substrate, and a first metal layer and a second metal layer. Many first conductive structures are connected to the first metal layer and the second conductor. Many second conductive structures are connected to the first metal layer and the second metal layer. A second dielectric substrate includes a third horizontal surface, a first vertical surface and a second vertical surface. A frequency adjustment portion is on the third horizontal surface. A first matching portion and a second matching portion are on the second vertical surface. A first coupling distance is between the first matching portion and the first metal layer. A second coupling distance is between the second matching portion and the first metal layer. A signal source is connected to the second matching portion and the second metal layer.

Abstract: A display apparatus including data lines, first gate lines, pixel structures, second gate lines, and first common lines is provided. The data lines are arranged in a first direction. The first gate lines are arranged in a second direction. The data lines and the second gate lines are arranged in the first direction, and the second gate lines are electrically connected to the first gate lines. The pixel structures are arranged in pixel columns which are arranged in the first direction. Each of the first common lines and the corresponding second gate line are configured between two adjacent pixel columns. The first common line and the corresponding second gate line are configured respectively on the opposite sides of the first gate line which is electrically connected to the corresponding second gate line. The first common line and the corresponding second gate line are structurally separated.

Abstract: A pixel array substrate, including gate elements and transfer elements, is provided. The gate elements include an n-th gate element and an m-th gate element. The transfer elements include a n-th transfer element and an m-th transfer element electrically connected to the n-th gate element and the m-th gate element respectively. A peripheral portion of each of the transfer elements includes a first straight section. A peripheral portion of the n-th transfer element further includes a first lateral section. The first lateral section of the n-th transfer element and the first straight section of the n-th transfer element respectively belong to a first conductive layer and a second conductive layer. A peripheral portion of the m-th transfer element crosses over the first lateral section of the peripheral portion of the n-th transfer element.

Abstract: A touchpad module includes a touch member, a bracket, a piezoelectric vibration unit and an elastic element. The bracket is located under the touch member. A portion of the touch member is exposed to a first perforation of the bracket. The piezoelectric vibration unit is aligned with the first perforation of the bracket. The piezoelectric vibration unit has a first surface and a second surface, which are opposed to each other. The elastic element installed on the bracket and contacted with the second surface of the piezoelectric vibration unit. When the piezoelectric vibration unit vibrates, a first reaction force is generated between the first surface of the piezoelectric vibration unit and the portion of the touch member exposed to the first perforation, and a second reaction force is generated between the second surface of the piezoelectric vibration unit and the elastic element.

Abstract: A power supply apparatus is coupled to an AC power source, a critical load, and a general load. The power supply apparatus includes a UPS, a generator system, a power conversion system, and a controller. The power conversion system includes a first power conversion path and a second power conversion path. The first power conversion path is connected to the critical load and an output side, and the second power conversion path is connected to the general load and an input side. The first power conversion path and the second power conversion path are jointly connected to a DC bus. When the controller determines that the AC power source is abnormal, the controller controls disconnecting the AC power source, and activates the UPS to supply power to the critical load so as to enable the first power conversion path and disable the second power conversion path.

Abstract: An electronic device including a substrate, transversal signal lines, a first vertical signal line, a second vertical signal line, and a first shielding vertical line is provided. The transversal signal lines, the first vertical signal line, the second vertical signal line, and the first shielding vertical line are disposed on the substrate. The first vertical signal line and the second vertical signal line are intersected with the transversal signal lines. The second vertical signal line is connected to one of the transversal signal lines. An orthogonal projection of the first shielding vertical line on the substrate is between an orthogonal projection of the first vertical signal line on the substrate and an orthogonal projection of the second vertical signal line on the substrate.

Abstract: A display panel including sub-pixels, first and second scan lines, first and second data lines, and first to fourth auxiliary lines is provided. The sub-pixels are arranged into first rows arranged in a first direction and second rows arranged in a second direction. Each third auxiliary line is electrically connected to a second auxiliary line and a first auxiliary line electrically connected to a first scan line. Each fourth auxiliary line is electrically connected to a second scan line and a first scan line. There are at least 2n second rows between each third auxiliary line and the first scan line electrically connected thereto, there are at least 2n+1 second rows between each third auxiliary line and the second scan line electrically connected thereto, and n is a positive integer.

Abstract: A network system includes P upper switches, Q lower switches, and a first mapping device. Each upper switch of the P upper switches includes a plurality of upper ports. A group of upper switches selected from the P upper switches includes P1 upper switches. Each lower switch of the Q lower switches includes a plurality of upper ports. The first mapping device includes P1 upper adapter terminals coupled to a part of upper ports of the P1 upper switches, and P1 lower adapter terminals coupled to lower ports of a part of Q lower switches. The first mapping device is used for allocating a plurality of transmitting channels and receiving channels received by each upper adapter terminal to the P1 lower adapter terminals.

Abstract: A pixel array substrate includes a substrate, a plurality of data lines, a plurality of scan lines, a plurality of sub-pixels, and a first and a second auxiliary lines. The plurality of sub-pixels are arranged into first rows arranged in a first direction and second rows arranged in a second direction. The first auxiliary line and the plurality of scan lines belong to a first conductive layer. The second auxiliary line and the plurality of data lines belong to a second conductive layer. The first auxiliary line is located between two scan lines. A first end of the first auxiliary line is connected to one of the two scan lines. A second end of the first auxiliary line is separated from the other one of the two scan lines. The second auxiliary line is electrically connected to the first auxiliary line at the second end through a conductive via.

Abstract: An automatic heating vending machine including a storage space, a storage mechanism, a fetching mechanism, a gripping arm mechanism, a rotating disc mechanism and a heating mechanism are disclosed. The storage mechanism is installed in the storage space to store food. The fetching mechanism is installed in the storage space and disposed under the storage mechanism to catch the food. The gripping arm mechanism grips the food on the fetching mechanism. The rotating disc mechanism is disposed on one side of the gripping arm mechanism. The gripping arm mechanism grips the food and then places the food on the rotating disc mechanism. The heating mechanism is disposed above the rotating disc mechanism. After the food has been placed on the rotating disc mechanism, the rotating disc mechanism undergoes horizontal movement and vertical movement, allowing the food to be admitted to the heating mechanism and heated.

Abstract: A fingerprint-recognition function in a backlit display device includes a cover plate, a display panel, a backlight module, and a fingerprint recognition module. The cover plate has an operating surface defining a touchable fingerprint identification area. The backlight module emits light for the display panel to display images and, as a first detection light, backlighting incident on the fingerprint identification area reflected by a fingerprint is taken and recognized by the recognition module. Along a thickness direction of the display device, a projection of the fingerprint identification module on the cover plate at least partially overlaps with the fingerprint identification area, and supplementary side-mounted sources emitting non-visible light enhance the accuracy of detection of the recognition module.

Abstract: When a driving circuit of an anti-fuse memory device programs a selected anti-fuse memory cell, voltage differences between unselected bit lines and unselected anti-fuse control lines would be eliminated or decreased to an acceptable value by floating unselected anti-fuse control lines or by applying a second control line voltage to the unselected anti-fuse control lines. Leakage currents flowing from unselected bit lines through ruptured anti-fuse transistors of the anti-fuse memory device to the unselected anti-fuse control lines would be decreased or eliminated, and program disturbance would be avoided.

Abstract: A display panel including sub pixels, a plurality of first and second scan lines, a plurality of first and second data lines, a plurality of first and second auxiliary lines and first conductive vias is provided. The sub pixels are arranged into first rows arranged in a first direction and second rows arranged in a second direction. The second rows are electrically connected to the first and second scan lines in alternation and are electrically connected to the first and second data lines in alternation. Each first auxiliary line includes a first portion electrically connected to a corresponding first scan line and a second portion spaced away from the first portion. The second auxiliary lines are respectively located between two adjacent first rows. Each second scan line is electrically connected to a corresponding first scan line through at least one second auxiliary line.

Abstract: An electronic device including a substrate, transversal signal lines, a first vertical signal line, a second vertical signal line, and a first shielding vertical line is provided. The transversal signal lines, the first vertical signal line, the second vertical signal line, and the first shielding vertical line are disposed on the substrate. The first vertical signal line and the second vertical signal line are intersected with the transversal signal lines. The second vertical signal line is connected to one of the transversal signal lines. An orthogonal projection of the first shielding vertical line on the substrate is between an orthogonal projection of the first vertical signal line on the substrate and an orthogonal projection of the second vertical signal line on the substrate.

Abstract: A pixel array substrate including a substrate, data lines, gate lines, pixels, and transfer lines is provided. The data lines are disposed on the substrate and arranged in a first direction. The gate lines are disposed on the substrate and arranged in a second direction interlaced with the first direction. The pixels are disposed on the substrate, each of which includes an active device electrically connected to one of the data lines and one of the gate lines and a pixel electrode electrically connected to the active device. The transfer lines are arranged in the first direction and electrically connected to the gate lines, respectively. The pixels include first pixels. In a top view of the pixel array substrate, at least one of the pixel electrodes of the first pixels is partially overlapped with one of the transfer lines. A driving method of a pixel array substrate is also provided.

Abstract: The disclosure provides a single antenna system comprising a ground element, a feeding metal part, at least one shorting metal part, a radiating metal part, a decoupling circuit, a first feed source, and a second feed source. The single antenna system with an integrated decoupled circuit not only effectively achieves size reduction, but achieve high antenna isolation. Moreover, the single antenna system is applied for narrow-bezel notebooks and small-size antenna systems in future.

Abstract: A pixel array substrate, including scanning line pads, data line pads, scanning lines, data lines, gate transmission lines, pixels, a data line signal chip, and a scanning line signal chip, is provided. The scanning lines extend along a first direction. The data lines and the gate transmission lines extend along a second direction. The data lines are electrically connected to the data line pads. The scanning lines are electrically connected to the scanning line pads through the gate transmission lines. A ratio of a number of rows of pixels arranged in the first direction to a number of rows of pixels arranged in the second direction is X:Y. Each pixel includes m sub-pixels.

Abstract: A pixel array substrate, including scanning line pads, data line pads, scanning lines, data lines, gate transmission lines, pixels, a data line signal chip, and a scanning line signal chip, is provided. The scanning lines extend along a first direction. The data lines and the gate transmission lines extend along a second direction. The data lines are electrically connected to the data line pads. The scanning lines are electrically connected to the scanning line pads through the gate transmission lines. A ratio of a number of rows of pixels arranged in the first direction to a number of rows of pixels arranged in the second direction is X:Y. Each pixel includes m sub-pixels.