Patents by Inventor Tsjerk Hans Hoekstra
Tsjerk Hans Hoekstra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11899254Abstract: A photonic integrated circuit including an InP-based substrate that is provided with a first InP-based optical waveguide and a neighboring second InP-based optical waveguide, a dielectric planarization layer that is arranged at least between the first optical waveguide and the second optical waveguide. At least between the first optical waveguide and the neighboring second optical waveguide, the dielectric planarization layer is provided with a recess that is arranged to reduce or prevent optical interaction between the first optical waveguide and the second optical waveguide via the dielectric planarization layer. At the location of the recess, the dielectric planarization layer has a first sidewall that is arranged sloped towards the first optical waveguide, and a second sidewall that is arranged sloped towards the second optical waveguide. An opto-electronic system including said PIC.Type: GrantFiled: March 16, 2022Date of Patent: February 13, 2024Assignee: EFFECT PHOTONICS B.V.Inventor: Tsjerk Hans Hoekstra
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Publication number: 20230280529Abstract: A PIC including a plurality of optically interconnectable functional photonic blocks and a reconfigurable optical connection arrangement having a plurality of semiconductor-based optical waveguides and a plurality of controllable optical switches, at least one controllable optical switch being configurable to be in a first state allowing optical transmission or a second state preventing optical transmission. Depending on the respective first or second state of the at least one controllable optical switch, the optical connection arrangement is configured to enable at least a first set of semiconductor-based optical waveguides to provide at least one optical connection between at least two functional photonic blocks and/or a first optical access path to at least one functional photonic block. An opto-electronic system including the PIC and to a method of improved determination of an overall performance of the PIC.Type: ApplicationFiled: March 1, 2023Publication date: September 7, 2023Inventors: Sian Chong Jeffrey LEE, Tim KOENE, Tsjerk Hans HOEKSTRA, Niall Patrick KELLY, Emil KLEIJN
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Patent number: 11714230Abstract: An environmentally protected PIC, including an InP-based substrate having a first surface that is at least partially provided with an InP-based optical waveguide, and a dielectric protective layer arranged to cover at least the first surface of the InP-based substrate and the InP-based optical waveguide. The dielectric protective layer is configured to protect said PIC from environmental contaminants, to enable confinement of optical radiation in the dielectric protective layer in at least one direction that is transverse to a direction of propagation of the optical radiation, and to allow exchange of the optical radiation between the InP-based optical waveguide and the dielectric protective layer. An opto-electronic system including PIC.Type: GrantFiled: December 3, 2021Date of Patent: August 1, 2023Assignee: EFFECT PHOTONICS B.V.Inventor: Tsjerk Hans Hoekstra
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Publication number: 20220308298Abstract: A photonic integrated circuit including an InP-based substrate that is provided with a first InP-based optical waveguide and a neighboring second InP-based optical waveguide, a dielectric planarization layer that is arranged at least between the first optical waveguide and the second optical waveguide. At least between the first optical waveguide and the neighboring second optical waveguide, the dielectric planarization layer is provided with a recess that is arranged to reduce or prevent optical interaction between the first optical waveguide and the second optical waveguide via the dielectric planarization layer. At the location of the recess, the dielectric planarization layer has a first sidewall that is arranged sloped towards the first optical waveguide, and a second sidewall that is arranged sloped towards the second optical waveguide. An opto-electronic system including said PIC.Type: ApplicationFiled: March 16, 2022Publication date: September 29, 2022Inventor: Tsjerk Hans HOEKSTRA
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Publication number: 20220199553Abstract: An environmentally protected photonic integrated circuit, PIC, including an indium phosphide-based substrate that is at least partially covered with an epitaxial semiconductor layer. The InP-based substrate and/or the epitaxial layer are covered with a layer stack comprising different non-semiconductor layers. At least a first layer of the layer stack is provided with a through-hole that is arranged at a predetermined location. The InP-based substrate or epitaxial layer being accessible via the through-hole. The PIC including a dielectric protective layer covering the layer stack thereby provides a mechanical coupling structure. The protective layer is configured to protect the PIC from environmental contaminants. An opto-electronic system including the PIC.Type: ApplicationFiled: December 3, 2021Publication date: June 23, 2022Inventor: Tsjerk Hans HOEKSTRA
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Publication number: 20220196910Abstract: An environmentally protected PIC, including an InP-based substrate having a first surface that is at least partially provided with an InP-based optical waveguide, and a dielectric protective layer arranged to cover at least the first surface of the InP-based substrate and the InP-based optical waveguide. The dielectric protective layer is configured to protect said PIC from environmental contaminants, to enable confinement of optical radiation in the dielectric protective layer in at least one direction that is transverse to a direction of propagation of the optical radiation, and to allow exchange of the optical radiation between the InP-based optical waveguide and the dielectric protective layer. An opto-electronic system including PIC.Type: ApplicationFiled: December 3, 2021Publication date: June 23, 2022Inventor: Tsjerk Hans HOEKSTRA
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Patent number: 11174150Abstract: There is provided a flexible membrane for use in a microelectromechanical transducer, the flexible membrane comprising an electromagnetic waveguide. There is further provided a microelectromechanical system comprising a substrate which comprises the flexible membrane, and a process for forming the flexible membrane. The flexible membrane may be configured to operate within an optical microphone system.Type: GrantFiled: January 16, 2018Date of Patent: November 16, 2021Assignee: Cirrus Logic, Inc.Inventor: Tsjerk Hans Hoekstra
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Patent number: 10750291Abstract: The application describes MEMS transducers having a patterned membrane electrode which incorporates a plurality of openings or voids. A conductive element is provided on the surface of the underlying membrane within the opening.Type: GrantFiled: May 23, 2018Date of Patent: August 18, 2020Assignee: Cirrus Logic, Inc.Inventors: Marek Sebastian Piechocinski, Richard Ian Laming, Tsjerk Hans Hoekstra, Colin Robert Jenkins, Axel Thomsen
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Patent number: 10623868Abstract: The application describes MEMS transducers having a patterned membrane electrode which incorporates a plurality of openings or voids. At least a portion of the peripheral edge of the opening is provided with a plurality of discontinuities e.g. projections and recesses which extend within the plane of the membrane electrode.Type: GrantFiled: May 23, 2018Date of Patent: April 14, 2020Assignee: Cirrus Logic, Inc.Inventor: Tsjerk Hans Hoekstra
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Patent number: 10560784Abstract: A MEMS capacitive transducer with increased robustness and resilience to acoustic shock. The transducer structure includes a flexible membrane supported between a first volume and a second volume, and at least one variable vent structure in communication with at least one of the first and second volumes. The variable vent structure includes at least one moveable portion which is moveable in response to a pressure differential across the moveable portion so as to vary the size of a flow path through the vent structure. The variable vent may be formed through the membrane and the moveable portion may be a part of the membrane, defined by one or more channels, that is deflectable away from the surface of the membrane. The variable vent is preferably closed in the normal range of pressure differentials but opens at high pressure differentials to provide more rapid equalisation of the air volumes above and below the membrane.Type: GrantFiled: June 17, 2019Date of Patent: February 11, 2020Assignee: Cirrus Logic, Inc.Inventors: Colin Robert Jenkins, Tsjerk Hans Hoekstra, Euan James Boyd
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Patent number: 10477322Abstract: The application describes a MEMS transducer comprising: a substrate; a primary membrane supported in a fixed relation relative to the substrate and a secondary membrane provided in a plane overlying the primary membrane. The secondary membrane is mechanically coupled to the primary membrane by a substantially rigid coupling structure. A rigid support plate may be interposed between the primary and secondary membranes.Type: GrantFiled: September 19, 2017Date of Patent: November 12, 2019Assignee: Cirrus Logic, Inc.Inventors: Aleksey Sergeyevich Khenkin, Tsjerk Hans Hoekstra
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Publication number: 20190306630Abstract: A MEMS capacitive transducer with increased robustness and resilience to acoustic shock. The transducer structure includes a flexible membrane supported between a first volume and a second volume, and at least one variable vent structure in communication with at least one of the first and second volumes. The variable vent structure includes at least one moveable portion which is moveable in response to a pressure differential across the moveable portion so as to vary the size of a flow path through the vent structure. The variable vent may be formed through the membrane and the moveable portion may be a part of the membrane, defined by one or more channels, that is deflectable away from the surface of the membrane. The variable vent is preferably closed in the normal range of pressure differentials but opens at high pressure differentials to provide more rapid equalisation of the air volumes above and below the membrane.Type: ApplicationFiled: June 17, 2019Publication date: October 3, 2019Inventors: Colin Robert Jenkins, Tsjerk Hans Hoekstra, Euan James Boyd
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Publication number: 20190297428Abstract: A wafer for use in fabricating a plurality of individual transducer devices comprises a bracing structure for partitioning the wafer into a plurality of regions, and a plurality of transducer devices fabricated in one or more of the plurality of regions.Type: ApplicationFiled: June 30, 2016Publication date: September 26, 2019Applicant: Cirrus Logic International Semiconductor Ltd.Inventors: Marek Sebastian PIECHOCINSKI, Tsjerk Hans HOEKSTRA
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Patent number: 10375481Abstract: A MEMS capacitive transducer with increased robustness and resilience to acoustic shock. The transducer structure includes a flexible membrane supported between a first volume and a second volume, and at least one variable vent structure in communication with at least one of the first and second volumes. The variable vent structure includes at least one moveable portion which is moveable in response to a pressure differential across the moveable portion so as to vary the size of a flow path through the vent structure. The variable vent may be formed through the membrane and the moveable portion may be a part of the membrane, defined by one or more channels, that is deflectable away from the surface of the membrane. The variable vent is preferably closed in the normal range of pressure differentials but opens at high pressure differentials to provide more rapid equalisation of the air volumes above and below the membrane.Type: GrantFiled: August 1, 2017Date of Patent: August 6, 2019Assignee: Cirrus Logic, Inc.Inventors: Colin Robert Jenkins, Tsjerk Hans Hoekstra, Euan James Boyd
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Patent number: 10343894Abstract: The application describes a MEMS transducer comprising a layer of conductive material provided on a surface of a layer of membrane material. The layer of conductive material comprises first and second regions, wherein the thickness and/or the conductivity of the/each first and second regions is different.Type: GrantFiled: August 14, 2017Date of Patent: July 9, 2019Assignee: Cirrus Logic, Inc.Inventors: Stephen Duffy, Colin Robert Jenkins, Tsjerk Hans Hoekstra
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Patent number: 10266394Abstract: A MEMS transducer package (300) comprises a package cover (313) comprising a first bonding region (316) and an integrated circuit die (319) comprising a second bonding region (314) for bonding with the first bonding region of the package cover. The integrated circuit die (309) comprises an integrated MEMS transducer (311) and integrated electronic circuitry (312) in electrical connection with the integrated MEMS transducer. The footprint of the integrated electronic circuitry (312) at least overlaps the bonding region (314) of the integrated circuit die (309).Type: GrantFiled: January 27, 2017Date of Patent: April 23, 2019Assignee: Cirrus Logic, Inc.Inventor: Tsjerk Hans Hoekstra
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Publication number: 20190047848Abstract: The application describes an assembly for a MEMS transducer comprising a substrate and a membrane, wherein the membrane is formed so as to have a curved surface region.Type: ApplicationFiled: August 1, 2018Publication date: February 14, 2019Applicant: Cirrus Logic International Semiconductor Ltd.Inventor: Tsjerk Hans HOEKSTRA
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Publication number: 20190047847Abstract: A MEMS transducer configured to operate as a microphone, the MEMS transducer comprising a flexible membrane, the flexible membrane having a first surface and a second surface, wherein the first surface of the flexible membrane is fluidically isolated from the second surface of the flexible membrane. Also, a MEMS device comprising a MEMS transducer, an electronic device comprising a MEMS transducer and/or a MEMS device, and a method for forming a MEMS device.Type: ApplicationFiled: August 1, 2018Publication date: February 14, 2019Applicant: Cirrus Logic International Semiconductor Ltd.Inventors: Aleksey Sergeyevich KHENKIN, Tsjerk Hans HOEKSTRA, Colin Robert Jenkins
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Publication number: 20180352339Abstract: The application describes MEMS transducers having a patterned membrane electrode which incorporates a plurality of openings or voids. A conductive element is provided on the surface of the underlying membrane within the opening.Type: ApplicationFiled: May 23, 2018Publication date: December 6, 2018Applicant: Cirrus Logic International Semiconductor Ltd.Inventors: Marek Sebastian PIECHOCINSKI, Richard Ian LAMING, Tsjerk Hans HOEKSTRA, Colin Robert JENKINS, Axel THOMSEN
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Publication number: 20180352340Abstract: The application describes MEMS transducers having a patterned membrane electrode which incorporates a plurality of openings or voids. At least a portion of the peripheral edge of the opening is provided with a plurality of discontinuities e.g. projections and recesses which extend within the plane of the membrane electrode.Type: ApplicationFiled: May 23, 2018Publication date: December 6, 2018Applicant: Cirrus Logic International Semiconductor Ltd.Inventor: Tsjerk Hans HOEKSTRA