Abstract: An electrode structure of rechargeable battery includes a battery tab stack, an electrode lead, a welding protective layer and a welding seam. The battery tab stack is formed by extension of a plurality of electrode sheets. The electrode lead is joined to one side of the battery tab stack. The welding protective layer is joined to another side of the battery tab stack opposite to the electrode lead. The welding seam extends from the welding protective layer to the electrode lead through the battery tab stack.

Abstract: A display panel including a circuit board, a plurality of bonding pads, a plurality of light emitting devices, and a plurality of solder patterns is provided. The bonding pads are disposed on the circuit board, and each includes a first metal layer and a second metal layer. The second metal layer is located between the first metal layer and the circuit board. The first metal layer includes an opening overlapping the second metal layer. A material of the first metal layer is different from a material of the second metal layer. The light emitting devices are electrically bonded to the bonding pads. Each of the solder patterns electrically connects one of the light emitting devices and one of the bonding pads. The solder patterns each contact the second metal layer through the opening of the first metal layer of one of the bonding pads to form a eutectic bonding.

Abstract: A display device includes: a substrate having display and non-display areas; a first conductive layer including first and second sub-conductive lines; a second conductive layer including third and fourth sub-conductive lines, wherein, in the display area, the first sub-conductive line and the third sub-conductive lines cross from a top view; and a third conductive layer including third conductive lines and corresponding to the non-display area; wherein, corresponding to the non-display area, a portion of a projection of the one of the third conductive lines is overlapped with a portion of a projection of the second sub-conductive line on the substrate, and another portion of the projection of the one of the third conductive lines is overlapped with a portion of a projection of the fourth sub-conductive line on the substrate.

Abstract: The present invention provides a receiver including an RF circuit, a correlator and a signal delay estimator. The RF circuit is configured to receive a first satellite signal and a second satellite signal to generate a first base-band signal and a second base-band signal, respectively. The correlator is configured to use a first local signal to integrate with the first base-band signal to generate a first correlation result, and to use a second local signal to integrate with the second base-band signal to generate a second correlation result. The signal delay estimator is coupled to the correlator, and is configured to use the second correlation result to compensate the first correlation result to generate a compensated first correlation result, and determine a signal delay of the first satellite signal according to the compensated first correlation result.

Abstract: A correlation computation method includes: performing, by a grouping circuit, a grouping operation upon a data sequence according to an in-phase code sequence and a quadrature code sequence, wherein the data sequence is derived from a quadrature phase shift keying (QPSK) modulated signal; performing at least one accumulation operation upon data samples categorized into at least one data sample group by the grouping operation, to generate at least one accumulation result; and deriving a correlation value between the data sequence and both of the in-phase code sequence and the quadrature code sequence from the at least one accumulation result.

Abstract: An electronic device is provided. The electronic device includes a panel, a detection system, and a test loop. The test loop is electrically connected to the panel and the detection system. The detection system includes a detection unit and a controller. The detection unit detects a signal transmitted by the test loop, and provides a detection result to the controller.

Abstract: An electronic device includes: a substrate, a signal line, a detection line and a detection unit. The substrate has a peripheral area and a substrate edge. The signal line is disposed on the substrate, and the signal line is located in the peripheral area. The detection line is disposed on the substrate, and is adjacent to the signal line. The detection unit is electrically connected to the detection line. Wherein, the detection line is disposed between the signal line and the substrate edge, and the detection line and the signal line are electrically insulated.

Abstract: A correlation computation method includes: obtaining a plurality of code sequences; performing, by a transformation circuit, a bit-wise combination with transformation upon the plurality of code sequences to generate a composite code sequence; and generating a correlation value between a data sequence and the composite code sequence.

Abstract: A touch electronic device is provided, which includes: a substrate; a plurality of data fan-out lines disposed on the substrate; a plurality of first data pads disposed on the substrate; a plurality of touch fan-out lines disposed on the substrate; and a plurality of first touch pads disposed on the substrate, wherein one of the plurality of data fan-out lines is electrically connected to one of the plurality of first data pads, one of the plurality of touch fan-out lines is electrically connected to one of the plurality of first touch pads, and any of the plurality of data fan-out lines and any of the touch fan-out lines are not overlapped in a top view direction of the substrate.

Abstract: A correlation computation method includes: obtaining a first sum of all data samples included in a data sequence; obtaining a second sum of selected data samples that are selected from the data sequence according to code bits included in a first code sequence; and deriving, by a processing circuit, a first correlation value between the data sequence and the first code sequence from the first sum and the second sum.

Abstract: The technology described herein is directed to a DC input power supply unit with an auxiliary boost control circuit (or controller) that facilitates continuous supply of power to a standby output load of the power supply unit in a bootloader mode. More specifically, the auxiliary boost circuit (or controller) is configured to assume control of a primary power boost stage from a primary controller in a bootloader mode so that the power supply unit can continue to supply power to the standby output with a protection function regardless of the state of the power supply unit or primary controller.

Abstract: A display device includes: a substrate having display and non-display areas; a first conductive layer including first and second sub-conductive lines; a second conductive layer including third and fourth sub-conductive lines, wherein, in the display area, the first sub-conductive line and the third sub-conductive lines cross from a top view; and a third conductive layer including third conductive lines and corresponding to the non-display area; wherein, corresponding to the non-display area, a portion of a projection of the one of the third conductive lines is overlapped with a portion of a projection of the second sub-conductive line on the substrate, and another portion of the projection of the one of the third conductive lines is overlapped with a portion of a projection of the fourth sub-conductive line on the substrate.

Abstract: A power generation device includes a housing, chambers, and conductive fillers. The housing has a rotation axis. The chambers surround the rotation axis and located inside the housing. The conductive fillers respectively filled in the chambers. The chambers include electrodes. The electrodes are located on the chambers and in contact with the conductive fillers.

Abstract: A semiconductor chip includes a first wireless communication circuit, a local oscillator (LO) buffer, and an auxiliary path. The first wireless communication circuit has a signal path, wherein the signal path has a mixer input port and a signal node distinct from the mixer input port. The auxiliary path is used to electrically connect the LO buffer to the signal node of the signal path. The LO buffer is reused for a transmit (TX) function through the auxiliary path.

Abstract: A semiconductor chip includes a first wireless communication circuit, a second wireless communication circuit, and an auxiliary path. The first wireless communication circuit includes a signal path, wherein the signal path includes a signal node. The second wireless communication circuit includes a mixer and a local oscillator (LO) buffer. The LO buffer is arranged to receive and buffer an LO signal, and is further arranged to provide the LO signal to the mixer. The auxiliary path is arranged to electrically connect the LO buffer to the signal node of the signal path, wherein the LO buffer is reused for a loop-back test function of the first wireless communication circuit through the auxiliary path.

Abstract: A welding quality detection system and a welding quality detection method are provided. A detection device applies a force to at least one weld point of a first welded object or a second welded object that are welded together. A displacement detector detects a displacement signal that varies with the force or time between the first welded object and the second welded object based on the force. A detection module receives or records the displacement signal and determines whether a gap exists between the first welded object and the second welded object based on a slope of the displacement signal, so as to detect the welding quality of the weld point quickly and precisely.

Abstract: An electronic device is provided. The electronic device includes a substrate, a first gate circuit, a second gate circuit, a signal line, and a shielding layer. The substrate includes a display area and a peripheral area. The first gate circuit is disposed in the peripheral area. The second gate circuit is disposed in the peripheral area. The signal line is coupled between the first gate circuit and the second gate circuit. The signal line includes a specific line segment, and the specific line segment overlaps the display area. The shielding layer is disposed in the display area. The shielding layer overlaps the specific line segment.

Abstract: An electronic device having a peripheral area is provided. The electronic device includes a substrate; and a first conductive line disposed on the substrate in the peripheral area and including a first section and a second section electrically connected to the first section. An overlapping region is defined as a region that the first section overlaps the second section in a top view of the electronic device. The first section has a first minimum width inside the overlapping region and a second minimum width outside the overlapping region. The second section has a third minimum width outside the overlapping region. The first minimum width is greater than the second minimum width and greater than the third minimum width.

Abstract: A semiconductor chip includes a first wireless communication circuit, a local oscillator (LO) buffer, and an auxiliary path. The first wireless communication circuit has a signal path, wherein the signal path has a mixer input port and a signal node distinct from the mixer input port. The auxiliary path is used to electrically connect the LO buffer to the signal node of the signal path. The LO buffer is reused for a loop-back test function through the auxiliary path.

Abstract: An electronic device is provided. The electronic device includes a substrate, a driving circuit disposed on the substrate, an active area disposed on the substrate, and a wiring group disposed on the substrate and between the driving circuit and the active area. The wiring group includes a first conductive line and a second conductive line. The first conductive line has a first section and a second section electrically connected to the first section and disposed between the first section and the active area. The second conductive line includes a third section and a fourth section electrically connected to the third section and disposed between the third section and the active area. The first section and the second section are not the same layer. The first section and the fourth section are the same layer. The second section and the third section are the same layer.