Abstract: A display device includes: a substrate having an active area including a first area and a second area; a first driving circuit disposed adjacent to the first area; a second driving circuit disposed adjacent to the second area; first scan lines electrically connected to the first driving circuit; second scan lines electrically connected to the second driving circuit, wherein the first scan lines and the second scan lines extend along a first direction; first display units disposed in the first area and respectively electrically connected to the first scan lines and electrically separated from the second scan lines; and second display units disposed in the second area and respectively electrically connected to the second scan lines and electrically separated from the first scan lines. The active area is disposed between the first driving circuit and the second driving circuit in the first direction.

Abstract: An electronic device including a substrate, a first fan-out line, a second fan-out line, and a multiplexer circuit is disclosed. The substrate has an active area and a fan-out area. The first fan-out line is located in the fan-out area and has a first segment. The second fan-out line is located in the fan-out area and has a second segment. The first segment overlaps the second segment. A multiplexer circuit is located between the active area and the fan-out area and coupled to the first fan-out line and the second fan-out line. The first fan-out line receives a first data signal and the second fan-out line receives a second data signal. Polarities of the first data signal and the second data signal are opposite.

Abstract: An electronic apparatus includes a substrate, a plurality of scan lines, and a plurality of first switching units. The plurality of scan lines are disposed on the substrate. The plurality of first switching units are disposed on the substrate. Each scan line is coupled to the driver device through one of the plurality of first switching units.

Abstract: A display device has a display region and a peripheral region. The display device includes a display panel, a backplate, and a sensor. The display panel includes a first polarizing plate and a second polarizing plate. The first polarizing plate is disposed in the display region. The second polarizing plate is disposed in the display region. The backplate overlaps the display panel. The sensor is disposed on the backplate and overlaps the first polarizing plate and the second polarizing plate that are located in the display region.

Abstract: Provided are a data processing method and apparatus applied to a target device in which a Linux operating system is running. A first program is deployed in the Linux operating system. The method includes: loading a target loading and invasion machine into a first memory space of the first program, and creating, in the first memory space, a second memory space for the target loading and invasion machine, where the second memory space is simply available to the target loading and invasion machine and to a program loadable by the target loading and invasion machine; configuring a second runtime environment for a second program, where the second runtime environment is isolated from a first runtime environment of the first program; and loading the second program into the second memory space based on the second runtime environment, and running the second program in a threaded manner.

Abstract: A thin film transistor substrate includes a substrate, a first metal layer disposed on the substrate, a second metal layer disposed on the first metal layer, a semiconductor disposed between the substrate and the first metal layer, and a first insulating layer disposed between the first metal layer and the second metal layer. The first metal layer includes a gate pattern, the second metal layer includes a scan line pattern, the semiconductor includes an active region, and the first insulating layer includes a first opening. The gate pattern overlaps the active region, and the scan line pattern of the second metal layer is electrically connected to the gate pattern of the first metal layer through the first opening in the first insulating layer.

Abstract: A manufacturing method of a semiconductor device includes providing a substrate, forming a first trench in the substrate, in which a top of the first trench is greater than a bottom of the first trench, forming a well region and a source region at a side of the first trench, in which the source region is on the well region, forming a hard mask stack lining a surface of the substrate, forming a second trench in the hard mask stack, in which the bottom of the second trench is over the corner of the first trench, performing an implantation process to form a shielding doped region at a region of the substrate nearing the corner of the first trench, removing the hard mask stack, forming a gate dielectric layer lining the surface of the substrate, and forming a gate in the first trench.

Abstract: A correlation computation method includes: performing, by a grouping circuit, a grouping operation upon a data sequence according to an in-phase code sequence and a quadrature code sequence, wherein the data sequence is derived from a quadrature phase shift keying (QPSK) modulated signal; performing at least one accumulation operation upon data samples categorized into at least one data sample group by the grouping operation, to generate at least one accumulation result; and deriving a correlation value between the data sequence and both of the in-phase code sequence and the quadrature code sequence from the at least one accumulation result.

Abstract: A power generation device includes a housing, chambers, and conductive fillers. The housing has a rotation axis. The chambers surround the rotation axis and located inside the housing. The conductive fillers respectively filled in the chambers. The chambers include electrodes. The electrodes are located on the chambers and in contact with the conductive fillers.

Abstract: An electrical stimulation device is provided. The electrical stimulation device includes a boost circuit, a voltage selecting circuit and a control circuit. The boost circuit generates a plurality of voltages, wherein the voltages have different voltage values. The voltage selecting circuit is coupled to the boost circuit and selects one voltage according to a reference voltage on a tissue impedance to generate an output voltage. The control circuit is coupled to the boost circuit and in response to electrical stimulation; it transmits a control signal to enable the boost circuit.

Abstract: An electronic device including a substrate and a plurality of control units is provided. The plurality of control units are disposed on the substrate, wherein each of the plurality of control units includes a transistor, an insulating layer, a first conductive layer, and a second conductive layer. The transistor includes a first electrode. The insulating layer is disposed on the transistor and has a through hole exposing the first electrode. The first conductive layer is disposed on the transistor, wherein a portion of the first conductive layer is overlapped with the insulating layer, and another portion of the first conductive layer is electrically connected to the first electrode via the through hole. The second conductive layer is at least partially overlapped with the first conductive layer and in direct contact with the first conductive layer. The electronic device provided by the disclosure has improved transmittance and yield.

Abstract: A CMOS data clearing circuit is provided. The CMOS data clearing circuit is configured to clear CMOS data of a main board of an electronic device. The electronic device includes a control chip and a pin header. The CMOS data clearing circuit includes a controller and a connection port. The controller generates a pulse signal and an operation signal. The connection port has an input pin and an output pin. The output pin is coupled to a first pin of the pin header. The connection port connects the input pin to the output pin in response to the operation signal, so as to transmit the pulse signal to the first pin of the pin header via the output pin. The control chip clears the CMOS data of the main board according to the pulse signal received by the first pin.

Abstract: An electronic device includes: a circuit board, a substrate, a first signal line, a second signal line and a first chip. The substrate has a peripheral area, a first side edge having a first extending direction and a second side edge having a second extending direction not parallel to the first extending direction. The first signal line is disposed on the substrate and in the peripheral area. The second signal line is disposed on the substrate and is adjacent to the first signal line. The chip is disposed on the circuit board and is electrically connected to the first signal line. Wherein, the first signal line has a first section disposed between the second signal line and the first side edge and a second section disposed between the second signal line and the second side edge, and the first section of the first signal line extends along the first extending direction and the second section of the first signal line extends along the second extending direction.

Abstract: An electronic device is provided. The electronic device includes a substrate and a first conductive line disposed on the substrate and including a first section and a second section electrically connected to the first section. The first section has a first minimum width outside the overlapping region, the second section has a second minimum width outside the overlapping region, and the first minimum width is different from the second minimum width. The electronic device further includes a first conductive layer disposed on the first section and the second section. The first section is electrically connected to the second section through the first conductive layer.

Abstract: An electronic device is provided, which includes: a substrate including a periphery region; a plurality of first pads disposed on the substrate and in the periphery region; a plurality of second pads disposed on the substrate and in the periphery region; and a plurality of redundancy pads disposed on the substrate and in the periphery region, wherein the plurality of first pads are configured to transmit a plurality of data signals, the plurality of second pads are configured to transmit a plurality of signals which are different from the plurality of data signals and a plurality of touch signals, and the plurality of first pads and the plurality of redundancy pads are disposed between two of the plurality of second pads.

Abstract: An electronic device includes: a substrate, a signal line, a detection line and a detection unit. The substrate has a peripheral area and a substrate edge. The signal line is disposed on the substrate, and the signal line is located in the peripheral area. The detection line is disposed on the substrate, and is adjacent to the signal line. The detection unit is electrically connected to the detection line. Wherein, the detection line is disposed between the signal line and the substrate edge, and the detection line and the signal line are electrically insulated.

Abstract: A semiconductor chip includes a first wireless communication circuit, a second wireless communication circuit, and an auxiliary path. The first wireless communication circuit includes a signal path, wherein the signal path includes a signal node. The second wireless communication circuit includes a mixer and a local oscillator (LO) buffer. The LO buffer is arranged to receive and buffer an LO signal, and is further arranged to provide the LO signal to the mixer. The auxiliary path is arranged to electrically connect the LO buffer to the signal node of the signal path, wherein the LO buffer is reused for a loop-back test function of the first wireless communication circuit through the auxiliary path.

Abstract: An electronic device having a peripheral area is provided. The electronic device includes a substrate; and a first conductive line disposed on the substrate in the peripheral area and including a first section and a second section electrically connected to the first section. An overlapping region is defined as a region that the first section overlaps the second section in a top view of the electronic device. The first section has a first minimum width inside the overlapping region and a second minimum width outside the overlapping region. The second section has a third minimum width outside the overlapping region. The first minimum width is greater than the second minimum width and greater than the third minimum width.

Abstract: A display device includes: a substrate having a display area and a non-display area adjacent to the display area; a first conductive layer disposed on the substrate and including first conductive line; a first insulating layer disposed on the first conductive layer; a second conductive layer disposed on the first insulating layer and including a second conductive line, wherein, corresponding to the display area, the second conductive line and the first conductive line cross from a top view; a second insulating layer disposed on the second conductive layer; and a third conductive layer disposed on the second insulating layer and including a third conductive line; wherein, corresponding to the non-display area, a portion of a projection of the third conductive line on the substrate is overlapped with a portion of a projection of the first conductive layer on the substrate.

Abstract: A touch electronic device is provided, which includes: a substrate; a plurality of data fan-out lines disposed on the substrate; a plurality of first data pads disposed on the substrate; a plurality of touch fan-out lines disposed on the substrate; and a plurality of first touch pads disposed on the substrate, wherein one of the plurality of data fan-out lines is electrically connected to one of the plurality of first data pads, one of the plurality of touch fan-out lines is electrically connected to one of the plurality of first touch pads, and any of the plurality of data fan-out lines and any of the touch fan-out lines are not overlapped in a top view direction of the substrate.