Abstract: An exemplary legend printing stencil for printing a circuit substrate for manufacturing a number of printed circuit board is provided. The stencil includes at least a first printing portion, at least a second printing portion and a junction portion between the first printing portion and the second printing portion. The first printing portion and the second printing portion each define a number of legend holes therein. The first printing portion and the second portion are configured for attaching on and covering the corresponding circuit board unit of the circuit substrate to print legends on the circuit board unit. The junction portion defines a slot therein and is configured for attaching on and covering the corresponding connection portion of the circuit substrate to print a legend ink layer on the connection portion. A method for manufacturing a number of printed circuit boards using the stencil is also provided.

Abstract: A method for manufacturing coreless substrates is provided herein. The method first provides a base whose top and bottom sides are covered with metal layers respectively that are detachable from the base. From the two metal layers, the method then develops the bump-pad side or ball side wiring layers required by the coreless substrate simultaneously. The two metal layers along with their respective wiring layers are then separated from the base into two independent semi-products of the coreless substrate. The method then develops from the other sides of the two semi-products the laminate side wiring layers required by the coreless substrate.

Abstract: A method for manufacturing coreless substrates is provided herein. The method first provides a base whose top and bottom sides are covered with metal layers respectively that are detachable from the base. From the two metal layers, the method then develops the bump-pad side or ball side wiring layers required by the coreless substrate simultaneously. The two metal layers along with their respective wiring layers are then separated from the base into two independent semi-products of the coreless substrate. The method then develops from the other sides of the two semi-products the laminate side wiring layers required by the coreless substrate.