Abstract: A MIMO communication system having deterministic channels the orthogonality of which can be ensured even if a reflected wave other than the direct wave is present during line-of-sight communication is provided. The MIMO communication system is used in a line-of-sight environment and has deterministic channels between the transmission side where a plurality of transmission antennas are arranged and the reception side where a plurality of reception antennas are arranged. The transmission side, the reception side, or both transmission and reception sides of the MIMO communication system have a channel matrix calculation processing means for calculating a channel matrix for establishing an orthogonal channel as a communication channel. The transmission and reception antennas forming the channel matrix are horizontally arranged with respect to the ground.

Abstract: In a high-speed search system for CDMA, plural (M) symbols which are subjected to spread frequency coding with a spreading code called as a short code are prepared when synchronization of the spreading code is established before synchronization of carrier is established in a mobile station used in a CDMA cellular system, data which are obtained by forming an orthogonal code with the polarities of the M symbols are set as a down signal, and when the orthogonal code concerned is detected, coherent integration is performed by a correlator having combinations of the polarities which can be possibly taken by the code over the plural symbols (of M) constituting the code.

Abstract: A MIMO communication system having deterministic channels wherein MIMO is applied to line-of-sight channels having a fixed geometrical positional relationship so as to increase the channel capacity. A line-of-sight MIMO communication system having a plurality of channels includes a channel matrix calculation processing section on a transmission or reception side or both of the transmission and reception sides. The channel matrix calculation processing section updates an orthogonal channel formation matrix in accordance with a fluctuation of a transmission antenna position or reception antenna position or a fluctuation of the channels.

Abstract: A MIMO decoder, which is capable of changing a search area of a transmission signal vector in accordance with a change in a channel matrix, includes: a generalized inverse vector matrix calculation unit for calculating a generalized inverse matrix of Moore-Penrose derived from a channel matrix indicative of a radiowave propagation environment; a search area limiting processing unit for performing weighting for each eigenvector calculated from the channel matrix in inverse proportion to a square root of an eigenvalue corresponding to the eigenvector, and determines the search area of the transmission signal vector centered at the generalized inverse matrix solution of Moore-Penrose based on the weighted result; and a most likelihood estimation unit for searching for a transmission signal vector by use of a most likelihood estimation based on the search area determined by the search area limiting processing unit.

Abstract: In a high-speed search system for CDMA, plural (M) symbols which are subjected to spread frequency coding with a spreading code called as a short code are prepared when synchronization of the spreading code is established before synchronization of carrier is established in a mobile station used in a CDMA cellular system, data which are obtained by forming an orthogonal code with the polarities of the M symbols are set as a down signal, and when the orthogonal code concerned is detected, coherent integration is performed by a correlator having combinations of the polarities which can be possibly taken by the code over the plural symbols (of M) constituting the code.

Abstract: The present invention is directed to providing a spatial-multiplexed signal detection method that can improve the characteristics of spatial and temporal iterative decoding that is based on turbo principles. According to the method, when implementing factorization of conditional probability referred to as “likelihood” such that the conditional probability can be represented by the product of a plurality of conditional probabilities, the conditional probability being obtained for a received signal sequence in a spatial and temporal iterative decoding configuration based on turbo principles of soft-input soft-output detector 1 and soft-input soft-output decoder 2, the conditional probability for which factorization is possible is divided into a plurality of groups. When calculating this likelihood, the ordering among groups in which probabilities are calculated can be ordered such that groups that contain events that serve as the conditions of conditional probabilities in the groups are processed earlier.

Abstract: An interleaving order generator for a turbo encoder/decoder prevents bottlenecks incurred when temporarily storing a generated interleaving pattern. An interleaving order generator, an interleaver, a turbo encoder, and a turbo decoder realizes a minimum parameter transfer to reduce bottlenecks in the interface, even when the data rate is varied and the interleave length is frequently changed. The interleaving order generator enables a sufficient data transfer rate for providing multi-media services.

Abstract: In a high-speed search system for CDMA, plural (M) symbols which are subjected to spread frequency coding with a spreading code called as a short code are prepared when synchronization of the spreading code is established before synchronization of carrier is established in a mobile station used in a CDMA cellular system, data which are obtained by forming an orthogonal code with the polarities of the M symbols are set as a down signal, and when the orthogonal code concerned is detected, coherent integration is performed by a correlator having combinations of the polarities which can be possibly taken by the code over the plural symbols (of M) constituting the code.

Abstract: A high-speed turbo decoder using a BCJR (Bahi, Cocke, Jelinek, and Raviv) algorithm or a BCJR algorithm which makes approximation by ACS computation (Add-Compare-Select computation) includes a supplier for supplying a plurality of pipelined stages of gamma metrics as a section for performing at least one of alpha metric computation and beta metric computation in the BCJR algorithm, an ACS computation portion which is constituted by a plurality of stages of cascade connections and receives the plurality of pipelined gamma metrics, a receiver that receives a computation result obtained by the ACS computation portion and updates state metrics every plurality of stages (K stages), and a memory for storing state metrics for every K stages.

Abstract: In a high-speed search system for CDMA, plural (M) symbols which are subjected to spread frequency coding with a spreading code called as a short code are prepared when synchronization of the spreading code is established before synchronization of carrier is established in a mobile station used in a CDMA cellular system, data which are obtained by forming an orthogonal code with the polarities of the M symbols are set as a down signal, and when the orthogonal code concerned is detected, coherent integration is performed by a correlator having combinations of the polarities which can be possibly taken by the code over the plural symbols (of M) constituting the code.

Abstract: A method of decoding turbo-encoded, received data in CDMA (Code Division Multiple Access) system which carries out closed-loop control to electric power of a data transmitter, based on a signal to interference ratio, includes the steps of (a) weighting reverse-diffused, received data, based on both the signal to interference ratio and data obtained when the signal to interference ratio is measured, (b) carrying out ACS operation or comparison/selection operation in a process of updating alpha metric, a process of updating beta metric, and a process for computing likelihood, to the thus weighted, received data, and (c) compensating for results of the ACS operation, based on a predetermined value associated with a difference generated when the ACS operation or the comparison/selection operation is carried out.

Abstract: In various multi-media services, an enormous memory capacity need not be prepared even when it is necessary to prepare a plenty of types of interleaving patterns. For example, when decoding reception data series of 2 Mbps or above with configuration such as 8-iteration, there is no need of preparing a high-speed memory capacity for temporarily storing the generated interleaving pattern. Furthermore, when the generated pattern needs to be transferred to an interleaving RAM in a turbo decoder actually performing processing, there is no need of preparing such a large amount of transfer data that the interface becomes a bottle neck.

Abstract: A digital automatic gain control linearizer for controlling a variable gain control element for automatically controlling gain, using an analog signal obtained by converting input digital data includes a memory an average calculation unit. The memory outputs upper and lower limit data corresponding respectively to the upper and lower limits of a binary data range which can be expressed by a plurality of upper bits forming the digital data. The average calculation unit calculates the average of one and other data of the upper and lower limit data, and repeats average calculation a predetermined number of times using the calculated average at least one of the upper limit data and the lower limit data. Average calculation is repeated a number of times corresponding to the lower-bit value of the digital data except for the plurality of upper bits, and the variable gain control element is controlled in accordance with the average calculated by the average calculation unit.

Abstract: A turbo-code decoder includes a first reception signal memory, second reception signal memory, a priori memory, first adder, first selector, and second selector. The first reception signal memory stores an information sequence. The second reception signal memory stores first and second parity sequences. The a priori memory stores extrinsic/previous information in repetitive processing. The first adder adds the information sequence read out from the first reception signal memory and the previous information read out from the a priori memory. The first selector selects one of the first and second parity sequences read out from the second reception signal memory. On the basis of a polarity of a calculation result from the first adder and that of a selection output from the first selector, the second selector selects one of the sum from the first adder including a negative polarity, the selection output from the first selector including a negative polarity, a sum of the sum and selection result, and zero.

Abstract: A method of decoding turbo-encoded, received data in CDMA (Code Division Multiple Access) system which carries out closed-loop control to electric power of a data transmitter, based on a signal to interference ratio, includes the steps of (a) weighting reverse-diffused, received data, based on both the signal to interference ratio and data obtained when the signal to interference ratio is measured, (b) carrying out ACS operation or comparison/selection operation in a process of updating alpha metric, a process of updating beta metric, and a process for computing likelihood, to the thus weighted, received data, and (c) compensating for results of the ACS operation, based on a predetermined value associated with a difference generated when the ACS operation or the comparison/selection operation is carried out.

Abstract: A multi-dimensional pseudo noise generating circuit for soft-decision decoding, comprising: PN generating means for generating a signal of binary length code; a memory for storing a threshold level based on predetermined probability density function; address generating means for generating an address of the memory; and comparison means for comparing a data read from the memory with the binary length code generated by the PN generating means in a preset bit length. The address of the address generating means is successively updated based on a result from the comparison means and an address at the end of comparison is output as pseudo noise information.

Abstract: A high-speed turbo decoder using a BCJR (Bahl, Cocke, Jelinek, and Raviv) algorithm or a BCJR algorithm which makes approximation by ACS computation (Add-Compare-Select computation) includes a means for supplying a plurality of pipelined stages of gamma metrics as a section for performing at least one of alpha metric computation and beta metric computation in the BCJR algorithm, an ACS computation means which is constituted by a plurality of stages of cascade connections and receives the plurality of pipelined gamma metrics, a means which receives a computation result obtained by the ACS computation means and updates state metrics every plurality of stages (K stages), and a memory for storing state metrics for every K stages.

Abstract: In a high-speed search system for CDMA, plural (M) symbols which are subjected to spread frequency coding with a spreading code called as a short code are prepared when synchronization of the spreading code is established before synchronization of carrier is established in a mobile station used in a CDMA cellular system, data which are obtained by forming an orthogonal code with the polarities of the M symbols are set as a down signal, and when the orthogonal code concerned is detected, coherent integration is performed by a correlator having combinations of the polarities which can be possibly taken by the code over the plural symbols (of M) constituting the code.

Abstract: In a high-speed search system for CDMA, plural (M) symbols which are subjected to spread frequency coding with a spreading code called as a short code are prepared when synchronization of the spreading code is established before synchronization of carrier is established in a mobile station used in a CDMA cellular system, data which are obtained by forming an orthogonal code with the polarities of the M symbols are set as a down signal, and when the orthogonal code concerned is detected, coherent integration is performed by a correlator having combinations of the polarities which can be possibly taken by the code over the plural symbols (of M) constituting the code.

Abstract: A Viterbi decoder for Viterbi-decoding an input signal, includes a path memory, a shift register, and a traceback circuit. The shift register has at least (constraint length −1) bits as the number of stages. The traceback circuit inputs, to the shift register, the AND per bit between a signal generated by a decoder connected to the shift register and the content of the path memory designated by a traceback address counter.