Abstract: A cell search circuit which does not invite an increase in search time, even if coherent integration is performed, and which minimizes an increase in the scale of the circuitry. The circuit comprises a spread signal generator having a phase shifting function, a multiplier for multiplying an output of the spread signal generator by an input signal, a ring buffer accumulating results of correlation, performed a number of times, in order to perform coherent integration over a plurality of signals, and an accumulator constructed by a single-signal portion of the ring buffer and an adder. Integration is performed over a length of time the same as unit-signal duration prior to spreading, coherent integration is performed by summing results of time integration of each signal, which results have been accumulated in the ring buffer, and the shifting operation of the spread signal generator is controlled based upon results of coherent integration.

Abstract: In a fully differential amplifier so configured that an operating point potential of positive and negative output terminals of a differential amplifier having an active load is set by a common-mode feedback circuit, the common-mode feedback circuit includes a first differential pair receiving a reference potential given from an external and a positive output potential of the differential amplifier, a second differential pair receiving the reference potential and a negative output potential of the differential amplifier, and a sum current feedback device for giving a sum current of output currents of the first and second differential pairs to a bias current for the active load of the differential amplifier.

Abstract: An integrated circuit of a quadrature modulator comprising a baseband section implementing .pi./4 shift QPSK having a simple test circuit is disclosed. The baseband section comprises: an impulse response memory having memory cells each storing a cell data representing a value of impulse response sequence for a impulse response function; and an adder for convolution integral implementing convolution summer from the cell data. The quadrature modulator operates for testing the cell data of the memory cells of the impulse response memory when supplied with a test instruction signal. The test is carried out by reading out whole the memory cells of the impulse response memory and adding in the adder for convolution integral the cell data read out from whole the memory cells. The number of I/O terminals for carrying out the test for the impulse response memory and the chip size of the integrated circuit are reduced.

Abstract: In a modulator supplied with an input digital signal for outputting an output signal therefrom in accordance with the input digital signal, the modulator has a first producing section for producing a phase information signal on the basis of the input digital signal. The phase information signal is representative of phase information of the input digital signal. A memory section memorizes an impulse response data of the phase information that has a predetermined data length. An accessing section accesses the memory section to produce impulse response values of the impulse response data in accordance with the phase information signal. A second producing section produces a modulated signal on the basis of the impulse response values. A shaping section shapes the modulated signal into a shaped modulated signal in accordance with a predetermined window function to produce the shaped modulated signal as the output signal.

Abstract: A quadrature modulator substantially completely compensating a phase error existing between two quadrature carriers by calculating two corrected baseband signals. One corrected baseband signal is generated by adding a common phase component signal and an orthogonal phase component signal after multiplying the common phase component signal and the orthogonal component signal by a first factor a and a second factor b respectively. The other corrected baseband signal is generated by adding the orthogonal phase component signal and the common phase component signal after multiplying the orthogonal component signal and the common phase component signal by the first factor a and the second factor b respectively. The output signal Z of the quadrature modulator is generated by adding both the outputs X and Y of first and second modulating circuits each modulating a respective carrier by a respective corrected baseband signal. If the phase error is .alpha.

Abstract: In a radio communication apparatus which is capable of using a selected terminal unit selected from a plurality of terminal units, a logic part detects the kind of the selected terminal unit to produce a type signal representative of the selected kind. Responsive to the type signal, the logic part controls an adjusting part which produces an adjusted signal. As a result, the adjusted signal has a selected level which is selected for the selected terminal unit in accordance with the type signal. Responsive to the adjusted signal, the selected terminal unit generates an audible signal having a volume which is adjusted in accordance with the selected level. Additionally, the volume can be manually adjusted by an operator.

Abstract: A security module for a radio telephone prevents a KEY code stored in a non-volatile memory from being read out for illicit use. The security module deletes the KEY code stored in the memory when accessed from the outside. Hence, although a KEY code can be written to the memory or the operation of the memory can be tested from the outside, the KEY code is prevented from being read out by an unauthorized person.

Abstract: A portable radio apparatus may operate in a battery saving mode on any one of a plurality of channels, in order to communicate with a central office. The apparatus selects a channel for its use on a basis of the strength of the electrical fields on the various channels. During an initial period the apparatus scans continuously for a channel. If no channel is found during the initial period, the apparatus switches to an intermittent scan, with power down between the intermittent scan, thus providing the battery saving mode.

Abstract: A mobile telephone terminal includes a portable-unit and an adaptor which is capable of mounting the portable-unit on a vehicle and supplying power from a vehicle battery to the portable-unit. The adapter includes a power switch manually generating a switch signal and a delay circuit which delays the switch signal by a predetermined period of time when the telephone terminal is in a communication state and the power switch is depressed in place of a call end key. In response to the delayed switch signal, a transistor switch circuit stops power supply from the vehicle battery to the portable-unit. The portable-unit initiates a call clear process in response to the switch signal and during the predetermined period of time performs and completes the call clear process. In the call clear process, the portable-unit transmits a call clear signal to a base station over a radio channel used and turns off its radio frequency station.

Abstract: A timing recovery circuit for recovering timing signals out of split phase or Manchester coded data, comprising dotting (DOT), frame synchronization (FS) and information (DATA) in digital form. A digital voltage controlled oscillator (VCO) provides a signal whose frequency is twice that of the timing signal of the split phase signal and a frequency divider generates a signal whose frequency is equal that of the timing signal. The outputs of the VCO and the frequency divider are selectively applied to a phase detector, also having as an input the split phase signal, for the generation of a feedback control signal, depending on whether the split phase signal is advanced or delayed. The higher-frequency VCO signal is applied during the DATA segment of the incoming signal while the frequency divider signal is applied during the DOT and FS segments.