Abstract: An electrostatic discharge protection circuit includes an input node coupled to receive an input signal and an output node coupled to output the input signal to an internal circuit. A first inductor is coupled to the input node and to the output node, and a second inductor is coupled to the output node and to a first power supply node through a resistance. A plurality of protection devices are coupled to the first and second inductors and are disposed in parallel with each other.

Abstract: Transistors, methods of manufacturing thereof, and image sensor circuits are disclosed. In one embodiment, a transistor includes a buried channel disposed in a workpiece, a gate dielectric disposed over the buried channel, and a gate layer disposed over the gate dielectric. The gate layer comprises an I shape in a top view of the transistor.

Abstract: Transistors, methods of manufacturing thereof, and image sensor circuits are disclosed. In one embodiment, a transistor includes a buried channel disposed in a workpiece, a gate dielectric disposed over the buried channel, and a gate layer disposed over the gate dielectric. The gate layer comprises an I shape in a top view of the transistor.

Abstract: An electrostatic discharge protection circuit includes an input node coupled to receive an input signal and an output node coupled to output the input signal to an internal circuit. A first inductor is coupled to the input node and to the output node, and a second inductor is coupled to the output node and to a first power supply node through a resistance. A plurality of protection devices are coupled to the first and second inductors and are disposed in parallel with each other.

Abstract: A method for producing a layout of a device in an integrated circuit before actually fabricated is provided. The method includes inputting at least one fixed parameter for the device for fabrication. And then, a first part of a set of variable parameters of a layout of the device is input. The complete set of the variable parameters is generated. It is checked whether or not the layout with the parameters is satisfying a requirement, wherein an end step is reached if the layout is accepted by the requirement, and a new part of the set of variable parameters as the first part being looping in the foregoing steps if the layout is not accepted by the requirement.

Abstract: An inductor formed on a semiconductor substrate, comprising a coil formed with at least a single metal layer having a plurality of slots and an insulator layer filled in the plurality of slots, wherein the insulator layer is encompassed in the single metal layer and the insulator layer does not cover the top surface of the single metal layer.

Abstract: An inductor formed on a semiconductor substrate is provided in the present invention. The inductor comprises a metal layer and an insulator layer. The metal layer constitutes the coil of the inductor. The insulator layer comprises at least one insulator slot, and each insulator slot is encompassed in the metal layer.

Abstract: A method for producing a layout of a device in an integrated circuit before actually fabricated is provided. The method includes inputting at least one fixed parameter for the device for fabrication. And then, a first part of a set of variable parameters of a layout of the device is input. The complete set of the variable parameters is generated. It is checked whether or not the layout with the parameters is satisfying a requirement, wherein an end step is reached if the layout is accepted by the requirement, and a new part of the set of variable parameters as the first part being looping in the foregoing steps if the layout is not accepted by the requirement.

Abstract: An inductor structure comprising a substrate; a plurality of insulation layers on the substrate; a first spiral electric conductive coil positioned in the insulation layers to form an inductor having a first direction of magnetic field; a second spiral electric conductive coil positioned in the insulation layers to form an inductor having a second direction of magnetic field, in which, the two or more inductors are independently positioned in a same 3-D space and have a good integration.

Abstract: A high coupling factor transformer and a manufacturing method thereof are provided. The transformer includes a primary winding and a secondary winding. The secondary winding is adjacent to the primary winding. The secondary winding and the primary winding induct with each other. The primary winding includes a plurality of first protruding portions, and the secondary winding includes a plurality of second protruding portions. The first protruding portions stretch to the secondary winding without electro-contact, and the second protruding portions stretch to the primary winding without electro-contact.

Abstract: An inductor structure comprising a substrate; a plurality of insulation layers on the substrate; a first spiral electric conductive coil positioned in the insulation layers to form an inductor having a first direction of magnetic field; a second spiral electric conductive coil positioned in the insulation layers to form an inductor having a second direction of magnetic field, in which, the two or more inductors are independently positioned in a same 3-D space and have a good integration.

Abstract: An inductor structure comprising a substrate; a plurality of insulation layers on the substrate; a first spiral electric conductive coil positioned in the insulation layers to form an inductor having a first direction of magnetic field; a second spiral electric conductive coil positioned in the insulation layers to form an inductor having a second direction of magnetic field, in which, the two or more inductors are independently positioned in a same 3-D space and have a good integration.

Abstract: An inductor formed on a semiconductor substrate is provided in the present invention. The inductor includes a metal layer and an insulator layer. The metal layer constitutes the coil of the inductor. The insulator layer includes at least one insulator slot, and each insulator slot is encompassed in the metal layer.

Abstract: A method for producing an IC layout with radio frequency devices is provided. The method has following steps. Type information of at least one RF device is inputted, and at least one RF parameter corresponding to the RF device is inputted as well. A frequency response result is then generated based on the type information and the RF parameter. When the frequency response result meets the required specification, an IC layout process is performed based on the frequency response result. However, when the frequency response result doesn't meet the required specification, another RE parameter is inputted again to produce new frequency response result.

Abstract: An inductor layout and manufacturing method thereof are provided. The inductor layout includes a substrate and a conductive path. The substrate includes at least an active region, wherein the active region includes at least a circuit. The conductive path is disposed over the substrate and arranged near the edge of the active region along the direction of the edge of the active region. Wherein, two ends of the conductive path are the two ends of the inductor.

Abstract: An inductor formed on a semiconductor substrate is provided in the present invention. The inductor comprises a metal layer and an insulator layer. The metal layer constitutes the coil of the inductor. The insulator layer comprises at least one insulator slot, and each insulator slot is encompassed in the metal layer.

Abstract: A substrate is provided and a top interconnection metal layer and a primary winding layer are formed thereon. Then a passivation layer having a plurality of via exposed parts of the top interconnection metal layer is formed on the substrate. A secondary winding layer and at least a bonding pad are formed on the passivation layer. The bonding pad electrically connects to the top interconnection metal layer through the via.

Abstract: A planar transformer including a first winding and a second winding is provided. The first winding includes a plurality of conductive paths and an electrical connection portion. The conductive paths of the first winding surround a position point. The electrical connection portion is electrically connected to the conductive paths of the first winding to form the first winding, wherein the electrical connection portion is disposed in a pad layer. The second winding also surrounds the position point.

Abstract: A high coupling factor transformer and a manufacturing method thereof are provided. The transformer includes a primary winding and a secondary winding. The secondary winding is adjacent to the primary winding. The secondary winding and the primary winding induct with each other. The primary winding includes a plurality of first protruding portions, and the secondary winding includes a plurality of second protruding portions. The first protruding portions stretch to the secondary winding without electro-contact, and the second protruding portions stretch to the primary winding without electro-contact.

Abstract: A substrate is provided and a top interconnection metal layer and a primary winding layer are formed thereon. Then a passivation layer having a plurality of via exposed parts of the top interconnection metal layer is formed on the substrate. A secondary winding layer and at least a bonding pad are formed on the passivation layer. The bonding pad electrically connects to the top interconnection metal layer through the via.