Patents by Inventor Tsun-Min Cheng

Tsun-Min Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130045595
    Abstract: The method for processing a metal layer including the following steps is illustrated. First, a semiconductor substrate is provided. Then, a metal layer is formed over the semiconductor substrate. Furthermore, a microwave energy is used to selectively heat the metal layer without affecting the underlying semiconductor substrate and other formed structures, in which the microwave energy has a predetermined frequency in accordance with a material of the metal layer, and the predetermined frequency ranges between 1 KHz to 1 MHz.
    Type: Application
    Filed: August 16, 2011
    Publication date: February 21, 2013
    Inventors: Tsun-Min Cheng, Chien-Chao Huang, Chin-Fu Lin, Chi-Mao Hsu, Yen-Liang Lu, Chun-Ling Lin
  • Publication number: 20120305403
    Abstract: An electrical chemical plating process is provided. A semiconductor structure is provided in an electrical plating platform. A pre-electrical-plating step is performed wherein the pre-electrical-plating step is carried out under a fixed voltage environment and lasts for 0.2 to 0.5 seconds after the current is above the threshold current of the electrical plating platform. After the pre-electrical-plating step, a first electrical plating step is performed on the semiconductor structure.
    Type: Application
    Filed: June 6, 2011
    Publication date: December 6, 2012
    Inventors: Chun-Ling Lin, Yen-Liang Lu, Chi-Mao Hsu, Chin-Fu Lin, Chun-Hung Chen, Tsun-Min Cheng, Meng-Hong Tsai
  • Publication number: 20120295437
    Abstract: A method for fabricating through-silicon via structure is disclosed. The method includes the steps of: providing a semiconductor substrate; forming a through-silicon via in the semiconductor substrate; covering a liner in the through-silicon via; performing a baking process on the liner; forming a barrier layer on the liner; and forming a through-silicon via electrode in the through-silicon via.
    Type: Application
    Filed: May 16, 2011
    Publication date: November 22, 2012
    Inventors: Yen-Liang Lu, Chun-Ling Lin, Chi-Mao Hsu, Chin-Fu Lin, Chun-Hung Chen, Tsun-Min Cheng, Meng-Hong Tsai
  • Publication number: 20110300706
    Abstract: A method for fabricating an interconnection structure includes the following steps. Firstly, a substrate having a first conductive layer thereon is provided. Next, an ultra low-k material layer is formed on the substrate. Next, a portion of the ultra low-k material layer is removed, so as to form an opening to expose the first conductive layer. Next, a dry-cleaning process is performed by using gas, so as to clean a surface of the first conductive layer exposed by the opening. The dry-cleaning process is performed at a temperature in a range from the room temperature to 100° C.
    Type: Application
    Filed: June 3, 2010
    Publication date: December 8, 2011
    Inventors: Hsin-Fu HUANG, Chi-Mao Hsu, Tsun-Min Cheng, Chin-Fu Lin