Patents by Inventor Tsung-Han Wu
Tsung-Han Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20190121763Abstract: An electronic device includes a first stream port and a control circuit. The first stream port includes a plurality of lanes, wherein the plurality of lanes are used to couple to a plurality of lanes of a second stream port of another electronic device, respectively. The control circuit is coupled to the first stream port, and is arranged for controlling a data transmission and data reception of the first stream port. When the lanes of the first stream port receive training sequences having a plurality of lane numbers from the lanes of the second stream port, respectively, to initiate a lane number negotiation, the lanes of the first stream port send back the received lane numbers to the second stream port, without considering default lane numbers of the lanes of the first stream port.Type: ApplicationFiled: October 23, 2017Publication date: April 25, 2019Inventors: Huai-Yuan Feng, Yung-Chih Lin, Liang-Yen Wang, Kai-Sheng Chuang, Tsung-Han Wu, Yang-Fan Mu, Chia-Chun Wang
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Patent number: 10256233Abstract: A method for forming a semiconductor device and the resulting device are provided. At least one capacitor in a first gate structure is formed over a substrate. The at least one capacitor includes a first gate electrode including a first conductive layer, a semiconductor layer including a semiconductor material and a dopant, a dielectric layer disposed between the first gate electrode and the semiconductor layer, and a second conductive layer contacting the semiconductor layer. The at least one resistor includes a third conductive layer and is electrically connected to the at least one capacitor.Type: GrantFiled: January 30, 2018Date of Patent: April 9, 2019Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Huan-Kuan Su, Yu-Hong Pan, Jen-Pan Wang, Tong-Min Weng, Tsung-Han Wu
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Publication number: 20190067129Abstract: A method for forming a semiconductor device includes steps of: forming at least one gate structure comprising a gate electrode over a substrate, and forming a first dielectric layer of a first dielectric material along a side wall of the at least one gate structure. The first dielectric layer of the first dielectric material includes fluorine doped silicon oxycarbonitride with a doping concentration of fluorine. The dielectric constant of the first dielectric layer is adjusted through the doping concentration of fluorine.Type: ApplicationFiled: August 30, 2017Publication date: February 28, 2019Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Tong-Min WENG, Tsung-Han WU
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Patent number: 10167930Abstract: A two-speed transmission having two clutches includes an electric motor, a middle shaft, a first clutch, a second clutch, a first gear assembly and a second gear assembly. The electric motor includes a spindle. The first clutch and the second clutch are furnished on the middle shaft coaxially. The first gear assembly and the second gear assembly are coupled to the first clutch and the second clutch through a first shaft portion and a second shaft portion of the middle shaft to generate a first gear ratio and a second gear ratio, respectively. When the first clutch is activated to connect with the first shaft portion, the second clutch separates from the second shaft portion, so that the electric motor outputs a first torque corresponding to the first gear ratio through the first gear assembly. Similarly, the electric motor outputs a second torque corresponding to the second gear ratio.Type: GrantFiled: March 22, 2016Date of Patent: January 1, 2019Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Jui-Tang Tseng, Kun-Ju Xie, Chia Tsao, Tsung-Han Wu
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Publication number: 20180342502Abstract: A method for forming a semiconductor device and the resulting device are provided. At least one capacitor in a first gate structure is formed over a substrate. The at least one capacitor includes a first gate electrode including a first conductive layer, a semiconductor layer including a semiconductor material and a dopant, a dielectric layer disposed between the first gate electrode and the semiconductor layer, and a second conductive layer contacting the semiconductor layer. The at least one resistor includes a third conductive layer and is electrically connected to the at least one capacitor.Type: ApplicationFiled: January 30, 2018Publication date: November 29, 2018Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Huan-Kuan Su, Yu-Hong Pan, Jen-Pan Wang, Tong-Min Weng, Tsung-Han Wu
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Publication number: 20180278082Abstract: Provided is an electronic device configured to be charged with an adapter. The electronic device includes an energy storage unit, a charging unit and a switch unit. The charging unit is configured to receive a bus voltage and output a charging voltage to charge the energy storage unit. The switch unit is electrically coupled in parallel to the charging unit. When the electronic device is coupled to the adapter through a bus interface, the electronic device receives the bus voltage from the adapter, receives a communication signal from the adapter, and selectively turns on or off the switch unit according to the communication signal, and when the electronic device operates in a direct charging mode, the switch unit is turned on to form a direct charging path, to charge the energy storage unit by using the bus voltage.Type: ApplicationFiled: March 16, 2018Publication date: September 27, 2018Inventors: Tsung-Han WU, Wei-Gen CHUNG, Yi-Ming HUANG, Chien-Chung LO
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Patent number: 10062787Abstract: A FinFET includes a fin structure, a gate, a source-drain region and an inter layer dielectric (ILD). The gate crosses over the fin structure. The source-drain region is in the fin structure. The ILD is laterally adjacent to the gate and includes a dopant, in which a dopant concentration of the ILD adjacent to the gate is lower than a dopant concentration of the ILD away from the gate.Type: GrantFiled: January 25, 2017Date of Patent: August 28, 2018Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yu-Ting Hsiao, Cheng-Ta Wu, Lun-Kuang Tan, Liang-Yu Yen, Ting-Chun Wang, Tsung-Han Wu, Wei-Ming You
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Publication number: 20180205243Abstract: A charging protection device comprises a universal serial bus (USB) interface, a resistance circuit, a detection circuit and a control circuit. The universal serial bus interface includes a configuration channel. The resistance circuit includes a pull-down resistor coupled between the configuration channel and a ground GND. The detection circuit is configured to detect an abnormal charging condition. The detection circuit generates an abnormal signal when the abnormal charging condition occurs. The control circuit is coupled to the detection circuit and configured to change a voltage value on the pull-down resistor to be out of a preset voltage range according to the abnormal signal.Type: ApplicationFiled: December 22, 2017Publication date: July 19, 2018Inventors: Wei-Gen Chung, CHIEN-CHUNG LO, Ming-Ting Tsai, Yue-Han Wu, TSUNG-HAN WU
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Publication number: 20180183248Abstract: A charge-discharge device and a control method of the charge-discharge device are provided. The control method of the charge-discharge device comprising: receiving an input voltage signal via a configuration channel of a USB port; sampling the input voltage signal in a predetermined period to generate a plurality of sampling values; selectively connecting the configuration channel to a pull-down circuit or a pull-up circuit according to the sampling values, receiving a first charging voltage via a power channel of the USB port when the configuration channel is connected to the pull-down circuit, and outputting a second charging voltage via the power channel when the configuration channel is connected to the pull-up circuit.Type: ApplicationFiled: December 12, 2017Publication date: June 28, 2018Inventors: FENG-CHI SHEN, TSUNG-HAN WU, CHIEN-CHUNG LO, YII-LIN WU
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Patent number: 9971719Abstract: A system using a USB Type-C interface is provided. This system not only transmits the normal USB signal but also supports a DisplayPort Alternate Mode. Moreover, due to the novel pin arrangement of the multi-function control circuit, the cost of the overall system is reduced, and the area of the printed circuit board is effectively reduced.Type: GrantFiled: September 10, 2015Date of Patent: May 15, 2018Assignee: MEDIATEK INC.Inventors: Ching-Gu Pan, Tsung-Han Wu, Hsien-Sheng Huang
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Publication number: 20180113199Abstract: An auxiliary apparatus for a lighthouse positioning system is provided. The lighthouse positioning system includes a first positioning base station and a second positioning base station, wherein the first positioning base station includes a first signal transmitter and a second signal transmitter and the second positioning base station includes a first signal transmitter and a second signal transmitter. The auxiliary apparatus calculates a first signal time sequence of the first signal transmitters, calculates a second signal time sequence of the second signal transmitters, and determines a third signal time sequence according to the first signal time sequence and the second signal time sequence. The third signal time sequence is not overlapped with the first signal time sequence and the second signal time sequence. The auxiliary apparatus transmits a plurality of signals according to the third signal time sequence.Type: ApplicationFiled: October 20, 2017Publication date: April 26, 2018Inventors: Iok-Kan CHOI, Tsung-Han WU, Kuang-Wei LIN
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Patent number: 9809098Abstract: A two-speed transmission for an electric vehicle including an electric motor, a first transmission mechanism and a second transmission mechanism is provided. The electric motor includes a rotor and a spindle. The rotor drives a first sun gear and a first planet gear of the first transmission mechanism to rotate with respect to the first ring gear to generate a first gear ratio. The rotor drives a second sun gear and a second planet gear of the second transmission mechanism to rotate with respect to the second ring gear to generate a second gear ratio different from the first gear ratio. When the first clutch connects with the spindle, the second clutch separates from the spindle, and a first torque is outputted to the spindle. When the second clutch connects with the spindle, the first clutch separates from the spindle, and a second torque is outputted to the spindle.Type: GrantFiled: December 16, 2015Date of Patent: November 7, 2017Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Chia Tsao, Jui-Tang Tseng, Kun-Ju Xie, Tsung-Han Wu
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Publication number: 20170204940Abstract: A two-speed transmission having two clutches for an electric vehicle includes an electric motor, a middle shaft, a first clutch, a second clutch, a first gear assembly and a second gear assembly. The electric motor includes a spindle. The first and second clutches are furnished on the middle shaft coaxially. The first gear assembly is furnished on the spindle and the first clutch respectively to generate a first gear ratio. The second gear assembly is furnished on the spindle and the first clutch respectively to generate a second gear ratio different from the first gear ratio. When the first clutch is activated to connect with the middle shaft, the second clutch separates from the middle shaft, and the electric motor outputs a first torque corresponding to the first gear ratio to the middle shaft. Similarly, the electric motor outputs a second torque corresponding to the second gear ratio.Type: ApplicationFiled: March 21, 2016Publication date: July 20, 2017Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Jui-Tang TSENG, Kun-Ju XIE, Chia TSAO, Tsung-Han WU
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Publication number: 20170204941Abstract: A two-speed transmission having two clutches includes an electric motor, a middle shaft, a first clutch, a second clutch, a first gear assembly and a second gear assembly. The electric motor includes a spindle. The first clutch and the second clutch are furnished on the middle shaft coaxially. The first gear assembly and the second gear assembly are coupled to the first clutch and the second clutch through a first shaft portion and a second shaft portion of the middle shaft to generate a first gear ratio and a second gear ratio, respectively. When the first clutch is activated to connect with the first shaft portion, the second clutch separates from the second shaft portion, so that the electric motor outputs a first torque corresponding to the first gear ratio through the first gear assembly. Similarly, the electric motor outputs a second torque corresponding to the second gear ratio.Type: ApplicationFiled: March 22, 2016Publication date: July 20, 2017Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Jui-Tang TSENG, Kun-Ju XIE, Chia TSAO, Tsung-Han WU
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Patent number: 9697989Abstract: The present disclosure provides a method for generating a parameter pattern including: performing a plurality of measurements upon a plurality of regions on a surface of a workpiece to obtain a plurality of measured results; and deriving a parameter pattern according to the plurality of measured results by a computer; wherein the parameter pattern includes a plurality of regional parameter values corresponding to each of the plurality of regions on the surface of the workpiece. The present disclosure provides a Feed Forward semiconductor manufacturing method including: forming a layer with a desired pattern on a surface of a workpiece; deriving a control signal including a parameter pattern according to spatial dimension measurements against the layer with the desired pattern distributed over a plurality of regions of the surface of the workpiece; and performing an ion implantation on the surface of the workpiece according to the control signal.Type: GrantFiled: February 26, 2015Date of Patent: July 4, 2017Assignee: Taiwan Semiconductor Manufacturing Company Ltd.Inventors: Cheng-Ta Wu, Tsung Han Wu, Yao-Wen Hsu, Lun-Kuang Tan, Wei-Ming You, Ting-Chun Wang
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Publication number: 20170133509Abstract: A FinFET includes a fin structure, a gate, a source-drain region and an inter layer dielectric (ILD). The gate crosses over the fin structure. The source-drain region is in the fin structure. The ILD is laterally adjacent to the gate and includes a dopant, in which a dopant concentration of the ILD adjacent to the gate is lower than a dopant concentration of the ILD away from the gate.Type: ApplicationFiled: January 25, 2017Publication date: May 11, 2017Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yu-Ting HSIAO, Cheng-Ta WU, Lun-Kuang TAN, Liang-Yu YEN, Ting-Chun WANG, Tsung-Han WU, Wei-Ming YOU
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Publication number: 20170122413Abstract: A two-speed transmission for an electric vehicle including an electric motor, a first transmission mechanism and a second transmission mechanism is provided. The electric motor includes a rotor and a spindle. The rotor drives a first sun gear and a first planet gear of the first transmission mechanism to rotate with respect to the first ring gear to generate a first gear ratio. The rotor drives a second sun gear and a second planet gear of the second transmission mechanism to rotate with respect to the second ring gear to generate a second gear ratio different from the first gear ratio. When the first clutch connects with the spindle, the second clutch separates from the spindle, and a first torque is outputted to the spindle. When the second clutch connects with the spindle, the first clutch separates from the spindle, and a second torque is outputted to the spindle.Type: ApplicationFiled: December 16, 2015Publication date: May 4, 2017Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Chia TSAO, Jui-Tang TSENG, Kun-Ju XIE, Tsung-Han WU
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Patent number: 9577102Abstract: A method of forming a gate includes: forming a dummy gate; forming an inter layer dielectric (ILD) laterally adjacent to the dummy gate; doping a dopant into the dummy gate and the ILD, in which a surface dopant concentration of the dummy gate is lower than a surface dopant concentration of the ILD; removing the dummy gate to form a cavity after doping the dopant into the dummy gate and the ILD; and forming the gate in the cavity.Type: GrantFiled: September 25, 2015Date of Patent: February 21, 2017Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yu-Ting Hsiao, Cheng-Ta Wu, Lun-Kuang Tan, Liang-Yu Yen, Ting-Chun Wang, Tsung-Han Wu, Wei-Ming You
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Patent number: 9471738Abstract: A method comprises processing a layout of an integrated circuit to determine one or more attributes of one or more components of the integrated circuit. The method also comprises extracting one or more process parameters from a process file associated with manufacturing the integrated circuit. The one or more process parameters are extracted from the process file based on a computation of one or more logic functions included in the process file. The computation is based on the one or more attributes. The method further comprises calculating a capacitance value between at least two components of the integrated circuit based on the one or more process parameters and a capacitance determination rule included in the process file. At least one of the one or more process parameters, the one or more logic functions, or the capacitance determination rule is editable based on a user input.Type: GrantFiled: February 5, 2015Date of Patent: October 18, 2016Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chih-Cheng Chou, Tsung-Han Wu, Ke-ying Su, Hsien-Hsin Sean Lee, Chung-Hsing Wang
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Publication number: 20160254122Abstract: The present disclosure provides a method for generating a parameter pattern including: performing a plurality of measurements upon a plurality of regions on a surface of a workpiece to obtain a plurality of measured results; and deriving a parameter pattern according to the plurality of measured results by a computer; wherein the parameter pattern includes a plurality of regional parameter values corresponding to each of the plurality of regions on the surface of the workpiece. The present disclosure provides a Feed Forward semiconductor manufacturing method including: forming a layer with a desired pattern on a surface of a workpiece; deriving a control signal including a parameter pattern according to spatial dimension measurements against the layer with the desired pattern distributed over a plurality of regions of the surface of the workpiece; and performing an ion implantation on the surface of the workpiece according to the control signal.Type: ApplicationFiled: February 26, 2015Publication date: September 1, 2016Inventors: CHENG-TA WU, TSUNG HAN WU, YAO-WEN HSU, LUN-KUANG TAN, WEI-MING YOU, TING-CHUN WANG