Abstract: A method comprises processing a layout of an integrated circuit to determine one or more attributes of one or more components of the integrated circuit. The method also comprises extracting one or more process parameters from a process file associated with manufacturing the integrated circuit. The one or more process parameters are extracted from the process file based on a computation of one or more logic functions included in the process file. The computation is based on the one or more attributes. The method further comprises calculating a capacitance value between at least two components of the integrated circuit based on the one or more process parameters and a capacitance determination rule included in the process file. At least one of the one or more process parameters, the one or more logic functions, or the capacitance determination rule is editable based on a user input.

Abstract: A system using a USB Type-C interface is provided. This system not only transmits the normal USB signal but also supports a DisplayPort Alternate Mode. Moreover, due to the novel pin arrangement of the multi-function control circuit, the cost of the overall system is reduced, and the area of the printed circuit board is effectively reduced.

Abstract: A circuit substrate includes: a substrate; an insulating coating layered structure formed on the substrate, having top and bottom surfaces, and formed with a patterned recess that is indented inwardly from the top surface, that is disposed above the bottom surface, and that is defined by a recess-defining wall, the recess-defining wall having a bottom wall portion and a surrounding wall portion that extends upwardly from a periphery of the bottom wall portion; and a patterned metallic layered structure including an electroless plating metal layer formed on the bottom wall portion of the recess-defining wall.

Abstract: A method of making a metal-electrodeposited insulator substrate includes: forming first and second continuous conductor parts of a patterned conductive base layer on a pattern-forming surface of an insulator substrate; subjecting an assembly of the patterned conductive base layer and the insulator substrate to electroplating so as to simultaneously form first and second electroplating parts of a patterned electroplating layer on the patterned conductive base layer; and removing a sacrificial portion of the first continuous conductor part and a sacrificial portion of the first electroplating part from the insulator substrate.

Abstract: A television signal processing device and a television signal processing method are proposed according to embodiments of the present invention, wherein the television signal processing device includes a first signal processing unit, a television demodulator, and a second signal processing unit. The first signal processing unit performs a first signal processing operation upon a television signal according to a feedback signal to reduce distortion of the television signal and accordingly generate a processed television signal. The television demodulator is coupled to the first signal processing unit for receiving the processed television signal, and demodulating the processed television signal to generate a demodulated television signal.

Abstract: A portion of a layout of a single layer of an integrated circuit is to be multi-patterned. The patterns are divided into first and second groups, to be patterned on the single layer by a first mask or a second mask. For each portion of each pattern, a spacing relationship is determined between that portion and any adjacent pattern on either or both sides. A processor computes a first capacitance (C), resistance (R), or resistance-capacitance (RC) cost of assigning the first group to the first mask and the second group to the second mask, and a second cost of assigning the first group to the second mask and the second group to the first mask, based on the spacing relationships. The first group is assigned to the first mask and the second group to the second mask if the first cost is lower than the second cost.

Abstract: A portion of a layout of a single layer of an integrated circuit is to be multi-patterned. The patterns are divided into first and second groups, to be patterned on the single layer by a first mask or a second mask. For each portion of each pattern, a spacing relationship is determined between that portion and any adjacent pattern on either or both sides. A processor computes a first capacitance (C), resistance (R), or resistance-capacitance (RC) cost of assigning the first group to the first mask and the second group to the second mask, and a second cost of assigning the first group to the second mask and the second group to the first mask, based on the spacing relationships. The first group is assigned to the first mask and the second group to the second mask if the first cost is lower than the second cost.

Abstract: A receiver includes a low noise amplifier (LNA), a passive mixer, a passive filter, a baseband processing block and a voltage controller. The LNA receives and amplifies a radio frequency (RF) signal. The passive mixer is coupled to the LNA without any AC coupling capacitance therebetween, and generates an intermediate frequency signal by down-converting the RF signal. The passive filter filters the intermediate frequency signal. The baseband processing block includes a transimpedance amplifier (TIA) and processes the filtered intermediate frequency signal. The voltage controller keeps a first node and a second node of a signal path to be around a common DC voltage, wherein the first node is located between an output terminal of the LNA and an input terminal of the passive mixer, and the second node is located between an output terminal of the passive mixer and an output terminal of the TIA.

Abstract: A circuit device includes: a substrate having an insulative upper surface; a hydrophobic anti-plating layer of a hydrophobic material formed on the upper surface of the substrate and having at least one patterned through-hole for exposing a plating portion of the upper surface of the substrate; an active metal layer formed on the plating portion of the upper surface of the substrate and disposed in the patterned through-hole in the hydrophobic anti-plating layer; and an electroless deposited metal layer electroless deposited on the active metal layer.

Abstract: A receiver includes a low noise amplifier (LNA), a passive mixer, a passive filter, a baseband processing block and a voltage controller. The LNA receives and amplifies a radio frequency (RF) signal. The passive mixer is coupled to the LNA without any AC coupling capacitance therebetween, and generates an intermediate frequency signal by down-converting the RF signal. The passive filter filters the intermediate frequency signal. The baseband processing block includes a transimpedance amplifier (TIA) and processes the filtered intermediate frequency signal. The voltage controller keeps a first node and a second node of a signal path to be around a common DC voltage, wherein the first node is located between an output terminal of the LNA and an input terminal of the passive mixer, and the second node is located between an output terminal of the passive mixer and an output terminal of the TIA.

Abstract: A television signal processing device and a television signal processing method are proposed according to embodiments of the present invention, wherein the television signal processing device includes a first signal processing unit, a television demodulator, and a second signal processing unit. The first signal processing unit performs a first signal processing operation upon a television signal according to a feedback signal to reduce distortion of the television signal and accordingly generate a processed television signal. The television demodulator is coupled to the first signal processing unit for receiving the processed television signal, and demodulating the processed television signal to generate a demodulated television signal.

Abstract: A gain control method which includes setting a first initial gain value to a first variable gain amplifier; measuring a first power value corresponding to incoming signals; measuring a second power value corresponding to a target signal; and resetting the first initial gain value according to the first power value and the second power value. Another gain control method is also disclosed, which includes updating a gain value of a first variable gain amplifier by combining an adjustment value with the gain value according to a first tuning direction; obtaining a signal quality indicator; comparing the signal quality indicator with a reference signal quality indicator to generate a comparison result; and referring to the comparison result, further updating the gain value according to the first tuning direction or a second tuning direction opposite to the first tuning direction.

Abstract: A gain control method which includes setting a first initial gain value to a first variable gain amplifier; measuring a first power value corresponding to incoming signals; measuring a second power value corresponding to a target signal; and resetting the first initial gain value according to the first power value and the second power value. Another gain control method is also disclosed, which includes updating a gain value of a first variable gain amplifier by combining an adjustment value with the gain value according to a first tuning direction; obtaining a signal quality indicator; comparing the signal quality indicator with a reference signal quality indicator to generate a comparison result; and referring to the comparison result, further updating the gain value according to the first tuning direction or a second tuning direction opposite to the first tuning direction.