Abstract: A method of fabricating a thin film transistor is provided. A gate is formed on a substrate. A gate insulator is formed on the substrate to cover the gate. A source/drain layer is formed on the gate insulator, and a portion of the gate insulator above the gate is exposed by the source/drain layer. An isolated layer is formed on the source/drain layer and has an opening to expose a portion of the gate insulator and a portion of the source/drain layer above the gate. A channel layer is formed in the opening of the isolated layer to be electrically connected to the source/drain layer, and the channel layer is exposed by the opening.

Abstract: A method of fabricating a vertical thin film transistor (vertical TFT) is disclosed, wherein a shadow mask is used to fabricate the TFT device in vertical structure. First, a metal layer is formed, which serves as ribs and a gate layer. Next, a shadow mask is disposed on the gate layer. Afterwards, the shadow mask is used as a mask to form a source layer, an organic semiconductor layer and a drain layer. Thus, the process is simplified. Since no photolithography process is required, and therefore damage of the organic semiconductor layer is avoided and a vertical TFT with desired electrical characteristics may be obtained.

Abstract: A fabricating method of organic electronic device is provided. The method comprises: providing a flexible substrate; fabricating a plurality of organic elements on the flexible substrate; fabricating a patterned spacing layer on the flexible substrate; and arranging a cover substrate on the patterned spacing layer, and sealing the edges of the flexible substrate and the cover substrate with a sealant, wherein the patterned spacing layer is used to maintain a space between the flexible substrate and the cover substrate.

Abstract: Embodiments of an optical compensator for a liquid crystal display is disclosed. One embodiment of the optical compensator includes an A-plate and a C-plate wherein: the retardation of the A-plate satisfies the following formula: 0.644<R0(450)/R0(550)<1 the retardation of the C-plate satisfies the following formula: 1<Rth(450)/Rth(550)<1.35 where R0(450) and R0(550) represent the retardation of the A-plate at wavelengths of 450 nm and 550 nm, respectively, and Rth(450) and Rth(550) are the values calculated by Rth=[[nx+ny]/2?nz]×d (where nx, ny and nz represent the three-dimensional refractive indexes of the C-plate as the refractive indexes in the direction of the x-axis, y-axis and z-axis, respectively, and d represents the thickness of the C-plate) for the C-plate at a wavelength of 450 nm and 550 nm, respectively. Other embodiments are also included.

Abstract: A method of fabricating a vertical thin film transistor (vertical TFT) is disclosed, wherein a shadow mask is used to fabricate the TFT device in vertical structure. First, a metal layer is formed, which serves as ribs and a gate layer. Next, a shadow mask is disposed on the gate layer. Afterwards, the shadow mask is used as a mask to form a source layer, an organic semiconductor layer and a drain layer. Thus, the process is simplified. Since no photolithography process is required, and therefore damage of the organic semiconductor layer is avoided and a vertical TFT with desired electrical characteristics may be obtained.

Abstract: A method of manufacturing an organic thin film transistor is described. A patterned insulating layer having an opening therein is formed on a substrate. A gate is formed in the opening of the insulating layer, and a gate insulating layer is formed on the gate. A conductive material layer is formed on the gate insulating layer by a printing process. One of the gate insulating layer and the conductive material layer is hydrophobic or hydrophilic and the other is hydrophilic or hydrophobic, such that the conductive material layer is naturally separated to two sides of the gate insulating layer to form a source and a drain. An active layer is formed on the gate insulating layer between the source and the drain.

Abstract: An output method for improving video image quality is provided. First, a frame data of a first frame is received, wherein the first frame may coincide with a first type or a second type. Thereafter, the first frame is subjected to a signal process step to output a processed first frame with a first standard, wherein the processed first frame comprises a first signal to noise (S/N) ratio. Next, a frame data of a second frame with a second standard is received, wherein the second frame coincides with a third type. Thereafter, a first decompression process of frame data is performed on the second frame to output a processed second frame with the first standard, wherein the processed second frame comprises a second S/N ratio. In addition, a difference between the first S/N ratio and the second S/N ratio is smaller than a predetermined minimum tolerance.

Abstract: A method of fabricating a vertical thin film transistor (vertical TFT) is disclosed, wherein a shadow mask is used to fabricate the TFT device in vertical structure. First, a metal layer is formed, which serves as ribs and a gate layer. Next, a shadow mask is disposed on the gate layer. Afterwards, the shadow mask is used as a mask to form a source layer, an organic semiconductor layer and a drain layer. Thus, the process is simplified. Since no photolithography process is required, and therefore damage of the organic semiconductor layer is avoided and a vertical TFT with desired electrical characteristics may be obtained.

Abstract: The invention provides a continuous-time delta sigma modulator. In one embodiment, the continuous-time delta sigma modulator comprises a series of integrators, a quantizer, and a loop delay compensation circuit. The integrators are coupled in series and generate an analog output signal according to an analog input signal. The quantizer quantizes the analog output signal according to a reference voltage to generate a digital output signal as the output of the continuous-time delta sigma modulator. The loop delay compensation circuit adjusts the reference voltage of the quantizer according to the digital output signal to compensate the continuous-time delta sigma modulator for a loop delay.

Abstract: A method of fabricating an organic semiconductor device includes following steps. A gate conductive layer is formed on a substrate, and then a gate dielectric layer is formed. Next, patterned metal layers are formed on the gate dielectric layer beside the gate conductive layer. An electrode modified layer is then formed on the surface and the sidewall of each patterned metal layer, and the patterned metal layers and the electrode modified layers formed thereon serve as a source and a drain. Thereafter, an organic semiconductor layer is formed on the source and the drain and on a portion of the gate dielectric layer exposed between the source and the drain to be an active layer.

Abstract: A TFT and an OLED device are provided. The TFT includes a substrate, a gate, a gate insulator, a source/drain layer, an isolated layer, and a channel layer. The gate is disposed on the substrate. The gate insulator is disposed on the substrate and covers the gate. The source/drain layer is disposed on the gate insulator, and exposes a portion of the gate insulator above the gate. The isolated layer is disposed on the source/drain layer and has an opening to expose a portion of the gate insulator and a portion of the source/drain layer above the gate. The channel layer is disposed in the opening of the isolated layer. Further, the channel layer is exposed by the opening and is electrically connected to the source/drain layer. On the other hand, the OLED device mainly includes a driving circuit and an organic electro-luminescent unit.

Abstract: The invention provides a continuous-time delta sigma modulator. In one embodiment, the continuous-time delta sigma modulator comprises a series of integrators, a quantizer, and a loop delay compensation circuit. The integrators are coupled in series and generate an analog output signal according to an analog input signal. The quantizer quantizes the analog output signal according to a reference voltage to generate a digital output signal as the output of the continuous-time delta sigma modulator. The loop delay compensation circuit adjusts the reference voltage of the quantizer according to the digital output signal to compensate the continuous-time delta sigma modulator for a loop delay.

Abstract: The present invention provides a molding die for molding glass, which includes a base member, on which a first buffer layer and a protective film are provided in order. The first buffer layer is made of titanium or any material which is easily attacked by a first attack solution. The first attack solution includes hydrofluoric acid. The protective film is made of platinum-iridium alloy, iridium-rhenium alloy, tantalum-ruthenium alloy, molybdenum-ruthenium alloy, molybdenum-rhenium alloy, or molybdenum-hafnium alloy. The method of repairing the molding die includes using the first attack solution to remove the first buffer layer that causes no damage on the base member, and then operating a sputtering process to build a new first buffer layer and a new protective layer on the base member.

Abstract: A fabricating method of organic electronic device is provided. The method comprises: providing a flexible substrate; fabricating a plurality of organic elements on the flexible substrate; depositing a patterned spacing layer on the flexible substrate with a spacing material deposition source and a mask; and arranging a cover substrate on the patterned spacing layer, and sealing the edges of the flexible substrate and the cover substrate with a sealant, wherein the patterned spacing layer is used to maintain a space between the flexible substrate and the cover substrate.

Abstract: A fabricating method of organic electronic device is provided. The method comprises: providing a flexible substrate; fabricating a plurality of organic elements on the flexible substrate; depositing a spacing material layer on the flexible substrate; patterning the spacing material layer to form a patterned spacing layer; and arranging a cover substrate on the patterned spacing layer, and sealing the edges of the flexible substrate and the cover substrate with a sealant, wherein the patterned spacing layer is used to maintain a space between the flexible substrate and the cover substrate.

Abstract: A liquid crystal display device is provided that has a plurality of pixel regions where some of the pixel regions have liquid crystal molecules that operate according to both twisted nematic mode and vertical alignment mode.

Abstract: An organic semiconductor device is provided. A conductive gate layer and a gate dielectric layer are formed on a substrate. Patterned metal layers are formed on the gate dielectric layer beside the conductive gate layer. An electrode modified layer is formed on a top surface and sidewall of each of the patterned metal layer. The patterned metal layers and the electrode modified layers formed thereon serve a source and a drain. An organic semiconductor layer is formed on the source and the drain.

Abstract: A method of fabricating a vertical thin film transistor (vertical TFT) is disclosed, wherein a shadow mask is used to fabricate the TFT device in vertical structure. First, a metal layer is formed, which serves as ribs and a gate layer. Next, a shadow mask is disposed on the gate layer. Afterwards, the shadow mask is used as a mask to form a source layer, an organic semiconductor layer and a drain layer. Thus, the process is simplified. Since no photolithography process is required, and therefore damage of the organic semiconductor layer is avoided and a vertical TFT with desired electrical characteristics may be obtained.

Abstract: An LCD apparatus includes a first polarizer, a half-wavelength retardation plate, a liquid crystal unit and a second polarizer. The LCD apparatus further has a backlight module for generating first polarized light. The first polarizer is disposed downstream of the backlight module, and the first polarizer has a transmission axis. The half-wavelength retardation plate is disposed between the backlight module and the first polarizer. Second polarized light parallel to the transmission axis is generated from the first polarized light passing through the half-wavelength retardation plate. The second polarizer is disposed downstream of the first polarizer. The liquid crystal unit is disposed between the first polarizer and the second polarizer, and the second polarized light emits out of the LCD apparatus through the first polarizer, the liquid crystal unit and the second polarizer.

Abstract: A linearized oscillation synthesizer includes a phase and frequency detection module, charge pump circuit, low pass filter, voltage control oscillator, and a feedback module. The phase and frequency detection module is operably coupled to produce a charge-up signal, a charge-down signal, and an off signal based on phase and/or frequency differences between a reference oscillation and a feedback oscillation. The reference oscillation is generated by a clock source such as a crystal oscillator while the divider module generates the feedback oscillation by dividing the output oscillation by a divider value. The charge pump circuit produces a positive current in response to the charge-up signal, a negative current in response to the charge-down signal and also produces a non-zero offset current. The non-zero offset current shifts the steady state operating condition, and other operating conditions, of the charge pump into a linear region of charge pump performance curve.