Abstract: The present invention discloses an audio processing circuit, wherein when the audio processing circuit determines that a signal being processed is a small signal, an output stage uses a regulated supply voltage provided by a voltage regulator, and the output stage uses an open-loop structure to reduce noise of an output audio signal; and when the audio processing circuit determines that the signal being processed is a large signal, the output stage directly uses the supply voltage without using the regulated supply voltage, and the output stage uses a closed-loop structure to reduce the total harmonic distortion of the output audio signal. By using the present invention, the audio processing circuit can have a good performance indicator with a small chip area design.

Abstract: An electronic device for performing communication with a master device via a serial communications bus and a method for performing assignment of an identifier on the electronic device are provided, wherein the master device is coupled to multiple slave devices via the serial communications bus, and the multiple slave devices include the electronic device. The electronic device includes a clock terminal, a data terminal, and a determination circuit coupled to the clock terminal and the data terminal, wherein the clock terminal and the data terminal receive a first signal and a second signal from the master device, respectively. The determination circuit determines whether a time point of pulling down the first signal is earlier than a time point of pulling down the second signal, in order to generate a determination result, wherein the assignment of the identifier of the electronic device is controlled according to the determination result.

Abstract: The present disclosure discloses a firmware update method having firmware update troubleshooting mechanism. Partial data included in firmware data is used as test data to perform a test process to write the test data to a firmware storage terminal by using a control interface of a processing terminal according to the setting of access parameters, read the written test data from the firmware storage terminal through the control interface and compare the written test data and the test data to generate a comparison result. A parameter adjustment process is performed when the comparison result indicates a mismatching condition such that the test process is performed again and the parameter adjustment process is further performed. When the comparison result indicates a matching condition, the firmware data is transmitted to the processing terminal and is written to the firmware storage terminal by using the control interface.

Abstract: A signal processing system includes a digital signal processing circuit, a power management unit, and a digital control circuit. The power management unit provides a first voltage to the digital signal processing circuit. When in a calibration mode the digital control circuit controls the power management unit to set the first voltage at a minimum preset value, controls the digital signal processing circuit to operate under a first calibration target frequency, triggers the digital signal processing circuit to perform a built-in self-test, raises the first voltage when the built-in self-test fails, triggers the digital signal processing circuit to perform the built-in self-test again, and stores the first calibration target frequency and a value of the first voltage corresponding to the first calibration target frequency to a non-volatile memory when the built-in self-test has succeeded.

Abstract: An audio processing device includes a signal processing circuit, a power switch circuit, a power amplifier and a detection circuit. The signal processing circuit is configured to process an audio input to generate an audio signal. The power switch circuit is configured to generate an operating voltage. The power amplifier is coupled with the signal processing circuit and the power switch circuit, and configured to drive a load circuit by the operating voltage according to the audio signal. The detection circuit is coupled with the signal processing circuit and the power switch circuit, configured to obtain a volume value from the audio signal and compare the volume value with a first volume threshold to generate a comparison result, and configured to control, according to the comparison result, the power switch circuit to set the operating voltage to have a corresponding one of multiple voltage levels.

Abstract: An audio processing chip includes a detector circuit, a first-in first-out (FIFO) circuit, and an adjustment circuitry. The detector circuit is configured to detect an audio stream to output an enable signal. The FIFO circuit is configured to start outputting audio data corresponding to a channel in the audio stream to be a first signal. The adjustment circuitry is configured to process the first signal, in order to generate an output signal and transmit the output signal to a speaker.

Abstract: An audio processing device includes a signal processing circuit, a power switch circuit, a power amplifier and a detection circuit. The signal processing circuit is configured to process an audio input to generate an audio signal. The power switch circuit is configured to generate an operating voltage. The power amplifier is coupled with the signal processing circuit and the power switch circuit, and configured to drive a load circuit by the operating voltage according to the audio signal. The detection circuit is coupled with the signal processing circuit and the power switch circuit, configured to obtain a volume value from the audio signal and compare the volume value with a first volume threshold to generate a comparison result, and configured to control, according to the comparison result, the power switch circuit to set the operating voltage to have a corresponding one of multiple voltage levels.

Abstract: An audio codec circuit includes a voltage detecting circuit, an output processing circuit, a digital-to-analog conversion circuit, and an audio amplifying circuit. The voltage detecting circuit is configured to detect an input voltage of an input power. The output processing circuit obtains a first output compensation value according to the input voltage, an output circuit parameter, and a first output spec. The output processing circuit processes a digital audio and compensates the processed audio by the first output compensation value. The digital-to-analog conversion circuit is configured to perform digital-to-analog conversion on the compensated audio to obtain an analog audio. The audio amplifying circuit is configured to amplify the analog audio and output the amplified audio.

Abstract: The present invention discloses an audio processing circuit, wherein when the audio processing circuit determines that a signal being processed is a small signal, an output stage uses a regulated supply voltage provided by a voltage regulator, and the output stage uses an open-loop structure to reduce noise of an output audio signal; and when the audio processing circuit determines that the signal being processed is a large signal, the output stage directly uses the supply voltage without using the regulated supply voltage, and the output stage uses a closed-loop structure to reduce the total harmonic distortion of the output audio signal. By using the present invention, the audio processing circuit can have a good performance indicator with a small chip area design.

Abstract: An audio processor circuit includes a storage circuit, a digital-to-analog converter circuit, and an amplifier circuit. The storage circuit is configured to store digital audio data from an electrical device. The digital-to-analog converter circuit is configured to convert the digital audio data from the storage circuit into an analog audio signal. The amplifier circuit is configured to provide an output audio signal to an audio playing circuit according to the analog audio signal. If a total data volume of the digital audio data stored in the storage circuit is not a multiple of a throughput or the total data volume of the digital audio data stored in the storage circuit is equal to or greater than an upper limit value, the amplifier circuit is turned off such that the amplifier circuit stops providing the output audio signal to the audio playing circuit.

Abstract: An audio processor circuit includes a storage circuit, a digital-to-analog converter circuit, and an amplifier circuit. The storage circuit is configured to store digital audio data from an electrical device. The digital-to-analog converter circuit is configured to convert the digital audio data from the storage circuit into an analog audio signal. The amplifier circuit is configured to provide an output audio signal to an audio playing circuit according to the analog audio signal. If a total data volume of the digital audio data stored in the storage circuit is not a multiple of a throughput or the total data volume of the digital audio data stored in the storage circuit is equal to or greater than an upper limit value, the amplifier circuit is turned off such that the amplifier circuit stops providing the output audio signal to the audio playing circuit.

Abstract: An audio processing chip includes a detector circuit, a first-in first-out (FIFO) circuit, and an adjustment circuitry. The detector circuit is configured to detect an audio stream to output an enable signal. The FIFO circuit is configured to start outputting audio data corresponding to a channel in the audio stream to be a first signal. The adjustment circuitry is configured to process the first signal, in order to generate an output signal and transmit the output signal to a speaker.

Abstract: A signal processing system includes a digital signal processing circuit, a power management unit, and a digital control circuit. The power management unit provides a first voltage to the digital signal processing circuit. When in a calibration mode the digital control circuit controls the power management unit to set the first voltage at a minimum preset value, controls the digital signal processing circuit to operate under a first calibration target frequency, triggers the digital signal processing circuit to perform a built-in self-test, raises the first voltage when the built-in self-test fails, triggers the digital signal processing circuit to perform the built-in self-test again, and stores the first calibration target frequency and a value of the first voltage corresponding to the first calibration target frequency to a non-volatile memory when the built-in self-test has succeeded.

Abstract: A chip package assembly and a chip function execution method thereof are provided. The chip package assembly includes a plurality of pins, and one of the plurality of pins is configured to receive a voltage signal. A processing circuit is configured to receive the voltage signal, where the processing circuit determines whether a voltage level of the voltage signal is a first level or a second level, to generate a first control signal according to the first level, and generate a second control signal according to the second level. A first functional circuit of a plurality of functional circuits executes a first function according to the first control signal, and a second functional circuit of the plurality of functional circuits executes a second function according to the second control signal.

Abstract: An audio codec circuit includes a voltage detecting circuit, an output processing circuit, a digital-to-analog conversion circuit, and an audio amplifying circuit. The voltage detecting circuit is configured to detect an input voltage of an input power. The output processing circuit obtains a first output compensation value according to the input voltage, an output circuit parameter, and a first output spec. The output processing circuit processes a digital audio and compensates the processed audio by the first output compensation value. The digital-to-analog conversion circuit is configured to perform digital-to-analog conversion on the compensated audio to obtain an analog audio. The audio amplifying circuit is configured to amplify the analog audio and output the amplified audio.

Abstract: A USB adapting circuit is suitable for being connected between a USB host and an external device. The USB adapting circuit includes a connecting port, a detecting circuit, a standby circuit and a main circuit. The standby circuit receives a power supply from the USB host and supplies the detecting circuit and the main circuit with the power supply. The detecting circuit is configured to output a connected signal when the external device is connected to the connecting port. The standby circuit outputs an enabling signal in response to the connected signal. The main circuit adapts between the USB host and the external device when receiving the enabling signal. Therefore, the main circuit does not work without receiving the enabling signal, and has a power saving effect.

Abstract: Disclosed is a sound recording circuit capable of adjusting microphone sensitivity and preventing sound cracks caused by overly loud sound. The sound recording circuit includes: a microphone bias circuit configured to provide a bias voltage for a microphone circuit; an AC coupling capacitor configured to output an analog input signal according to a microphone signal of the microphone circuit; an analog amplifier circuit configured to output an analog output signal according to the analog input signal; an analog-to-digital converter configured to output a digital input signal according to the analog output signal; a digital amplifier circuit configured to output a digital output signal according to the digital input signal; and a signal detector configured to control an analog gain of the analog amplifier circuit, a digital gain of the digital amplifier circuit, and the bias voltage of the microphone bias circuit.

Abstract: A USB adapting circuit is suitable for being connected between a USB host and an external device. The USB adapting circuit includes a connecting port, a detecting circuit, a standby circuit and a main circuit. The standby circuit receives a power supply from the USB host and supplies the detecting circuit and the main circuit with the power supply. The detecting circuit is configured to output a connected signal when the external device is connected to the connecting port. The standby circuit outputs an enabling signal in response to the connected signal. The main circuit adapts between the USB host and the external device when receiving the enabling signal. Therefore, the main circuit does not work without receiving the enabling signal, and has a power saving effect.

Abstract: An audio playback device that includes an audio receiver module, a loudspeaker module and an audio control circuit is provided. The audio control circuit includes an interface and a gain adjusting module. The interface receives an audio signal from an audio source. Under a first operation mode, the audio signal is transmitted only to the audio receiver module to be playback. Under a second operation mode, the audio signal is transmitted to the audio receiver module and to the loudspeaker module to be playback. The gain adjusting module includes a temperature sensing circuit to sense a temperature of the audio receiver module and a gain adjusting circuit electrically coupled between the audio interface and the audio receiver module to adjust a gain of the audio signal according to the temperature.

Abstract: Disclosed is a sound recording circuit capable of adjusting microphone sensitivity and preventing sound cracks caused by overly loud sound. The sound recording circuit includes: a microphone bias circuit configured to provide a bias voltage for a microphone circuit; an AC coupling capacitor configured to output an analog input signal according to a microphone signal of the microphone circuit; an analog amplifier circuit configured to output an analog output signal according to the analog input signal; an analog-to-digital converter configured to output a digital input signal according to the analog output signal; a digital amplifier circuit configured to output a digital output signal according to the digital input signal; and a signal detector configured to control an analog gain of the analog amplifier circuit, a digital gain of the digital amplifier circuit, and the bias voltage of the microphone bias circuit.