Abstract: A system and computer-implemented method are provided for manufacturing a semiconductor electronic device. An assembler receives a jig and a boat supporting a die. The assembler includes a separator that separates the jig into a first jig portion and a second jig portion and a loader that positions the boat between the first jig portion and the second jig portion. A robot receives an assembly prepared by the assembler and manipulates a locking system that fixes an alignment of the boat relative to the first jig portion and the second jig portion to form a locked assembly. A process chamber receives the locked assembly and subjects the locked assembly to a fabrication operation.

Abstract: Systems and processes for packing complementary articles of footwear into a container are disclosed. The processes can include utilizing a reusable packing sheet positioned underneath complementary articles of footwear to transfer the complementary articles of footwear into a container. The processes can also include removing the reusable packing sheet from underneath the complementary articles of footwear while the complementary articles of footwear remain positioned in the container. Additional processes can include aligning and sizing complementary articles of footwear for packing in a container.

Abstract: Systems and processes for packing complementary articles of footwear into a container are disclosed. The processes can include utilizing a reusable packing sheet positioned underneath complementary articles of footwear to transfer the complementary articles of footwear into a container. The processes can also include removing the reusable packing sheet from underneath the complementary articles of footwear while the complementary articles of footwear remain positioned in the container. Additional processes can include aligning and sizing complementary articles of footwear for packing in a container.

Abstract: Systems and processes for packing complementary articles of footwear into a container are disclosed. The processes can include utilizing a reusable packing sheet positioned underneath complementary articles of footwear to transfer the complementary articles of footwear into a container. The processes can also include removing the reusable packing sheet from underneath the complementary articles of footwear while the complementary articles of footwear remain positioned in the container. Additional processes can include aligning and sizing complementary articles of footwear for packing in a container.

Abstract: Systems and processes for packing complementary articles of footwear into a container are disclosed. The processes can include utilizing a reusable packing sheet positioned underneath complementary articles of footwear to transfer the complementary articles of footwear into a container. The processes can also include removing the reusable packing sheet from underneath the complementary articles of footwear while the complementary articles of footwear remain positioned in the container. Additional processes can include aligning and sizing complementary articles of footwear for packing in a container.

Abstract: Systems and processes for packing complementary articles of footwear into a container are disclosed. The processes can include utilizing a reusable packing sheet positioned underneath complementary articles of footwear to transfer the complementary articles of footwear into a container. The processes can also include removing the reusable packing sheet from underneath the complementary articles of footwear while the complementary articles of footwear remain positioned in the container. Additional processes can include aligning and sizing complementary articles of footwear for packing in a container.

Abstract: A method for calculating efficiency of a power supply system includes: displaying a parameter selection interface on the display unit for selecting power supply parameters and transmission line parameters. Obtaining power supply parameters and transmission line parameters selected by the user via the parameter selection interface when determining the user has finished the selection. Determining a efficiency of a selected power supply of the power supply parameters according to the relationship table, and calculating a sum efficiency according to the obtained power supply parameters and the transmission line parameters and the efficiency of the selected power supply. And calculating a total efficiency of the power supply system according to each sum efficiency when determining that all of the power supplies of the power supply system have been selected.

Abstract: A circuit board includes an outer conductive layer, a number of inner conductive layers, at least one group of vias defined through the outer conductive layer and the inner conductive layers and electrically connected each conductive layers, at least one power supply element, and at least one electronic element. The at least one group of vias surrounds the at least one power supply element. When the least one power supply element outputs current to the at least one electronic element, a first portion of the output current flows to the inner conductive layers through the group of vias surrounding the at least one power supply element to be input to the at least one electronic element, and a second portion of the output current flows into the at least one electronic element through the outer conductive layer.

Abstract: A power supply device includes a power supply unit and a feedback control unit. The power supply unit is configured for generating an electric potential to be provided to a load. The feedback control unit detects the electric potential and adjusts relevant parameters of the electrical potential to achieve predetermined values. The feedback control unit includes a first feedback circuit and a second feedback circuit electrically connected in series.

Abstract: A printed circuit board (PCB) includes a power layer and a signal layer. A signal line is arranged on the signal layer. A power via extends through the power layer and the signal layer, and is electrically connected to the power layer and the signal layer. A number of through holes is defined in the PCB, through the power layer and the signal layer, and arranged between the signal line and the power via. The through holes are insulated from the power via. The inside wall of the power via is made of conductive material.

Abstract: A circuit board includes a plurality of conductive layers, at least one group of vias, a number of second vias, at least one power supply element, and at least one electronic element. Each conductive layer includes a conductive portion. Both the first vias and the second vias are defined through the conductive layers and electrically connected each conductive layers. The at least one group of first vias surrounds the at least one power supply element. The second vias are arranged along the side of the conductive portion, and positioned between the power supply element and the electronic element. Current from a power supply element flows to the inner conductive layers through the group of surrounding first vias. Current transmission on each conductive layer continuously flows to another conductive layer having a lower resistance through the second vias during transmission.

Abstract: A current balance circuit includes a first and a second current sensors, an averager, a first and a second control modules, and a first and a second rheostat elements. The first and second current sensors receive a first current and a second current from a power source respectively and convert the first and second currents into a first and a second voltages. The averager receives the first and second voltages and calculates to obtain an average voltage. The first and second control modules receive the first voltage, the second voltage, and the average voltage, to obtain a first and a second control signals, to control current conduction ability of the first and second rheostat elements, to make the first and second currents keep a dynamic balance.

Abstract: A method for calculating efficiency of a power supply system includes: displaying a parameter selection interface on the display unit for selecting power supply parameters and transmission line parameters. Obtaining power supply parameters and transmission line parameters selected by the user via the parameter selection interface when determining the user has finished the selection. Determining a efficiency of a selected power supply of the power supply parameters according to the relationship table, and calculating a sum efficiency according to the obtained power supply parameters and the transmission line parameters and the efficiency of the selected power supply. And calculating a total efficiency of the power supply system according to each sum efficiency when determining that all of the power supplies of the power supply system have been selected.

Abstract: An electronic device reads a layout file of a printed circuit board (PCB) to be manufactured from a storage device, obtains length information and section area information of copper cladding distributed on power source areas and ground trace areas in each of one or more layers of the PCB to be manufactured by analyzing the layout file, and calculates power loss in each of the one or more layers according to the length information, the section area information, a resistance value of the copper cladding, and preset parameters of a power supply module and an integrated circuit (IC) load to be located on the PCB. In response to a determination that the power loss in the layer exceeds a preset range, the electronic device indicates the locations of the power source areas and the ground trace areas of a layer in the PCB layout file which need to be redesigned.

Abstract: A printed circuit board includes a top layer and a bottom layer. A power supply and an electronic component are located on the top layer. The power supply is connected to the top layer and the bottom layer through a first via. A number of second vias extends through the top layer and the bottom layer, and is electrically connected to the top layer and the bottom layer. A right-angled triangular void area without vias defined therein is formed on the printed circuit board, between the second vias and the electronic component. The second vias are arranged on a hypotenuse of the void area.

Abstract: A voltage regulating circuit includes a pulse width modulation controller, a current sense circuit, a voltage feedback circuit, and a gain-and-bias circuit. The current sense circuit includes an inductor and a capacitor. The voltage feedback circuit includes first and second resistors. The gain-and-bias circuit includes an operational amplifier. A first terminal of the capacitor is connected to an inverting input terminal of the operational amplifier through a third resistor. A second terminal of the capacitor is connected to a non-inverting input terminal of the operational amplifier through a fourth resistor. The inverting input terminal of the amplifier is connected to an output terminal of the operational amplifier through a fifth resistor. The non-inverting input terminal of the operational amplifier is grounded through a sixth resistor. The output terminal of the operational amplifier is connected to the node between the first and second resistors through a seventh resistor.

Abstract: A circuit board includes a plurality of conductive layers, at least one group of vias, a number of second vias, at least one power supply element, and at least one electronic element. Each conductive layer includes a conductive portion. Both the first vias and the second vias are defined through the conductive layers and electrically connected each conductive layers. The at least one group of first vias surrounds the at least one power supply element. The second vias are arranged along the side of the conductive portion, and positioned between the power supply element and the electronic element. Current from a power supply element flows to the inner conductive layers through the group of surrounding first vias. Current transmission on each conductive layer continuously flows to another conductive layer having a lower resistance through the second vias during transmission.

Abstract: A printed circuit board (PCB) includes first to fourth layers. A power supply is arranged on the first layer. An electronic component is arranged on the fourth layer. A first via and a second via extend through the PCB and are electrically connected to the electronic component. The PCB further includes third to seventh vias. A length of a transmission path of the current flows from the power supply to electronic component through the third via and the seventh via is almost the same as a length of a transmission path of the current flows from the power supply to the electronic component through the fourth to sixth vias.

Abstract: An electronic device reads a layout file of a printed circuit board (PCB) to be manufactured from a storage device, obtains length information and section area information of copper cladding distributed on power source areas and ground trace areas in each of one or more layers of the PCB to be manufactured by analyzing the layout file, and calculates power loss in each of the one or more layers according to the length information, the section area information, a resistance value of the copper cladding, and preset parameters of a power supply module and an integrated circuit (IC) load to be located on the PCB. In response to a determination that the power loss in the layer exceeds a preset range, the electronic device indicates the locations of the power source areas and the ground trace areas of a layer in the PCB layout file which need to be redesigned.

Abstract: A circuit board includes an outer conductive layer, a number of inner conductive layers, at least one group of vias defined through the outer conductive layer and the inner conductive layers and electrically connected each conductive layers, at least one power supply element, and at least one electronic element. The at least one group of vias surrounds the at least one power supply element. When the least one power supply element outputs current to the at least one electronic element, a first portion of the output current flows to the inner conductive layers through the group of vias surrounding the at least one power supply element to be input to the at least one electronic element, and a second portion of the output current flows into the at least one electronic element through the outer conductive layer.