Abstract: Provided is a photocurable conductive black composition including: (a) at least one (meth)acrylate-functionalized urethane oligomer; (b) at least one photopolymerizable compound; (c) a photoinitiator; (d) a visible-light blocking system; (e) conductive fillers; and optionally (f) a thermal initiator. Also provided are a method for forming a cured product composed of the photocurable conductive black compositions, and an article comprising the cured product.

Abstract: An electronic device may include a display having an array of display pixels on a substrate. The display pixels may be organic light-emitting diode display pixels or display pixels in a liquid crystal display. In an organic light-emitting diode display, hybrid thin-film transistor structures may be formed that include semiconducting oxide thin-film transistors, silicon thin-film transistors, and capacitor structures. The capacitor structures may overlap the semiconducting oxide thin-film transistors. Organic light-emitting diode display pixels may have combinations of oxide and silicon transistors. In a liquid crystal display, display driver circuitry may include silicon thin-film transistor circuitry and display pixels may be based on oxide thin-film transistors. A single layer or two different layers of gate metal may be used in forming silicon transistor gates and oxide transistor gates. A silicon transistor may have a gate that overlaps a floating gate structure.

Abstract: A communication receiver includes a first signal processing circuit and a second signal processing circuit. The first signal processing circuit includes a first feedforward equalizer and a decision circuit. The first feedforward equalizer processes a received signal to generate a first equalized signal. The decision circuit performs hard decision upon the first equalized signal to generate a first symbol decision signal. The second signal processing circuit includes a second feedforward equalizer, a decision feedforward equalizer, and a first decision feedback equalizer. The second feedforward equalizer processes the first equalized signal to generate a second equalized signal. The decision feedforward equalizer processes the first symbol decision signal to generate a third equalized signal. The first decision feedback equalizer generates a second symbol decision signal according to the second equalized signal and the third equalized signal.

Abstract: A semiconductor device and method of manufacturing the same are provided. The semiconductor device includes a substrate and a first gate electrode disposed on the substrate and located in a first region of the semiconductor device. The semiconductor device also includes a first sidewall structure covering the first gate electrode. The semiconductor device further includes a protective layer disposed between the first gate electrode and the first sidewall structure. In addition, the semiconductor device includes a second gate electrode disposed on the substrate and located in a second region of the semiconductor device. The semiconductor device also includes a second sidewall structure covering a lateral surface of the second gate electrode.

Abstract: A package structure is provided. The package structure includes a through substrate via structure, a first stacked die package structure, an underfill layer, and a package layer. The through substrate via structure is formed over a substrate. The first stacked die package structure is over the through substrate via structure, wherein the first stacked die package structure comprises a plurality of memory dies. The underfill layer is over the first stacked die package structure. the package layer is over the underfill layer, wherein the package layer has a protruding portion that extends below a top surface of the through substrate via structure.

Abstract: A display may include pixels arranged in rows and columns in an active area and display driver circuitry in an inactive area. Data lines for the pixels may be positioned in the active area. Fanout lines may be routed through the active area. Each fanout line may electrically connect the display driver circuitry to a respective data line. One or more pixels may include a drive transistor and a light-emitting diode that are connected in series between a first power supply terminal and a second power supply terminal. A conductive layer may form a first terminal (such as the source terminal, the gate terminal, or the drain terminal) for the drive transistor. A conductive shielding layer may be interposed between the conductive layer and a fanout line to mitigate capacitive coupling between the terminal of the drive transistor and the fanout line.

Abstract: A display may have an array of pixels. Display driver circuitry may supply data and control signals to the pixels. Each pixel may have seven transistors, a capacitor, and a light-emitting diode such as an organic light-emitting diode. The seven transistors may receive control signals using horizontal control lines. Each pixel may have first and second emission enable transistors that are coupled in series with a drive transistor and the light-emitting diode of that pixel. The first and second emission enable transistors may be coupled to a common control line or may be separately controlled so that on-bias stress can be effectively applied to the drive transistor. The display driver circuitry may have gate driver circuits that provide different gate line signals to different rows of pixels within the display. Different rows may also have different gate driver strengths and different supplemental gate line loading structures.

Abstract: A circuit board comprises a substrate with opposite first and second sides. A pair of plated through holes (PTHs) extends along z-axis. A pair of signal traces are made on the first side of the substrate and electrically coupled to the pair of the PTHs respectively to form a differential pair. A ground metal is made on the second side of the substrate, the ground metal has a clearance made therein. The ground metal extends fully overlapping with the full signal traces to eliminate reflection noise caused by a boundary between the clearance and the metal ground.

Abstract: A circuit board comprises a substrate with opposite first and second sides. A pair of plated through holes (PTHs) extends along z-axis. A pair of signal traces are made on the first side of the substrate and electrically coupled to the pair of the PTHs respectively to form a differential pair. A ground metal is made on the second side of the substrate, the ground metal has a clearance made therein. The ground metal extends fully overlapping with the full signal traces to eliminate reflection noise caused by a boundary between the clearance and the metal ground.

Abstract: To reduce the amount of space occupied in the inactive area of a display by gate driver circuitry, at least a portion of the gate driver circuitry may be positioned in the active area of the display. To accommodate the gate driver circuitry, emissive sub-pixels may be laterally shifted relative to corresponding thin-film transistor sub-pixels. This allows for the thin-film transistor sub-pixels to be grouped adjacent to the central area of the active area, leaving room along an edge of the active area to accommodate one or more additional display components such as gate driver circuitry or fanout portions of data lines.

Abstract: An electronic device may include a display having display pixels formed in an active area of the display. The display further includes display driver circuitry for driving gate lines that are routed across the display. A hole such as a through hole, optical window, or other inactive region may be formed within the active area of the display. Multiple gate lines carrying the same signal may be merged together prior to being routed around the hole to help minimize the routing line congestion around the border of the hole. Dummy circuits may be coupled to the merged segment portion to help increase the parasitic loading on the merged segments. The hole may have a tapered shape to help maximize the size of the active area. The hole may have an asymmetric shape to accommodate multiple sub-display sensor components.

Abstract: A display may have organic light-emitting diode pixels formed from thin-film circuitry. The thin-film circuitry may be formed in thin-film transistor (TFT) layers and the organic light-emitting diodes may include anodes and cathodes and an organic emissive layer formed over the TFT layers between the anodes and cathodes. The organic emissive layer may be formed via chemical evaporation techniques. The display may include moisture blocking structures such as organic emissive layer disconnecting structures that introduce one or more gaps in the organic emissive layer during evaporation so that any potential moisture permeating path from the display panel edge to the active area of the display is completely terminated.

Abstract: An electronic device may include a display and an optical sensor formed underneath the display. The electronic device may include a plurality of transparent windows that overlap the optical sensor. The resolution of the display panel may be reduced in some areas due to the presence of the transparent windows. To mitigate diffraction artifacts, a first sensor (13-1) may sense light through a first pixel removal region having transparent windows arranged according to a first pattern. A second sensor (13-2) may sense light through a second pixel removal region having transparent windows arranged according to a second pattern that is different than the first pattern. The first and second patterns of the transparent windows may result in the first and second sensors having different diffraction artifacts. Therefore, an image from the first sensor may be corrected for diffraction artifacts based on an image from the second sensor.

Abstract: An electronic device may include a display having display pixels formed in an active area of the display. The display further includes display driver circuitry for driving gate lines that are routed across the display. A hole such as a through hole, optical window, or other inactive region may be formed within the active area of the display. Multiple gate lines carrying the same signal may be merged together prior to being routed around the hole to help minimize the routing line congestion around the border of the hole. Dummy circuits may be coupled to the merged segment portion to help increase the parasitic loading on the merged segments. The hole may have a tapered shape to help maximize the size of the active area. The hole may have an asymmetric shape to accommodate multiple sub-display sensor components.

Abstract: A display may have both a full pixel density region and a pixel removal region with a plurality of high-transmittance areas that overlap an optical sensor. Each high-transmittance area may be devoid of thin-film transistors and other display components. To improve transmission while maintaining satisfactory touch sensing performance, one or more segments of the touch sensor metal in the pixel removal region may have a reduced width relative to the touch sensor metal in the full pixel density region and/or one or more segments of the touch sensor metal in the pixel removal region may be omitted relative to the touch sensor metal in the full pixel density region. To mitigate a different appearance between the pixel removal region and the full pixel density region at off-axis viewing angles, the position of the touch sensor metal in the pixel removal region may be tuned.

Abstract: A display may have both a full pixel density region and a pixel removal region with a plurality of high-transmittance areas that overlap an optical sensor. Each high-transmittance area may be devoid of thin-film transistors and other display components. To improve transmission while maintaining satisfactory touch sensing performance, one or more segments of the touch sensor metal in the pixel removal region may have a reduced width relative to the touch sensor metal in the full pixel density region and/or one or more segments of the touch sensor metal in the pixel removal region may be omitted relative to the touch sensor metal in the full pixel density region. To mitigate a different appearance between the pixel removal region and the full pixel density region at off-axis viewing angles, the position of the touch sensor metal in the pixel removal region may be tuned.

Abstract: A display may have rows and columns of pixels. Gate lines may be used to supply gate signals to rows of the pixels. Data lines may be used to supply data signals to columns of the pixels. The data lines may include alternating even and odd data lines. Data lines may be organized in pairs each of which includes one of the odd data lines and an adjacent one of the even data lines. Demultiplexer circuitry may be configured dynamically during data loading and pixel sensing operations. During data loading, data from display driver circuitry may be supplied, alternately to odd pairs of the data lines and even pairs of the data lines. During sensing, the demultiplexer circuitry may couple a pair of the even data lines to sensing circuitry in the display driver circuitry and then may couple a pair of the odd data lines to the sensing circuitry.

Abstract: A display may have an array of pixels. The pixels may contain light-emitting diodes. When it is desired to use the display to operate as a light sensor, some of the light-emitting diodes may be forward biased to emit light while some of the light-emitting diodes are reversed biased to detect the emitted light after the emitted light has reflected from an external object. During light sensing operations, one or more areas of the display may be temporarily deactivated so that the light-sensing pixels may measure the reflected light. Vertical lines may serve both as data loading lines and as current sensing lines. Currents may be sensed during drive transistor current compensation and during light sensing. The vertical lines may load signals into the pixels that forward bias the light-emitting diodes to emit light when it is desired to display images for a user.

Abstract: An electronic device comprises a display and a controller. The controller is configured to provide a first frequency refresh rate to the display. The controller is also configured to generate a control signal configured to control emission of a light emitting diode of a display pixel of the display at a second frequency based on whether the first frequency refresh rate of the display is less than a predetermined threshold value.

Abstract: An organic light-emitting diode display may have thin-film transistor circuitry formed on a substrate. The display and substrate may have rounded corners. A pixel definition layer may be formed on the thin-film transistor circuitry. Openings in the pixel definition layer may be provided with emissive material overlapping respective anodes for organic light-emitting diodes. A cathode layer may cover the array of pixels. A ground power supply path may be used to distribute a ground voltage to the cathode layer. The ground power supply path may be formed from a metal layer that is shorted to the cathode layer using portions of a metal layer that forms anodes for the diodes, may be formed from a mesh shaped metal pattern, may have L-shaped path segments, may include laser-deposited metal on the cathode layer, and may have other structures that facilitate distribution of the ground power supply.