Abstract: Methods and devices are provided for reducing the decoding latency introduced by LMCS. In one method, one or more luma prediction sample values are selected from an output of a bilinear filter of Decoder-side Motion Vector Derivation (DMVR), the one or more selected luma prediction sample values are adjusted into luma prediction sample values with the same bit depth as an original coding bit depth of an input video, the luma prediction sample values with the same bit depth as the original coding bit depth of the input video are used to derive a scaling factor for decoding one or more chroma residual samples, the scaling factor is used to scale one or more chroma residual samples, and one or more chroma residual samples are reconstructed by adding the one or more scaled chroma residual samples and their corresponding chroma prediction samples.

Abstract: Provided is a pharmaceutical composition including gastrodin and a use thereof for the prevention or the treatment of amyotrophic lateral sclerosis. The pharmaceutical composition is effective in reducing neuronal axon degeneration and neurofibromin accumulation, improving symptoms of amyotrophic lateral sclerosis and extending life of patients of amyotrophic lateral sclerosis.

Abstract: A bit-width representation method of prediction refinement with optical flow (PROF), apparatus, and a non-transitory computer-readable storage medium are provided. The method includes obtaining a reference picture I associated with a video block within the video signal, obtaining prediction samples I(i,j) of the video block from a reference block in the reference picture I, controlling internal bit-widths of a PROF derivation process for various representation precisions of internal PROF parameters by applying right-shifting to the internal PROF parameters based on different bit-shift values, obtaining prediction refinement values for samples in the video block based on the PROF derivation process being applied to the video block based on the prediction samples I(i,j), and obtaining prediction samples of the video block based on the combination of the prediction samples and the prediction refinement values.

Abstract: A method for video coding is provided. The method includes: deriving an initial motion vector (MV) of a current block; deriving a plurality of MV candidates for decoder-side motion vector refinement (DMVR); determining cost values for the initial MV and each of the MV candidates; obtaining updated cost values of both the initial MV and the MV candidates by adjusting at least one of the cost values to favor the initial MV; and deriving a refined MV based on the updated cost values of both the initial MV and the MV candidate.

Abstract: The present disclosure relates to an intra sub-partition (ISP) method of decoding a video signal.

Abstract: Methods, apparatuses, and non-transitory computer-readable storage mediums are provided for decoding a video signal. The method includes obtaining a first reference picture I associated with a video block, obtaining control point motion vectors (CPMVs) of an affine coding block based on the video block, obtaining prediction samples I(i, j) of the affine coding block, deriving PROF prediction sample refinements of the affine coding block based on the PROF, receiving an LIC flag that indicates whether the LIC is applied to the affine coding block, deriving, and when the LIC is applied, LIC weight and offset based on neighboring reconstructed samples of the affine coding block and their corresponding reference samples in the first reference picture, and obtaining final prediction samples of the affine coding block based on the PROF prediction sample refinements and the LIC weight and offset.

Abstract: A method for video coding is provided. The method includes: deriving an initial motion vector (MV) of a current block; deriving, by a decoder, an initial motion vector (MV) of a current block; determining, by the decoder, cost values for the initial MV and each of a plurality of MV candidates; obtaining, by the decoder, updated cost values by decreasing a cost value for the initial MV or increasing cost values for the MV candidates; and deriving, by the decoder, a refined MV based on the updated cost values.

Abstract: A media docking device includes an input circuit, an output circuit and a processing circuit. The input circuit is electrically connected to a media source device for receiving media data. The output circuit is electrically connected to a media play device. The processing circuit is electrically connected to the input circuit and the output circuit. The processing circuit determines if a verification procedure is passed. If the verification procedure is passed, the processing circuit transfers the media data to the media play device. If the verification procedure is not passed, the processing circuit limits a transmission of the media data, such that the media data will not be completely played by the media play device.

Abstract: A media docking device includes an input module, an output module and a processing module. The input module is electrically connected to a media source device for receiving media data. The output module is electrically connected to a media play device. The processing module determines if an instruction is received from the media source device or a remote device. If the instruction is not received, the processing module transfers the media data to the output module to transmit to the media play device. If the instruction is received, the processing module limits a transmission of the media data according to the instruction, such that the media data will not be completely played by the media play device.

Abstract: A fan is provided herein, including a housing, a hub, and a plurality of blades. The housing includes a top case and a bottom case. The hub is rotatably disposed between the top case and the bottom case in an axial direction. The blades extend from the hub in a radial direction, located between the top case and the bottom case. Each of the blades has a proximal end and a distal end. The proximal end is connected to the hub. The distal end is opposite from the proximal end, located at the other side of the blade, having at least one recessed portion. Each of the recessed portions form a passage for air.

Abstract: An electronic apparatus performs a method of updating an inter-predicted current block using a neighboring affine block. The electronic apparatus first identifies a pixel within the inter-predicted current block, the pixel having a first inter-predicted pixel value. Next, the electronic apparatus determines a motion vector difference for the pixel based on a set of affine parameters of the neighboring affine block and then a pixel value difference for the pixel according to the motion vector difference. The pixel value difference is an inner product of the pixel value gradient vector and the motion vector difference as the pixel value difference. Finally, the electronic apparatus updates the first inter-predicted pixel value with the pixel value difference as a second inter-predicted pixel value.

Abstract: Methods and devices are provided for deriving constructed affine merge candidates. The method includes obtaining a first reference picture and a second reference picture associated with an inter mode coded block, where the first reference picture is before a current picture and the second reference picture is after the current picture in display order, obtaining a first motion vector from the inter mode coded block to a reference block in the first reference picture, obtaining a second motion vector from the inter mode coded block to a reference block in the second reference picture, applying bi-directional optical flow (BDOF) or decoder-side motion vector refinement (DMVR) to the inter mode coded block based on a mode information of the inter mode coded block, and predicting a bi-prediction of the inter mode coded block based on the applied BDOF or DMVR.

Abstract: A method of video coding comprises independently generating a respective intra prediction for each of a plurality of corresponding sub-partitions. Each respective intra prediction is generated using a plurality of reference samples from a current coding block. Illustratively, no reconstructed sample from a first sub-partition of the plurality of corresponding sub-partitions is used to generate a respective intra prediction for any other sub-partition of the plurality of corresponding sub-partitions, and each of the plurality of corresponding sub-partitions has a width less than or equal to 2.

Abstract: In example implementations, a computing device is provided. The computing device includes a system management bus, a controller communicatively coupled to the system management bus, a noise generating component communicatively coupled to the controller, a noise cancellation codec communicatively coupled to the system management bus, and a speaker communicatively coupled to the noise cancellation codec. The operating parameters of the noise generating component are provided to the controller. The noise cancellation codec is to receive the operating parameters of the noise generating component from the controller via the system management bus and to generate a noise cancellation signal based on the operating parameters. The speaker outputs the noise cancellation signal to cancel noise generated by the noise generating component.

Abstract: A method of decoding a video signal, apparatus, and a non-transitory computer-readable storage medium are provided. The method includes obtaining a video block from the video signal, obtaining spatial neighboring blocks based on the video block, obtaining up to one left non-scaled motion vector predictor (MVP) based on the multiple left spatial neighboring blocks, obtaining up to one above non-scaled MVP based on the multiple above spatial neighboring blocks, deriving, at the decoder and by reducing possibility of selecting scaled MVPs derived from the spatial neighboring blocks, an MVP candidate list based on the video block, the multiple left spatial neighboring blocks, the multiple above spatial neighboring blocks, receiving a best MVP based on the MVP candidate list, and obtaining a prediction signal of the video block based on the best MVP.

Abstract: The present invention provides a semiconductor memory device including a substrate, a plurality of capacitors and a supporting layer disposed on the substrate, wherein each of the capacitors is connected with at least one of the adjacent capacitors through the supporting layer. Each of the capacitors includes first electrodes, a high-k dielectric layer and a second electrode, and the high-k dielectric layer is disposed between the first electrodes and the second electrode. Due to the supporting layer directly contacts the high-k dielectric layer through a surface thereof, and the high-k dielectric layer completely covers the surface, the second electrode may be formed directly within openings with an enlarged dimension. Accordingly, the process difficulty of performing the deposition and etching processes within the openings may be reduced, and the capacitance of the capacitors is further increased.

Abstract: A method of manufacturing a semiconductor memory device is provided in the present invention, including steps of providing a substrate, forming word lines extending in a first direction in said substrate, forming bit lines extending in a second direction over said word lines, forming partition structures between said bit lines and right above said word lines, forming storage node contacts in spaces defined by said bit lines and said partition structures, wherein a portion of said storage node contact protruding from top surfaces of said bit lines and said partition structures is contact pad, forming a silicon nitride liner on said contact pads, said bit lines and said partition structures, and forming a silicon oxide layer on said silicon nitride liner.

Abstract: A semiconductor memory device is provided in the present invention, including a substrate, word lines in the substrate, bit lines over the word lines, partition structures between the bit lines and right above the word lines, storage node contacts in spaces defined by the bit lines and the partition structures and electrically connecting with the substrate, wherein a portion of the storage node contact protruding from top surfaces of the bit lines and the partition structures is contact pad, and contact pad isolation structures on the partition structures and between the contact pads, wherein the contact pad isolation structure includes outer silicon nitride layers and inner silicon oxide layers.

Abstract: The present invention provides a semiconductor memory device including a substrate, a plurality of capacitors and a supporting layer disposed on the substrate, wherein each of the capacitors is connected with at least one of the adjacent capacitors through the supporting layer. Each of the capacitors includes first electrodes, a high-k dielectric layer and a second electrode, and the high-k dielectric layer is disposed between the first electrodes and the second electrode. Due to the supporting layer directly contacts the high-k dielectric layer through a surface thereof, and the high-k dielectric layer completely covers the surface, the second electrode may be formed directly within openings with an enlarged dimension. Accordingly, the process difficulty of performing the deposition and etching processes within the openings may be reduced, and the capacitance of the capacitors is further increased.

Abstract: The present invention provides a semiconductor memory device and a fabricating method thereof. The semiconductor memory device includes a substrate, a plurality of capacitors and a supporting layer disposed on the substrate, wherein each of the capacitors is connected with at least one of the adjacent capacitors through the supporting layer. Each of the capacitors includes first electrodes, a high-k dielectric layer and a second electrode, and the high-k dielectric layer is disposed between the first electrodes and the second electrode. Due to the supporting layer directly contacts the high-k dielectric layer through a surface thereof, and the high-k dielectric layer completely covers the surface, the second electrode may be formed directly within openings with an enlarged dimension. Accordingly, the process difficulty of performing the deposition and etching processes within the openings may be reduced, and the capacitance of the capacitors is further increased.