Patents by Inventor Tsutomu Ishino

Tsutomu Ishino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12166419
    Abstract: Disclosed is a control circuit of a boost DC-DC converter including a high side transistor and a low side transistor, and a load switch connected between the high side transistor and an output line of the boost DC-DC converter. The control circuit includes a pulse modulator that generates a pulse signal with a pulse modulated to bring an output voltage of the output line close to a target level, a logic circuit that generates a high side control signal and a low side control signal based on the pulse signal, a load switch drive circuit that drives a first PMOS transistor provided as the load switch, and a current detection circuit that generates a current detection signal indicating a current flowing through the first PMOS transistor. The load switch drive circuit is switchable between a first mode and a second mode.
    Type: Grant
    Filed: June 13, 2022
    Date of Patent: December 10, 2024
    Assignee: ROHM Co., Ltd.
    Inventors: Shun Fukushima, Tomohisa Shinozaki, Tsutomu Ishino
  • Patent number: 12081125
    Abstract: A control circuit of a boost DC/DC converter including a high side transistor and a low side transistor, includes a pulse modulator including a first error amplifier that amplifies an error between a reference voltage and a feedback signal corresponding to an output voltage of the converter, the pulse modulator being configured to generate a pulse signal with a pulse modulated, a logic circuit that generates a high side control signal and a low side control signal, and a load switch drive circuit that drives a load switch that is a PMOS transistor connected between the high side transistor and a load. The load switch drive circuit can make a switch between a first mode for fully turning on the PMOS transistor and a second mode for supplying a drive voltage corresponding to the output signal of the first error amplifier to a gate of the PMOS transistor.
    Type: Grant
    Filed: June 6, 2022
    Date of Patent: September 3, 2024
    Assignee: ROHM Co., Ltd.
    Inventors: Shun Fukushima, Tomohisa Shinozaki, Tsutomu Ishino
  • Patent number: 12057775
    Abstract: The present disclosure provides a current detecting circuit, a synchronous rectification type DC/DC buck converter and a control circuit thereof. The current detection circuit is used with a push-pull switching circuit to detect a source current flowing in a low-side transistor. The switching circuit, (i) in a first phase, connects a first end of the capacitor to a ground line, and connects a second end of the capacitor to a switch line connecting a high-side transistor and the low-side transistor. The switching circuit, (ii) in a second phase, sets the first end of the capacitor to a high impedance, and connects a second end of the capacitor to the ground line. An output circuit has a high impedance input and outputs a current detection signal based on a voltage generated at the first end of the capacitor in the second phase.
    Type: Grant
    Filed: March 16, 2022
    Date of Patent: August 6, 2024
    Assignee: ROHM CO., LTD.
    Inventor: Tsutomu Ishino
  • Patent number: 12003181
    Abstract: The present disclosure relates to a buck DC/DC converter, a controller thereof and controlling method thereof, and an electronic device. A pulse modulator generates a pulse modulation signal such that an output of the buck DC/DC converter is pulse-modulated to approach a target state. An overcurrent detection circuit compares a low-side current flowing through a low-side transistor with a predetermined overcurrent threshold value to generate an overcurrent detection signal that is asserted when the low-side current is greater than the overcurrent threshold value. (i) In a first mode, the control pulse that is input to the driver circuit corresponds to the pulse modulation signal, and (ii) in a second mode, the control pulse takes a second level for a period during which the overcurrent detection signal is asserted and takes a first level during a fixed on time after the overcurrent detection signal is negated.
    Type: Grant
    Filed: March 18, 2022
    Date of Patent: June 4, 2024
    Assignee: ROHM CO., LTD.
    Inventor: Tsutomu Ishino
  • Patent number: 11936298
    Abstract: The present disclosure relates to a high-side transistor drive circuit, a switching circuit and a controller of a DC/DC converter. A pulse generator generates a first pulse that becomes high level for a certain period of time in response to a first edge of an input signal and a second pulse that becomes high level for a certain period of time in response to a second edge of the input signal. An open drain circuit has a first output node that becomes low level in response to the first pulse and a second output node that becomes low level in response to the second pulse. A first current mirror circuit folds back a first current flowing through the first output node of the open drain circuit. A second current mirror circuit folds back a second current flowing through the second output node of the open drain circuit.
    Type: Grant
    Filed: March 16, 2022
    Date of Patent: March 19, 2024
    Assignee: ROHM CO., LTD.
    Inventor: Tsutomu Ishino
  • Publication number: 20220407419
    Abstract: Disclosed is a control circuit of a boost DC-DC converter including a high side transistor and a low side transistor, and a load switch connected between the high side transistor and an output line of the boost DC-DC converter. The control circuit includes a pulse modulator that generates a pulse signal with a pulse modulated to bring an output voltage of the output line close to a target level, a logic circuit that generates a high side control signal and a low side control signal based on the pulse signal, a load switch drive circuit that drives a first PMOS transistor provided as the load switch, and a current detection circuit that generates a current detection signal indicating a current flowing through the first PMOS transistor. The load switch drive circuit is switchable between a first mode and a second mode.
    Type: Application
    Filed: June 13, 2022
    Publication date: December 22, 2022
    Inventors: Shun FUKUSHIMA, Tomohisa Shinozaki, Tsutomu Ishino
  • Publication number: 20220393593
    Abstract: A control circuit of a boost DC/DC converter including a high side transistor and a low side transistor, includes a pulse modulator including a first error amplifier that amplifies an error between a reference voltage and a feedback signal corresponding to an output voltage of the converter, the pulse modulator being configured to generate a pulse signal with a pulse modulated, a logic circuit that generates a high side control signal and a low side control signal, and a load switch drive circuit that drives a load switch that is a PMOS transistor connected between the high side transistor and a load. The load switch drive circuit can make a switch between a first mode for fully turning on the PMOS transistor and a second mode for supplying a drive voltage corresponding to the output signal of the first error amplifier to a gate of the PMOS transistor.
    Type: Application
    Filed: June 6, 2022
    Publication date: December 8, 2022
    Inventors: Shun Fukushima, Tomohisa Shinozaki, Tsutomu Ishino
  • Publication number: 20220302841
    Abstract: The present disclosure provides a current detecting circuit, a synchronous rectification type DC/DC buck converter and a control circuit thereof. The current detection circuit is used with a push-pull switching circuit to detect a source current flowing in a low-side transistor. The switching circuit, (i) in a first phase, connects a first end of the capacitor to a ground line, and connects a second end of the capacitor to a switch line connecting a high-side transistor and the low-side transistor. The switching circuit, (ii) in a second phase, sets the first end of the capacitor to a high impedance, and connects a second end of the capacitor to the ground line. An output circuit has a high impedance input and outputs a current detection signal based on a voltage generated at the first end of the capacitor in the second phase.
    Type: Application
    Filed: March 16, 2022
    Publication date: September 22, 2022
    Inventor: Tsutomu ISHINO
  • Publication number: 20220302842
    Abstract: The present disclosure relates to a buck DC/DC converter, a controller thereof and controlling method thereof, and an electronic device. A pulse modulator generates a pulse modulation signal such that an output of the buck DC/DC converter is pulse-modulated to approach a target state. An overcurrent detection circuit compares a low-side current flowing through a low-side transistor with a predetermined overcurrent threshold value to generate an overcurrent detection signal that is asserted when the low-side current is greater than the overcurrent threshold value. (i) In a first mode, the control pulse that is input to the driver circuit corresponds to the pulse modulation signal, and (ii) in a second mode, the control pulse takes a second level for a period during which the overcurrent detection signal is asserted and takes a first level during a fixed on time after the overcurrent detection signal is negated.
    Type: Application
    Filed: March 18, 2022
    Publication date: September 22, 2022
    Inventor: Tsutomu ISHINO
  • Publication number: 20220302839
    Abstract: The present disclosure relates to a high-side transistor drive circuit, a switching circuit and a controller of a DC/DC converter. A pulse generator generates a first pulse that becomes high level for a certain period of time in response to a first edge of an input signal and a second pulse that becomes high level for a certain period of time in response to a second edge of the input signal. An open drain circuit has a first output node that becomes low level in response to the first pulse and a second output node that becomes low level in response to the second pulse. A first current mirror circuit folds back a first current flowing through the first output node of the open drain circuit. A second current mirror circuit folds back a second current flowing through the second output node of the open drain circuit.
    Type: Application
    Filed: March 16, 2022
    Publication date: September 22, 2022
    Inventor: Tsutomu ISHINO
  • Patent number: 10389339
    Abstract: A slew rate control device for controlling a slew rate, includes: a setting part configured to set a voltage value used to determine the slew rate; and a control part configured to control the slew rate, based on the voltage value set by the setting part, so that the slew rate becomes slower as an output voltage of a power supply approaches from a transition starting voltage to a target voltage.
    Type: Grant
    Filed: April 13, 2017
    Date of Patent: August 20, 2019
    Assignee: ROHM CO., LTD.
    Inventors: Tetsuro Hashimoto, Tsutomu Ishino
  • Publication number: 20170346402
    Abstract: A pulse modulator generates a pulse signal, such that an output signal of a DC/DC converter approaches a target value. When a detection value of a coil current of the DC/DC converter crosses a threshold for zero crossing, a reverse flow detection circuit asserts a reverse flow detection signal and turns off a synchronous rectification transistor of the DC/DC converter. An optimizer controls an operation parameter of the reverse flow detection circuit, on the basis of a cycle of the pulse signal.
    Type: Application
    Filed: May 24, 2017
    Publication date: November 30, 2017
    Inventors: Tsutomu ISHINO, Tetsuro HASHIMOTO
  • Publication number: 20170317667
    Abstract: A slew rate control device for controlling a slew rate, includes: a setting part configured to set a voltage value used to determine the slew rate, and a control part configured to control the slew rate, based on the voltage value set by the setting part, so that the slew rate becomes slower as an output voltage of a power supply approaches from a transition starting voltage to a target voltage.
    Type: Application
    Filed: April 13, 2017
    Publication date: November 2, 2017
    Inventors: Tetsuro HASHIMOTO, Tsutomu ISHINO
  • Publication number: 20150015219
    Abstract: A DC/DC converter comprises: inductors L provided for respective channels; switching circuits provided for the respective channels; and a controller configured to change the number of channels to be activated, i.e., K, according to an amount of a load current IOUT that flows through a load, and to control the switching circuits that correspond to the activated channels such that a feedback voltage VFB that corresponds to an output voltage VOUT matches a predetermined target voltage VREF. The controller activates only a single channel in a lightest load state. The inductance L of the inductor L provided for the aforementioned single channel is set to a value that differs from the inductances of the inductors L of the other channels so as to provide high efficiency in the lightest load state.
    Type: Application
    Filed: April 15, 2014
    Publication date: January 15, 2015
    Applicant: ROHM CO., LTD
    Inventors: Tsutomu ISHINO, Tadayuki SAKAMOTO
  • Patent number: 8912777
    Abstract: The present invention improves the efficiency of a switching power supply in a light load. A control circuit is configured to repeat a driving duration enabling the switching element to be switched and a stop duration stopping the switching in a light load state. A pulse signal generating portion generates a driving pulse signal, in which the driving pulse signal at least includes a pulse in the driving duration, and the lighter a load is, the less the number of pulses in the driving duration is. A first driver drives a first switching transistor according to the at least one pulse in the driving pulse signal other than predetermined K pulses (K is a natural number). The K pulses are in the driving pulse signal when the number of the pulses is reduced to K.
    Type: Grant
    Filed: August 15, 2012
    Date of Patent: December 16, 2014
    Assignee: Rohm Co., Ltd.
    Inventor: Tsutomu Ishino
  • Patent number: 8786247
    Abstract: A charging circuit receives electric power from a solar battery, and charges a secondary battery. A charging current detection unit generates a detection signal that corresponds to a charging current supplied from a DC/DC converter to the secondary battery. A control circuit generates a reference voltage that corresponds to the detection signal. A driving unit generates a pulse signal having a duty ratio that is adjusted such that the voltage output from the solar battery matches the reference voltage, and performs switching of a switching transistor according to the pulse signal. A control circuit adjusts the reference voltage such that the reference voltage becomes greater.
    Type: Grant
    Filed: September 14, 2011
    Date of Patent: July 22, 2014
    Assignee: Rohm Co., Ltd.
    Inventors: Tsutomu Ishino, Tadayuki Sakamoto
  • Patent number: 8716995
    Abstract: An error amplifier generates an error signal VERR that corresponds to the difference between a feedback signal VFB and a predetermined reference voltage VREF. A first oscillator generates a first cyclic signal VOSC1 having a sloping segment and a first frequency. A second oscillator generates a second cyclic signal VOSC2 having a sloping segment and a second frequency that is lower than the first frequency. A first pulse modulator generates a first pulse signal having a pulse width that corresponds to the error signal VERR, and clamps its pulse width such that it does not become smaller than a first minimum pulse width. A second pulse modulator generates a second pulse signal having a pulse width that corresponds to the error signal VERR. A synthesizing unit combines the first pulse signal and the second pulse signal so as to generate a driving pulse signal.
    Type: Grant
    Filed: November 17, 2011
    Date of Patent: May 6, 2014
    Assignee: Rohm Co., Ltd.
    Inventor: Tsutomu Ishino
  • Publication number: 20130043851
    Abstract: The present invention improves the efficiency of a switching power supply in a light load. A control circuit is configured to repeat a driving duration enabling the switching element to be switched and a stop duration stopping the switching in a light load state. A pulse signal generating portion generates a driving pulse signal, in which the driving pulse signal at least includes a pulse in the driving duration, and the lighter a load is, the less the number of pulses in the driving duration is. A first driver drives a first switching transistor according to the at least one pulse in the driving pulse signal other than predetermined K pulses (K is a natural number). The K pulses are in the driving pulse signal when the number of the pulses is reduced to K.
    Type: Application
    Filed: August 15, 2012
    Publication date: February 21, 2013
    Applicant: ROHM CO., LTD.
    Inventor: Tsutomu ISHINO
  • Publication number: 20120235623
    Abstract: A charging circuit receives electric power from a solar battery, and charges a secondary battery. A charging current detection unit generates a detection signal that corresponds to a charging current supplied from a DC/DC converter to the secondary battery. A control circuit generates a reference voltage that corresponds to the detection signal. A driving unit generates a pulse signal having a duty ratio that is adjusted such that the voltage output from the solar battery matches the reference voltage, and performs switching of a switching transistor according to the pulse signal. A control circuit adjusts the reference voltage such that the reference voltage becomes greater.
    Type: Application
    Filed: September 14, 2011
    Publication date: September 20, 2012
    Applicant: ROHM CO., LTD.
    Inventors: Tsutomu ISHINO, Tadayuki Sakamoto
  • Publication number: 20120126768
    Abstract: An error amplifier generates an error signal VERR that corresponds to the difference between a feedback signal VFB and a predetermined reference voltage VREF. A first oscillator generates a first cyclic signal VOSC1 having a sloping segment and a first frequency. A second oscillator generates a second cyclic signal VOSC2 having a sloping segment and a second frequency that is lower than the first frequency. A first pulse modulator generates a first pulse signal having a pulse width that corresponds to the error signal VERR, and clamps its pulse width such that it does not become smaller than a first minimum pulse width. A second pulse modulator generates a second pulse signal having a pulse width that corresponds to the error signal VERR. A synthesizing unit combines the first pulse signal and the second pulse signal so as to generate a driving pulse signal.
    Type: Application
    Filed: November 17, 2011
    Publication date: May 24, 2012
    Applicant: ROHM CO., LTD.
    Inventor: Tsutomu ISHINO