Patents by Inventor Tsutomu Nakanishi
Tsutomu Nakanishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11956942Abstract: According to one embodiment, a device includes: a circuit on a first surface of a substrate and including a first contact; an aluminum oxide layer above the substrate in a first direction perpendicular to the first surface; a cell including a capacitor provided in the aluminum oxide layer; a first conductive layer provided between the substrate and the aluminum oxide layer in the first direction and connected to the cell; a first insulating layer between the first conductive layer and the substrate in the first direction; a second insulating layer adjacent to the aluminum oxide layer in a second direction parallel to the first surface and provided above the substrate in the first direction; and a second contact in the second insulating layer and above the first contact in the first direction to connect the cell to the first contact.Type: GrantFiled: September 10, 2021Date of Patent: April 9, 2024Assignee: Kioxia CorporationInventors: Mutsumi Okajima, Yasuaki Ootera, Tsutomu Nakanishi
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Publication number: 20240099155Abstract: A memory includes: a magnet including a first and second portions adjacent in a first direction. The first portion has a first dimension in a second direction at a first position at which a dimension of the magnet in the second direction is maximum, the second direction perpendicular to the first direction, the second portion has a second dimension in the second direction at a second position at which a dimension of the magnet in the second direction is minimum, the second dimension smaller than the first dimension, the first portion is continuous to the second portion via a third position between the first and second positions, a curve corresponding to an outer of the magnet extends between the first and third positions, and the curve passes through a side closer to the central axis of the magnet than a straight line connecting the first and second positions.Type: ApplicationFiled: September 11, 2023Publication date: March 21, 2024Applicant: Kioxia CorporationInventors: Masahiro KOIKE, Michael Arnaud QUINSAT, Nobuyuki UMETSU, Tsutomu NAKANISHI, Agung SETIADI, Megumi YAKABE, Shigeyuki HIRAYAMA, Masaki KADO, Yasuaki OOTERA, Shiho NAKAMURA, Susumu HASHIMOTO, Tsuyoshi KONDO
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Publication number: 20230309321Abstract: A magnetic memory includes first magnetic members extending along a first direction. First and second wirings are spaced apart from the first magnetic members on a second end side of the first magnetic members. At least one of the first magnetic members is between the first and second wirings in a plan view from the first direction. A second magnetic member has a first portion facing the first wiring and electrically connected to a first magnetic member on one side and a second portion facing the first wiring on an opposite side. The second portion is electrically connected to another first magnetic member. A control circuit causes a current to flow through one of the first wiring or the second wiring when data is written into the first magnetic member that is between the first wiring and the second wiring.Type: ApplicationFiled: August 29, 2022Publication date: September 28, 2023Inventors: Naoharu SHIMOMURA, Tsuyoshi KONDO, Yoshihiro UEDA, Yasuaki OOTERA, Akihito YAMAMOTO, Mutsumi OKAJIMA, Masaki KADO, Tsutomu NAKANISHI, Nobuyuki UMETSU, Michael Arnaud QUINSAT
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Publication number: 20220310613Abstract: According to one embodiment, a device includes: a circuit on a first surface of a substrate and including a first contact; an aluminum oxide layer above the substrate in a first direction perpendicular to the first surface; a cell including a capacitor provided in the aluminum oxide layer; a first conductive layer provided between the substrate and the aluminum oxide layer in the first direction and connected to the cell; a first insulating layer between the first conductive layer and the substrate in the first direction; a second insulating layer adjacent to the aluminum oxide layer in a second direction parallel to the first surface and provided above the substrate in the first direction; and a second contact in the second insulating layer and above the first contact in the first direction to connect the cell to the first contact.Type: ApplicationFiled: September 10, 2021Publication date: September 29, 2022Applicant: Kioxia CorporationInventors: Mutsumi OKAJIMA, Yasuaki OOTERA, Tsutomu NAKANISHI
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Publication number: 20220302370Abstract: A magnetic memory according to en embodiment includes: a first and second wirings; an insulator portion; a magnetic member including: a first portion electrically connected to the first wiring; a second portion electrically connected to the second wiring; and a third portion disposed between the first and second portions, the magnetic member extending in a first direction from the first portion toward the second portion and surrounding the insulator portion, and in a cross-section parallel to the first direction and including part of the magnetic member and part of the insulator portion, a curvature of the first portion being smaller than a curvature of the third portion, a length of the first portion in the first direction being greater than half a length of the third portion in the first direction; and a control circuit electrically connected to the first and second wirings.Type: ApplicationFiled: September 10, 2021Publication date: September 22, 2022Applicant: Kioxia CorporationInventors: Nobuyuki UMETSU, Yasuaki OOTERA, Masaki KADO, Michael ARNAUD QUINSAT, Naoharu SHIMOMURA, Tsutomu NAKANISHI, Shiho NAKAMURA, Susumu HASHIMOTO, Tsuyoshi KONDO
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Publication number: 20220302208Abstract: A storage device includes: a memory unit and a first pillar. The first pillar includes: a first region having a third portion between a first and a second portion respectively having a first and a second maximum diameter, and having a first minimum diameter, the first and second portions defining a first distance; a second region having a sixth portion between a fourth and a fifth portion respectively having a third and a fourth maximum diameter, and having a second minimum diameter, the fourth and fifth portions defining a second distance; and a third region between the first and second regions, having a ninth portion between a seventh and an eighth portion respectively having a fifth and a sixth maximum diameter, and having a third minimum diameter, the seventh and eighth portions defining a third distance shorter than each of the first and second distances.Type: ApplicationFiled: September 3, 2021Publication date: September 22, 2022Applicant: Kioxia CorporationInventors: Tsutomu NAKANISHI, Yasuaki OOTERA, Nobuyuki UMETSU, Michael Arnaud QUINSAT, Masaki KADO, Susumu HASHIMOTO, Shiho NAKAMURA, Naoharu SHIMOMURA, Tsuyoshi KONDO, Mutsumi OKAJIMA
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Patent number: 11417831Abstract: A magnetic memory according to an embodiment includes: a magnetic member including a first to third magnetic parts, the first magnetic part including a first portion and a second portion and extending in a first direction from the first portion to the second portion, the second magnetic part extending in a second direction that crosses the first direction, and the third magnetic part connecting the second magnetic part and the first portion; a first nonmagnetic metal layer arranged along the third magnetic part, the first nonmagnetic metal layer including a first end portion on a side of the second portion, a position of the first end portion along the first direction being between positions of the first and second portions along the first direction; and a first and second electrodes supplying a current between the first and second magnetic parts via the third magnetic part.Type: GrantFiled: August 13, 2019Date of Patent: August 16, 2022Assignee: KIOXIA CORPORATIONInventors: Nobuyuki Umetsu, Tsuyoshi Kondo, Masaki Kado, Shiho Nakamura, Susumu Hashimoto, Yasuaki Ootera, Michael Arnaud Quinsat, Masahiro Koike, Tsutomu Nakanishi, Megumi Yakabe, Agung Setiadi
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Publication number: 20220077383Abstract: A magnetic memory according to an embodiment includes: a first wiring and a second wiring; a nonmagnetic conductor extending in a first direction; a first magnetic member including a first portion electrically connected to the first wiring and a second portion electrically connected to the second wiring, the first magnetic member extending in the first direction from the first portion to the second portion to surround the nonmagnetic conductor; an insulation portion disposed between the nonmagnetic conductor and the first magnetic member; and a controller electrically connected to the nonmagnetic conductor, the first wiring, and the second wiring.Type: ApplicationFiled: March 9, 2021Publication date: March 10, 2022Applicant: Kioxia CorporationInventors: Tsuyoshi KONDO, Nobuyuki UMETSU, Yasuaki OOTERA, Tsutomu NAKANISHI, Shigeyuki HIRAYAMA
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Patent number: 11232822Abstract: According to one embodiment, a magnetic memory includes a magnetic body with two portions of a first dimension in a first direction which are spaced from each other a second direction and another portion that has a second dimension less than the first dimension in the first direction, which is between the two other portions. A circuit supplies a shift pulse to the magnetic body. The shift pulse includes a first pulse and a second pulse and moves a domain wall in the magnetic body along the second direction. The first pulse has a first pulse width. The second pulse has a second pulse width less than the first pulse width. The second pulse is supplied to the magnetic body after the first pulse.Type: GrantFiled: September 2, 2020Date of Patent: January 25, 2022Assignee: KIOXIA CORPORATIONInventors: Michael Arnaud Quinsat, Tsuyoshi Kondo, Masahiro Koike, Shiho Nakamura, Susumu Hashimoto, Masaki Kado, Nobuyuki Umetsu, Yasuaki Ootera, Megumi Yakabe, Agung Setiadi, Shigeyuki Hirayama, Yoshihiro Ueda, Tsutomu Nakanishi
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Patent number: 11227646Abstract: According to one embodiment, a device includes a member including a first portion having a first dimension in first direction, a second portion spaced from the first portion and having a second dimension in the first direction, a third portion between the first and second portions and having a third dimension in the first direction, and a fourth portion between the first and third portions and having a fourth dimension in the first direction; and a circuit to supply a shift pulse including first and second pulses to the member and move a domain wall in the member. The third dimension is less than the first dimension. The second and fourth dimensions are less than the third dimension. A second value of the second pulse is less than a first value of the first pulse.Type: GrantFiled: September 11, 2020Date of Patent: January 18, 2022Assignee: KIOXIA CORPORATIONInventors: Masahiro Koike, Michael Arnaud Quinsat, Nobuyuki Umetsu, Tsutomu Nakanishi, Yasuaki Ootera, Tsuyoshi Kondo
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Patent number: 11217628Abstract: A magnetic memory according to an embodiment includes: a magnetic member having a cylindrical form, the magnetic member including a first end portion and a second end portion and extending in a first direction from the first end portion to the second end portion, the first end portion having an end face, which includes a face inclined with respect to a plane perpendicular to the first direction.Type: GrantFiled: August 5, 2019Date of Patent: January 4, 2022Assignee: TOSHIBA MEMORY CORPORATIONInventors: Yasuaki Ootera, Tsutomu Nakanishi, Megumi Yakabe, Nobuyuki Umetsu, Agung Setiadi, Tsuyoshi Kondo
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Patent number: 11152334Abstract: In one embodiment, a semiconductor device includes a first chip that includes a first interconnect layer, a first insulator provided on the first interconnect layer, a first metal portion provided on the first interconnect layer and provided in the first insulator and including at least one of palladium, platinum and gold, and a second interconnect layer provided on the first metal portion and provided in the first insulator. The device further includes a second chip that includes a second insulator provided on the first insulator, and a third interconnect layer provided in the second insulator and provided on the second interconnect layer.Type: GrantFiled: September 5, 2019Date of Patent: October 19, 2021Assignee: TOSHIBA MEMORY CORPORATIONInventors: Yusuke Tanaka, Atsushi Hieno, Tsutomu Nakanishi, Yasuhito Yoshimizu, Masayoshi Tagami
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Publication number: 20210295889Abstract: According to one embodiment, a device includes a member including a first portion having a first dimension in first direction, a second portion spaced from the first portion and having a second dimension in the first direction, a third portion between the first and second portions and having a third dimension in the first direction, and a fourth portion between the first and third portions and having a fourth dimension in the first direction; and a circuit to supply a shift pulse including first and second pulses to the member and move a domain wall in the member. The third dimension is less than the first dimension. The second and fourth dimensions are less than the third dimension. A second value of the second pulse is less than a first value of the first pulse.Type: ApplicationFiled: September 11, 2020Publication date: September 23, 2021Applicant: Kioxia CorporationInventors: Masahiro Koike, Michael Arnaud Quinsat, Nobuyuki Umetsu, Tsutomu Nakanishi, Yasuaki Ootera, Tsuyoshi Kondo
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Publication number: 20210249061Abstract: According to one embodiment, a magnetic memory includes a magnetic body with two portions of a first dimension in a first direction which are spaced from each other a second direction and another portion that has a second dimension less than the first dimension in the first direction, which is between the two other portions. A circuit supplies a shift pulse to the magnetic body. The shift pulse includes a first pulse and a second pulse and moves a domain wall in the magnetic body along the second direction. The first pulse has a first pulse width. The second pulse has a second pulse width less than the first pulse width. The second pulse is supplied to the magnetic body after the first pulse.Type: ApplicationFiled: September 2, 2020Publication date: August 12, 2021Inventors: Michael ARNAUD QUINSAT, Tsuyoshi Kondo, Masahiro Koike, Shiho Nakamura, Susumu Hashimoto, Masaki Kado, Nobuyuki Umetsu, Yasuaki Ootera, Megumi Yakabe, Agung Setiadi, Shigeyuki Hirayama, Yoshihiro Ueda, Tsutomu Nakanishi
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Publication number: 20200303624Abstract: A magnetic memory according to an embodiment includes: a magnetic member including a first to third magnetic parts, the first magnetic part including a first portion and a second portion and extending in a first direction from the first portion to the second portion, the second magnetic part extending in a second direction that crosses the first direction, and the third magnetic part connecting the second magnetic part and the first portion; a first nonmagnetic metal layer arranged along the third magnetic part, the first nonmagnetic metal layer including a first end portion on a side of the second portion, a position of the first end portion along the first direction being between positions of the first and second portions along the first direction; and a first and second electrodes supplying a current between the first and second magnetic parts via the third magnetic part.Type: ApplicationFiled: August 13, 2019Publication date: September 24, 2020Applicant: TOSHIBA MEMORY CORPORATIONInventors: Nobuyuki UMETSU, Tsuyoshi Kondo, Masaki Kado, Shiho Nakamura, Susumu Hashimoto, Yasuaki Ootera, Michael Arnaud Quinsat, Masahiro Koike, Tsutomu Nakanishi, Megumi Yakabe, Agung Setiadi
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Publication number: 20200303457Abstract: A magnetic memory according to an embodiment includes: a magnetic member having a cylindrical form, the magnetic member including a first end portion and a second end portion and extending in a first direction from the first end portion to the second end portion, the first end portion having an end face, which includes a face inclined with respect to a plane perpendicular to the first direction.Type: ApplicationFiled: August 5, 2019Publication date: September 24, 2020Applicant: TOSHIBA MEMORY CORPORATIONInventors: Yasuaki Ootera, Tsutomu Nakanishi, Megumi Yakabe, Nobuyuki Umetsu, Agung Setiadi, Tsuyoshi Kondo
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Publication number: 20200294971Abstract: In one embodiment, a semiconductor device includes a first chip that includes a first interconnect layer, a first insulator provided on the first interconnect layer, a first metal portion provided on the first interconnect layer and provided in the first insulator and including at least one of palladium, platinum and gold, and a second interconnect layer provided on the first metal portion and provided in the first insulator. The device further includes a second chip that includes a second insulator provided on the first insulator, and a third interconnect layer provided in the second insulator and provided on the second interconnect layer.Type: ApplicationFiled: September 5, 2019Publication date: September 17, 2020Applicant: Toshiba Memory CorporationInventors: Yusuke TANAKA, Atsushi Hieno, Tsutomu Nakanishi, Yasuhito Yoshimizu, Masayoshi Tagami
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Patent number: 10251628Abstract: According to one embodiment, an ultrasonic diagnostic apparatus comprises an ultrasonic probe, image generation circuitry, image generation circuitry, at least one light emission circuitry a plurality of optical detection circuits, a slide mechanism and analysis circuitry. The slide mechanism makes at least either the at least one light emission circuitry or the plurality of optical detection circuits slide to change positional relationships between the ultrasonic transmission/reception surface, the at least one light emission circuitry, and the plurality of optical detection circuits. The analysis circuitry analyzes a change in the light intensity detected for each of different positional relationships between the ultrasonic transmission/reception surface, the at least one light emission circuitry, and the plurality of optical detection circuits.Type: GrantFiled: March 11, 2016Date of Patent: April 9, 2019Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Satoshi Takayama, Taeko Urano, Kenji Nakamura, Tsutomu Nakanishi
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Patent number: 10249531Abstract: A method for forming a metal wiring according to embodiments includes forming a first insulating layer on a substrate; forming a catalyst adsorption layer by bringing a surface of the first insulating layer into contact with a solution containing a compound having a triazine skeleton, a first functional group of one of a silanol group and an alkoxysilyl group, and a second functional group of at least one selected from the group consisting of an amino group, a thiol group, a carboxyl group, and an azide group; forming a second insulating layer different from the first insulating layer on the catalyst adsorption layer; patterning the second insulating layer to form a mask pattern; etching the first insulating layer by a wet etching method; selectively forming a catalyst layer; and forming a metal layer on the catalyst layer by an electroless plating method.Type: GrantFiled: February 9, 2018Date of Patent: April 2, 2019Assignee: Toshiba Memory CorporationInventors: Atsushi Hieno, Tsutomu Nakanishi, Yusuke Tanaka, Yasuhito Yoshimizu, Akihiko Happoya
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Publication number: 20190088539Abstract: A method for forming a metal wiring according to embodiments includes forming a first insulating layer on a substrate; forming a catalyst adsorption layer by bringing a surface of the first insulating layer into contact with a solution containing a compound having a triazine skeleton, a first functional group of one of a silanol group and an alkoxysilyl group, and a second functional group of at least one selected from the group consisting of an amino group, a thiol group, a carboxyl group, and an azide group; forming a second insulating layer different from the first insulating layer on the catalyst adsorption layer; patterning the second insulating layer to form a mask pattern; etching the first insulating layer by a wet etching method; selectively forming a catalyst layer; and forming a metal layer on the catalyst layer by an electroless plating method.Type: ApplicationFiled: February 9, 2018Publication date: March 21, 2019Applicant: Toshiba Memory CorporationInventors: Atsushi Hieno, Tsutomu Nakanishi, Yusuke Tanaka, Yasuhito Yoshimizu, Akihiko Happoya