Patents by Inventor Tsutomu Nakanishi
Tsutomu Nakanishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20200303457Abstract: A magnetic memory according to an embodiment includes: a magnetic member having a cylindrical form, the magnetic member including a first end portion and a second end portion and extending in a first direction from the first end portion to the second end portion, the first end portion having an end face, which includes a face inclined with respect to a plane perpendicular to the first direction.Type: ApplicationFiled: August 5, 2019Publication date: September 24, 2020Applicant: TOSHIBA MEMORY CORPORATIONInventors: Yasuaki Ootera, Tsutomu Nakanishi, Megumi Yakabe, Nobuyuki Umetsu, Agung Setiadi, Tsuyoshi Kondo
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Publication number: 20200303624Abstract: A magnetic memory according to an embodiment includes: a magnetic member including a first to third magnetic parts, the first magnetic part including a first portion and a second portion and extending in a first direction from the first portion to the second portion, the second magnetic part extending in a second direction that crosses the first direction, and the third magnetic part connecting the second magnetic part and the first portion; a first nonmagnetic metal layer arranged along the third magnetic part, the first nonmagnetic metal layer including a first end portion on a side of the second portion, a position of the first end portion along the first direction being between positions of the first and second portions along the first direction; and a first and second electrodes supplying a current between the first and second magnetic parts via the third magnetic part.Type: ApplicationFiled: August 13, 2019Publication date: September 24, 2020Applicant: TOSHIBA MEMORY CORPORATIONInventors: Nobuyuki UMETSU, Tsuyoshi Kondo, Masaki Kado, Shiho Nakamura, Susumu Hashimoto, Yasuaki Ootera, Michael Arnaud Quinsat, Masahiro Koike, Tsutomu Nakanishi, Megumi Yakabe, Agung Setiadi
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Publication number: 20200294971Abstract: In one embodiment, a semiconductor device includes a first chip that includes a first interconnect layer, a first insulator provided on the first interconnect layer, a first metal portion provided on the first interconnect layer and provided in the first insulator and including at least one of palladium, platinum and gold, and a second interconnect layer provided on the first metal portion and provided in the first insulator. The device further includes a second chip that includes a second insulator provided on the first insulator, and a third interconnect layer provided in the second insulator and provided on the second interconnect layer.Type: ApplicationFiled: September 5, 2019Publication date: September 17, 2020Applicant: Toshiba Memory CorporationInventors: Yusuke TANAKA, Atsushi Hieno, Tsutomu Nakanishi, Yasuhito Yoshimizu, Masayoshi Tagami
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Patent number: 10251628Abstract: According to one embodiment, an ultrasonic diagnostic apparatus comprises an ultrasonic probe, image generation circuitry, image generation circuitry, at least one light emission circuitry a plurality of optical detection circuits, a slide mechanism and analysis circuitry. The slide mechanism makes at least either the at least one light emission circuitry or the plurality of optical detection circuits slide to change positional relationships between the ultrasonic transmission/reception surface, the at least one light emission circuitry, and the plurality of optical detection circuits. The analysis circuitry analyzes a change in the light intensity detected for each of different positional relationships between the ultrasonic transmission/reception surface, the at least one light emission circuitry, and the plurality of optical detection circuits.Type: GrantFiled: March 11, 2016Date of Patent: April 9, 2019Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Satoshi Takayama, Taeko Urano, Kenji Nakamura, Tsutomu Nakanishi
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Patent number: 10249531Abstract: A method for forming a metal wiring according to embodiments includes forming a first insulating layer on a substrate; forming a catalyst adsorption layer by bringing a surface of the first insulating layer into contact with a solution containing a compound having a triazine skeleton, a first functional group of one of a silanol group and an alkoxysilyl group, and a second functional group of at least one selected from the group consisting of an amino group, a thiol group, a carboxyl group, and an azide group; forming a second insulating layer different from the first insulating layer on the catalyst adsorption layer; patterning the second insulating layer to form a mask pattern; etching the first insulating layer by a wet etching method; selectively forming a catalyst layer; and forming a metal layer on the catalyst layer by an electroless plating method.Type: GrantFiled: February 9, 2018Date of Patent: April 2, 2019Assignee: Toshiba Memory CorporationInventors: Atsushi Hieno, Tsutomu Nakanishi, Yusuke Tanaka, Yasuhito Yoshimizu, Akihiko Happoya
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Publication number: 20190088539Abstract: A method for forming a metal wiring according to embodiments includes forming a first insulating layer on a substrate; forming a catalyst adsorption layer by bringing a surface of the first insulating layer into contact with a solution containing a compound having a triazine skeleton, a first functional group of one of a silanol group and an alkoxysilyl group, and a second functional group of at least one selected from the group consisting of an amino group, a thiol group, a carboxyl group, and an azide group; forming a second insulating layer different from the first insulating layer on the catalyst adsorption layer; patterning the second insulating layer to form a mask pattern; etching the first insulating layer by a wet etching method; selectively forming a catalyst layer; and forming a metal layer on the catalyst layer by an electroless plating method.Type: ApplicationFiled: February 9, 2018Publication date: March 21, 2019Applicant: Toshiba Memory CorporationInventors: Atsushi Hieno, Tsutomu Nakanishi, Yusuke Tanaka, Yasuhito Yoshimizu, Akihiko Happoya
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Patent number: 10147612Abstract: A metal pattern forming method according to an embodiment includes forming a metal film on a surface of a substrate by an electroless plating method, the substrate including a first layer including a protrusion and a recess, and a film thickness of the metal film being a half or more of a width of the recess; and performing wet etching, the metal film in the recess removed by the wet etching and the metal film on the protrusion remained after the wet etching.Type: GrantFiled: August 28, 2017Date of Patent: December 4, 2018Assignee: Kabushiki Kaisha ToshibaInventors: Tsutomu Nakanishi, Yusuke Tanaka, Atsushi Hieno, Yasuhito Yoshimizu, Akihiko Happoya
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Publication number: 20180274102Abstract: A method of forming a metal pattern includes forming a catalyst adsorption layer by bringing a surface of a substrate into contact with a solution, the substrate having a base region and a plurality of protrusions provided on the base region, the base region includes a first material, the protrusions includes a second material different from the first material, the first and the second material being exposed on the surface, and the solution containing a compound having a triazine skeleton, a first functional group of any one of a silanol group and an alkoxysilyl group, and a second functional group of at least one selected from the group consisting of an amino group, a thiol group, and an azido group, forming a catalyst layer on the catalyst adsorption layer, forming a metal film on the catalyst layer by an electroless plating method, and removing the metal film on the protrusions.Type: ApplicationFiled: September 7, 2017Publication date: September 27, 2018Applicant: Kabushiki Kaisha ToshibaInventors: Yusuke TANAKA, Atsushi HIENO, Tsutomu NAKANISHI, Yasuhito YOSHIMIZU, Akihiko HAPPOYA
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Publication number: 20180277390Abstract: A metal pattern forming method according to an embodiment includes forming a metal film on a surface of a substrate by an electroless plating method, the substrate including a first layer including a protrusion and a recess, and a film thickness of the metal film being a half or more of a width of the recess; and performing wet etching, the metal film in the recess removed by the wet etching and the metal film on the protrusion remained after the wet etching.Type: ApplicationFiled: August 28, 2017Publication date: September 27, 2018Applicant: Kabushiki Kaisha ToshibaInventors: Tsutomu NAKANISHI, Yusuke Tanaka, Atsushi Hieno, Yasuhito Yoshimizu, Akihiko Happoya
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Publication number: 20180141752Abstract: A transport device includes a main body section, a base connected to the main body section, a wheel connected to the main body section for causing the transport device to travel, a drive module for driving the wheel, and a sensor that detects a state of the transport device, wherein a posture of the main body section is controlled using an output of the sensor such that the center of gravity of a mounted object approaches the center of gravity of the transport device.Type: ApplicationFiled: April 26, 2016Publication date: May 24, 2018Inventors: TSUTOMU NAKANISHI, TAKESHI UEMURA, YORIKO NAKAO, TAKAHIRO AKIYOSHI
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Patent number: 9857594Abstract: An optical device includes a light-shielding layer and a microlens array. The light-shielding layer includes a plurality of openings. The microlens array is divided into a plurality of microlenses corresponding to the respective plurality of openings. A refractive index of the microlens array is variable so that light is incident on the microlenses is focused on the respective plurality of openings. A portion where light is focused includes a central position of the corresponding opening.Type: GrantFiled: January 29, 2016Date of Patent: January 2, 2018Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Yuko Kizu, Yukio Kizaki, Honam Kwon, Machiko Ito, Risako Ueno, Mitsuyoshi Kobayashi, Koichi Ishii, Satoshi Takayama, Tsutomu Nakanishi, Takashi Sasaki, Ryosuke Nonaka, Tomoya Tsuruyama
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Publication number: 20160270765Abstract: According to one embodiment, an ultrasonic diagnostic apparatus comprises an ultrasonic probe, image generation circuitry, an optical probe, at least one integrated solid-state image sensor and analysis circuitry. The image generation circuitry generates an ultrasonic image by using the ultrasonic wave. The an optical probe is integrally provided with the ultrasonic probe and including at least one light emission circuitry to apply light in an absorption wavelength band of a biological component from a surrounding of the ultrasonic transmission/reception surface onto the inside of the object and a plurality of optical detection circuits to detect an intensity of light having a specific wavelength which is applied from the at least one light emission circuitry and diffused/reflected by the inside of the object. The analysis circuitry is configured to analyze a change in the light intensity detected by the each optical detection circuit.Type: ApplicationFiled: March 11, 2016Publication date: September 22, 2016Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Satoshi TAKAYAMA, Taeko URANO, Tsutomu NAKANISHI, Kenji NAKAMURA
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Publication number: 20160270662Abstract: According to one embodiment, an ultrasonic diagnostic apparatus comprises an ultrasonic probe, image generation circuitry, image generation circuitry, at least one light emission circuitry a plurality of optical detection circuits, a slide mechanism and analysis circuitry. The slide mechanism makes at least either the at least one light emission circuitry or the plurality of optical detection circuits slide to change positional relationships between the ultrasonic transmission/reception surface, the at least one light emission circuitry, and the plurality of optical detection circuits. The analysis circuitry analyzes a change in the light intensity detected for each of different positional relationships between the ultrasonic transmission/reception surface, the at least one light emission circuitry, and the plurality of optical detection circuits.Type: ApplicationFiled: March 11, 2016Publication date: September 22, 2016Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Satoshi TAKAYAMA, Taeko URANO, Kenji NAKAMURA, Tsutomu NAKANISHI
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Publication number: 20160223817Abstract: An optical device includes a light-shielding layer and a microlens array. The light-shielding layer includes a plurality of openings. The microlens array is divided into a plurality of microlenses corresponding to the respective plurality of openings. A refractive index of the microlens array is variable so that light is incident on the microlenses is focused on the respective plurality of openings. A portion where light is focused includes a central position of the corresponding opening.Type: ApplicationFiled: January 29, 2016Publication date: August 4, 2016Inventors: Yuko Kizu, Yukio Kizaki, Honam Kwon, Machiko Ito, Risako Ueno, Mitsuyoshi Kobayashi, Koichi Ishii, Satoshi Takayama, Tsutomu Nakanishi, Takashi Sasaki, Ryosuke Nonaka, Tomoya Tsuruyama
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Publication number: 20160178965Abstract: A display device includes: a mirror part which includes a reflective film formed at one surface of a transparent flat plate, and a plurality of micro-windows formed at the reflective film; a flat display part which emits non-parallel light whose light emission angle distribution is skewed in a normal direction toward the mirror part; and a microlens array part which is disposed between the mirror part and the flat display part, and includes a plurality of microlenses converging the non-parallel light emitted from the flat display part to the plurality of micro-windows individually.Type: ApplicationFiled: March 1, 2016Publication date: June 23, 2016Applicant: Kabushiki Kaisha ToshibaInventors: Satoshi TAKAYAMA, Taeko Urano, Tsutomu Nakanishi, Kenji Nakamura, Yuko Kizu, Honam Kwon
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Patent number: 9250737Abstract: An information apparatus includes a housing, first and second strain detectors, and first and second stress collectors that transmit distortion applied to a side surface of the housing to the first and the second strain detectors, respectively. Upon having the same amount of distortion is applied to the side surface of the housing, the first and strain detectors outputs different values a processing circuit. This information apparatus has a small size and can be accurately controlled.Type: GrantFiled: June 21, 2013Date of Patent: February 2, 2016Assignee: Panasonic Intellectual Property Management Co., Ltd.Inventors: Yusaku Nishimiya, Hideaki Ishiba, Yoshiyuki Hayashi, Tsutomu Nakanishi, Narihiro Mita, Yuichi Mizuno, Hideo Ohkoshi, Taketoshi Takashima, Yoshimitsu Ikeyama
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Patent number: 9231132Abstract: A solar cell having on a light incident surface side an electrode with both low resistivity and high transparency to promote efficient excitation of carriers using inexpensive materials. The solar cell includes a photoelectric conversion layer, a first electrode layer arranged on the light incident surface side, and a second electrode layer arranged opposed to the first electrode layer. The first electrode layer has a thickness in the range of 10 to 200 nm, and plural penetrating openings, each of which occupies an area in the range of 80 nm2 to 0.8 ?m2, and has an aperture ratio in the range 10 to 66%. The first electrode layer can be produced by etching using an etching mask in the form of a single particle layer of fine particles, or of a dot pattern formed by self-assembly of a block copolymer, or of a stamper.Type: GrantFiled: September 27, 2013Date of Patent: January 5, 2016Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Kumi Masunaga, Akira Fujimoto, Tsutomu Nakanishi, Eishi Tsutsumi, Ryota Kitagawa, Koji Asakawa, Hideyuki Nishizawa
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Patent number: 9177989Abstract: A solid state imaging device according to an embodiment includes a photo detector arranged two-dimensionally in a semiconductor substrate, a readout circuit provided in the semiconductor substrate, a first photoelectric conversion layer provided above the photo detector, a plurality of first metal dots provided above the first photoelectric conversion layer, a second photoelectric conversion layer provided above the first metal dots, and a plurality of second metal dots provided above the second photoelectric conversion layer.Type: GrantFiled: March 13, 2013Date of Patent: November 3, 2015Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Ikuo Fujiwara, Hideyuki Funaki, Kenji Todori, Akira Fujimoto, Tsutomu Nakanishi, Kenji Nakamura
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Publication number: 20150305712Abstract: In general, according to one embodiment, an ultrasonic diagnostic apparatus comprises a plurality of light emission units, a control unit, a plurality of light detection units and a calculation unit. The light emission units are arranged around an ultrasonic transmitting and receiving surface of an ultrasonic probe included by the ultrasonic diagnostic apparatus and emit light including a component of a specific wavelength to the subject, the particular wavelength being included in an absorption wavelength range of a body. The control unit drives a plurality of the light emission units at different frequencies. The plurality of light detection units are arranged around the ultrasonic transmitting and receiving surface and detect the light of the specified wavelength reflected inside the subject. The calculation unit calculates intensity of the light of the specified wavelength at different frequencies.Type: ApplicationFiled: April 28, 2015Publication date: October 29, 2015Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Taeko URANO, Satoshi TAKAYAMA, Tsutomu NAKANISHI, Kenji NAKAMURA
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Patent number: 9153363Abstract: The present invention provides a light-transmitting metal electrode including a substrate and a metal electrode layer having plural openings. The metal electrode layer also has such a continuous metal part that any pair of point-positions in the part is continuously connected without breaks. The openings in the metal electrode layer are periodically arranged to form plural microdomains. The plural microdomains are so placed that the in-plane arranging directions thereof are oriented independently of each other. The thickness of the metal electrode layer is in the range of 10 to 200 nm.Type: GrantFiled: February 6, 2014Date of Patent: October 6, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Eishi Tsutsumi, Tsutomu Nakanishi, Akira Fujimoto, Koji Asakawa