Patents by Inventor Tsuyoshi Inoue

Tsuyoshi Inoue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8713981
    Abstract: The invention provides equipment for supplying lubricant for a rolling roll of a rolling mill comprising a plurality of spray nozzles for spraying a lubricant and a gas in a particulate or atomized state to the rolling roll, a lubricant feed device for feeding the lubricant to the spray nozzles, and a gas feed device for feeding the gas to the nozzles. The amount of lubricant supplied from side spray nozzles is larger than the lubricant feed rate from the center spray nozzle, and the amount of lubricant supplied from the spray nozzles between these side spray nozzles and center spray nozzle is not more than the amount of lubricant from the side spray nozzles and not less than the lubricant from the center spray nozzle. Thus uneven wear and roughness is reduced in the axial direction of the rolling roll.
    Type: Grant
    Filed: April 6, 2011
    Date of Patent: May 6, 2014
    Assignee: Nippon Steel & Sumitomo Metal Corporation
    Inventors: Tsuyoshi Inoue, Yasuyuki Muramatsu
  • Patent number: 8700553
    Abstract: An operation support apparatus includes: an operation record storage unit (303) in which an operation record of a user is stored; a target function candidate storage unit (309) which defines and stores target function candidates; an operation strategy determination unit (305) which determines that the user's operation strategy is an operation strategy which originates from content selection, in the case where the operation included in the operation record is a predetermined operation performed when the appliance is in a status in which content can be displayed or selected; a target function inference unit (308) which infers the target function according to a method suited to the operation strategy determined by the operation strategy determination unit (305); and an operation support determination unit (310) which determines an operation support method for the user, using the inferred target function.
    Type: Grant
    Filed: August 26, 2009
    Date of Patent: April 15, 2014
    Assignee: Panasonic Corporation
    Inventors: Tsuyoshi Inoue, Jun Ozawa
  • Publication number: 20140081117
    Abstract: An eye fatigue determination apparatus includes: an electrooculogram obtainment unit that obtains an electrooculogram indicating a potential measured using an electrode placed near an eye of a viewer who is viewing video content, the electrooculogram being measured in a plurality of predetermined time sections during display of the video content; an impedance obtainment unit that obtains an impedance between the electrode and the viewer's skin at a position where the electrode is placed, the impedance being measured in the plurality of predetermined time sections; an electrooculogram correction unit that corrects the electrooculogram measured in the plurality of predetermined time sections and obtained by the electrooculogram obtainment unit, based on the impedance measured in the plurality of predetermined time sections and obtained by the impedance obtainment unit; and a fatigue determination unit that determines fatigue of the viewer's eye, based on the electrooculogram corrected by the electrooculogram co
    Type: Application
    Filed: November 19, 2013
    Publication date: March 20, 2014
    Applicant: Panasonic Corporation
    Inventors: Yumiko KATO, Jun OZAWA, Tsuyoshi INOUE
  • Publication number: 20140078252
    Abstract: A stereoscopic video processing apparatus includes: a switch operation detection unit which detects a switch operation, made by a user, that is an operation to select a channel of a three-dimensional (3D) video or an operation for a fast-forward playback, a rewind playback, skipping, or locating a cue point of a 3D video; a frequency determination unit which determines a detection frequency indicating the number of switch operations per unit of time detected by the switch operation detection unit; and a video processing unit which performs processing to reduce a difference in depth between 3D videos before and after switching of the 3D videos when the detection frequency per unit of time determined by the frequency determination unit is higher than or equal to a predetermined frequency.
    Type: Application
    Filed: November 20, 2013
    Publication date: March 20, 2014
    Applicant: Panasonic Corporation
    Inventors: Yumiko KATO, Tsuyoshi INOUE, Jun OZAWA
  • Patent number: 8640517
    Abstract: The invention relates to a method for feeding lubricant during hot rolling, in which the surfaces of the rolling rolls are fed with a lubricating emulsion, characterized in that said lubricating emulsion, consisting of a lubricating oil having a viscosity between 10 cSt and 400 cSt at 40° C., mixed with water, is directed onto the surfaces of the rolling rolls via at least one lubricant feed nozzle, at a temperature above 0° C. but below 25° C.
    Type: Grant
    Filed: November 21, 2005
    Date of Patent: February 4, 2014
    Assignee: Arcelor France
    Inventors: Tsuyoshi Inoue, Guy Hauret
  • Patent number: 8614493
    Abstract: A photosensor element is provided with a gate electrode disposed on an insulating substrate, a gate insulating film disposed so as to cover the gate electrode, a semiconductor layer disposed on the gate insulating film so as to overlap the gate electrode, and a source electrode and a drain electrode provided on the semiconductor layer so as to overlap the gate electrode and so as to face each other. The photosensor element has the semiconductor layer provided with an intrinsic semiconductor layer in which a channel region is defined and an extrinsic semiconductor layer that is laminated on the intrinsic semiconductor layer such that the channel region is exposed. The extrinsic semiconductor layer protrudes from the drain electrode on the side close to the channel region.
    Type: Grant
    Filed: November 11, 2010
    Date of Patent: December 24, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Masao Moriguchi, Yohsuke Kanzaki, Tsuyoshi Inoue
  • Patent number: 8610226
    Abstract: Disclosed is a photosensor element that is provided with a gate electrode (11da) disposed on an insulating substrate (10), a gate insulation film (12) disposed so as to cover the gate electrode (11da), a semiconductor layer (15db) disposed on the gate insulating film (12) so as to overlap the gate electrode (11da), and a source electrode (16da) and a drain electrode (16db) provided on the semiconductor layer (15db) so as to overlap the gate electrode (11da) and so as to face each other. The semiconductor layer (15db) is provided with an intrinsic semiconductor layer (13db) in which a channel region (C) is defined and an extrinsic semiconductor layer (14db) that is laminated on the intrinsic semiconductor layer (13db) such that the channel region (C) is exposed therefrom. The intrinsic semiconductor layer (13db) is an amorphous silicon layer containing nanocrystalline silicon particles.
    Type: Grant
    Filed: November 11, 2010
    Date of Patent: December 17, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Masao Moriguchi, Yohsuke Kanzaki, Tsuyoshi Inoue
  • Publication number: 20130299099
    Abstract: The present invention provides a target substance transfer method, a crystal production method, a composition production method, and a target substance transfer device, which allow the concentration of a target substance to be increased easily and effectively. The target substance transfer method is a method for transferring a target substance 103 from a first phase 101 that is a liquid or solid phase containing the target substance 103 to a second phase 102 including: a phase approximation step of bringing the first phase 101 and the second phase 102 into close proximity; and a bubble collapse step of forming bubbles in the vicinity of a boundary between the first phase 101 and the second phase 102 and then causing the bubbles to collapse.
    Type: Application
    Filed: January 18, 2012
    Publication date: November 14, 2013
    Applicant: OSAKA UNIVERSITY
    Inventors: Yusuke Mori, Tsuyoshi Inoue, Kazufumi Takano, Hiroyoshi Matsumura, Hiroaki Adachi, Shigeru Sugiyama, Ryota Murai, Masateru Kurata, Hiroshi Yoshikawa, Mihoko Hirao, Satoshi Nakayama, Yoshinori Takahashi, Satoshi Murakami
  • Patent number: 8582072
    Abstract: A method for manufacturing a display device 10 includes a substrate supporting step for supporting a plastic substrate 19 on a support substrate 50, with the plastic substrate 19 curved, and a thin film lamination step for laminating a plurality of thin films on the plastic substrate 19 supported on the support substrate 50.
    Type: Grant
    Filed: March 3, 2009
    Date of Patent: November 12, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Tohru Okabe, Takeshi Hara, Tetsuya Aita, Tsuyoshi Inoue
  • Patent number: 8549334
    Abstract: An electric power control support device (101) includes: an electricity consumption receiving unit (102) that receives, from each of devices, operation data indicating a time period during which the device is operating; an electricity consumption history storage unit (103) storing the received operation data; a subordinate-superior relationship determination unit (105) that determines, from the devices, a superior device operating independently and a sub device operating in conjunction with the superior device, based on a temporal position relationship between operating sections temporally overlapping each other; a power-off forgetting determination unit (107) that specifies the sub device operating while the superior device is not operating; and the energy saving support execution unit (108) that supports energy saving for the sub device specified by the power-off forgetting determination unit (107).
    Type: Grant
    Filed: June 15, 2010
    Date of Patent: October 1, 2013
    Assignee: Panasonic Corporation
    Inventors: Tsuyoshi Inoue, Jun Ozawa
  • Publication number: 20130242387
    Abstract: Provided is a three-dimensional image display system including: eyeglasses including a type information transmission unit which transmits type information of the eyeglasses and a potential information transmission unit which transmits a biopotential of a viewer as potential information; and a three-dimensional display TV including a type information reception unit which receives the type information, an electrode position determination unit which determines, based on the received type information, a position of an electrode included in the eyeglasses, a potential information reception unit which receives the transmitted potential information, and a wearing conditions determination unit which determines wearing conditions of the viewer wearing the eyeglasses, based on the determined electrode position and the received potential information.
    Type: Application
    Filed: April 25, 2013
    Publication date: September 19, 2013
    Applicant: PANASONIC CORPORATION
    Inventors: Jun OZAWA, Yumiko KATO, Tsuyoshi INOUE
  • Patent number: 8530899
    Abstract: The present invention has an object of providing a TFT in which generation of an OFF current is reduced by an efficient manufacturing method. A thin film transistor 100 according to the present invention has a gate electrode 12 formed on a substrate 10, an insulating layer 14 formed on the gate electrode 12, a microcrystalline amorphous silicon layer 18 and an amorphous silicon layer 16 that are formed on the insulating layer 14, a semiconductor layer 20 containing an impurity formed on the amorphous silicon layer 16, and a source electrode 22A and a drain electrode 22B that are formed on the semiconductor layer 20 containing an impurity. The microcrystalline amorphous silicon layer 18 and the semiconductor layer 20 containing an impurity are connected to each other through the amorphous silicon layer 16 without being in direct contact with each other.
    Type: Grant
    Filed: December 21, 2010
    Date of Patent: September 10, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshiyuki Harumoto, Takeshi Hara, Tohru Okabe, Takeshi Yaneda, Tetsuya Aita, Tsuyoshi Inoue, Michiko Takei
  • Publication number: 20130229711
    Abstract: Provided is an image display system which can assuredly perform collaborative processing such as determination of a fatigue state of a viewer using three-dimensional eyeglasses and an image display apparatus, without increasing system scale, the image display system including: a transmitting and receiving unit included in a three-dimensional display TV which transmits to three-dimensional eyeglasses a specification-designating signal designating a specification which at least includes a data format for a communication signal; a transmitting and receiving unit included in the three-dimensional eyeglasses which receives the specification-designating signal transmitted from the three-dimensional display TV and, according to the specification designated by the received specification-designating signal, converts a biometric signal acquired by a biometric signal sensor into the communication signal, and transmits the communication signal to the three-dimensional display TV.
    Type: Application
    Filed: April 18, 2013
    Publication date: September 5, 2013
    Applicant: PANASONIC CORPORATION
    Inventors: Yumiko KATO, Jun OZAWA, Tsuyoshi INOUE
  • Publication number: 20130184445
    Abstract: Provided are a method for observing protein crystal, wherein the growth process of the protein crystals is nondestructively and three-dimensionally monitored on a real-time basis and the growth of the crystals is controlled at a high accuracy to thereby enable the formation of single crystals having good qualities, which comprises observing the protein crystals, said protein crystals having been produced by a crystallization method using a gel, by an OCT measurement using light emitted from an ultrawideband light source; a method for observing protein crystals wherein the ultrawideband light source is an ultrawideband supercontinuum light source; a method for observing protein crystals wherein the center wavelength of the light emitted from the ultrawideband supercontinuum light source is a 0.8 ?m band; and a method for observing protein crystals wherein the monitoring of the protein crystals is a monitoring by an in situ measurement.
    Type: Application
    Filed: September 20, 2011
    Publication date: July 18, 2013
    Applicant: OSAKA UNIVERSITY
    Inventors: Norihiko Nishizawa, Hiroyoshi Matsumura, Yuusuke Mori, Shutaro Ishida, Kazuyoshi Itoh, Shigeru Sugiyama, Hiroaki Adachi, Tsuyoshi Inoue, Kazufumi Takano, Murakami Satoshi
  • Publication number: 20130175521
    Abstract: A TFT 20 includes a gate electrode 21, a gate insulating film 22, a semiconductor layer 23, a source electrode 24, a drain electrode 25, etc. The semiconductor layer 23 is comprised of a metal oxide semiconductor (IGZO), and has a source portion 23a that contacts the source electrode 24, a drain electrode 23b that contacts the drain electrode 25, and a channel portion 23c that is located between the source and drain portions 23a, 23b. A reduced region 30 is formed at least in the channel portion 23c of the semiconductor layer 23, and the reduced region 30 has a higher content of a simple substance of a metal such as In than the remaining portion of the semiconductor layer 23.
    Type: Application
    Filed: May 23, 2011
    Publication date: July 11, 2013
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Masao Moriguchi, Michiko Takei, Yohsuke Kanzaki, Tsuyoshi Inoue, Tetsuo Fukaya, Yudai Takanishi, Takatsugu Kusumi, Yoshiki Nakatani, Tetsuya Okamoto, Kenji Nakanishi
  • Patent number: 8480843
    Abstract: A process for protecting a surface of a metal layer or a metal oxide layer including providing a protective film containing a base material and a pressure-sensitive adhesive layer formed thereon, wherein the surface of the pressure-sensitive adhesive layer has a contact angle with methylene iodide as measured just after contact, ?1, of 70° or smaller and a change in contact angle with methylene iodide through 30-second standing, ??, of 8% or less.
    Type: Grant
    Filed: May 18, 2007
    Date of Patent: July 9, 2013
    Assignee: Nitto Denko Corporation
    Inventors: Tsuyoshi Inoue, Kazuhito Okumura, Hiroshi Yada
  • Publication number: 20130134411
    Abstract: A semiconductor device (100A) according to the present invention includes an oxide semiconductor layer (31a), first and second source electrodes (52a1 and 52a2), and first and second drain electrodes (53a1 and 53a2). The second source electrode (52a2) is formed to be in contact with a top surface of the first source electrode and inner to the first source electrode (52a1). The second drain electrode (53a2) is formed to be in contact with a top surface of the first drain electrode (53a1) and inner to the first drain electrode (53a1). The oxide semiconductor layer (31a) is formed to be in contact with the top surface of the first source electrode (52a1) and the top surface of the first drain electrode (53a1).
    Type: Application
    Filed: April 5, 2011
    Publication date: May 30, 2013
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Okifumi Nakagawa, Yoshifumi Ohta, Yoshimasa Chikama, Tsuyoshi Inoue, Masahiko Suzuki, Michiko Takei, Yoshiyuki Harumoto, Yoshinobu Miyamoto, Hinae Mizuno
  • Patent number: 8441016
    Abstract: Disclosed is a high-quality, efficiently manufacturable thin film transistor in which leakage current is minimized. The thin film transistor is provided with a semiconductor layer (34) that contains a channel region (34C) having a microcrystalline semiconductor; source and drain contact layers (35S and 35D) that contains impurities; a first source metal layer (36S) and a first drain metal layer (36D), and a second source metal layer (37S) and a second drain metal layer (37D). The end portion of the second metal source layer (37S) is located at a position receded from the end portion of the first metal source layer (36S) and the end portion of the second drain metal layer (37D) is located at a position receded from the end portion of the first drain metal layer (36D). The semiconductor layer (34) contains low concentration impurity diffusion regions formed near the end portions of the aforementioned source contact layer (35S) and drain contact layer (35D).
    Type: Grant
    Filed: July 8, 2010
    Date of Patent: May 14, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Tsuyoshi Inoue, Tohru Okabe, Tetsuya Aita, Michiko Takei, Yoshiyuki Harumoto, Takeshi Yaneda
  • Patent number: 8438479
    Abstract: The operation support apparatus includes: an operation load calculation unit (106) which calculates an operation load on a user in performing a selecting operation included in one of operation records, using the selecting operation and a previous selecting operation included in another one of the records, the calculation being performed for each of selecting operations included in the records; a non-thinking operation determination unit (107) which determines, for each selecting operation included in the records, whether or not it is a non-thinking operation that is a randomly-performed operation, by determining that the selecting operation is more likely to be the non-thinking operation when the operation load is smaller; and a target function inference unit (108) and a target function candidate storage unit (109) which provide the user with operation support based on the records of the selecting operations excluding the selecting operation determined as the non-thinking operation.
    Type: Grant
    Filed: October 22, 2009
    Date of Patent: May 7, 2013
    Assignee: Panasonic Corporation
    Inventors: Tsuyoshi Inoue, Jun Ozawa
  • Publication number: 20130105802
    Abstract: The present invention has an object of providing a TFT in which generation of an OFF current is reduced by an efficient manufacturing method. A thin film transistor 100 according to the present invention has a gate electrode 12 formed on a substrate 10, an insulating layer 14 formed on the gate electrode 12, a microcrystalline amorphous silicon layer 18 and an amorphous silicon layer 16 that are formed on the insulating layer 14, a semiconductor layer 20 containing an impurity formed on the amorphous silicon layer 16, and a source electrode 22A and a drain electrode 22B that are formed on the semiconductor layer 20 containing an impurity. The microcrystalline amorphous silicon layer 18 and the semiconductor layer 20 containing an impurity are connected to each other through the amorphous silicon layer 16 without being in direct contact with each other.
    Type: Application
    Filed: December 21, 2010
    Publication date: May 2, 2013
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Yoshiyuki Harumoto, Takeshi Hara, Tohru Okabe, Takeshi Yaneda, Tetsuya Aita, Tsuyoshi Inoue, Michiko Takei