Abstract: Provided is a protection circuit that is connected between a power supply terminal and an output terminal, and turns off an output transistor when an abnormality occurs in a system, the output transistor outputting a current to a load connected to the output terminal, the protection circuit including: a first discharge unit that is connected between a gate electrode of the output transistor and the power supply terminal, and discharges an electric charge of the gate electrode until a potential of the gate electrode becomes equal to a power supply potential, when an abnormality occurs in the system, and a second discharge unit that is connected between the gate electrode and a source electrode of the output transistor, and discharges the electric charge of the gate electrode until the potential of the gate electrode becomes equal to an output potential, when an abnormality occurs in the system.

Abstract: A power switching circuit according to an exemplary embodiment of the present invention includes an output transistor connected between a power supply terminal VCC and an output terminal OUT, an output controller which controls a conducting state of the output transistor according to an input signal, a sense transistor having a gate commonly connected with the output transistor, which detects an output current flowing into the output transistor, an output current detection terminal in which a detection voltage is generated according to the output current detected by the sense transistor and a short circuit detector which detects a short circuit condition of the output current detection terminal according to the detection voltage and stops the output transistor or limits the output current.

Abstract: A semiconductor device according to an exemplary embodiment of the present invention includes a discharge circuit and a control circuit. The discharge circuit includes a first transistor connected between a gate of an output transistor and an output terminal, and a capacitor connected to a gate of the first transistor, and discharges a gate voltage of the output transistor to the output terminal by turning on the first transistor with an electric charge of the capacitor. The control circuit includes a charge path, a first discharge path, and a second discharge path. The first discharge path discharges an electric charge of the charged capacitor when the system turns off. The second discharge path discharges the electric charge of the capacitor for a time period longer than a time period for discharging the output transistor by the discharge circuit upon detection of an abnormality in the system.

Abstract: A semiconductor device includes a fuse section having a plurality of fuse circuits configured to generate switch control signals; and an offset adjusting section configured to adjust an offset voltage of a differential amplifier based on the switch control signals supplied from output nodes of the plurality of fuse circuits. Each of the plurality of fuse circuits includes a fuse connected between a first power supply voltage and a cut node; a current source connected between a second power supply voltage and the output node; and a first transistor connected between the output node and the cut node and having a gate connected to the second power supply voltage.

Abstract: A semiconductor device according to an exemplary embodiment of the present invention includes a discharge circuit and a control circuit. The discharge circuit includes a first transistor connected between a gate of an output transistor and an output terminal, and a capacitor connected to a gate of the first transistor, and discharges a gate voltage of the output transistor to the output terminal by turning on the first transistor with an electric charge of the capacitor. The control circuit includes a charge path, a first discharge path, and a second discharge path. The first discharge path discharges an electric charge of the charged capacitor when the system turns off. The second discharge path discharges the electric charge of the capacitor for a time period longer than a time period for discharging the output transistor by the discharge circuit upon detection of an abnormality in the system.

Abstract: Provided is a protection circuit that is connected between a power supply terminal and an output terminal, and turns off an output transistor when an abnormality occurs in a system, the output transistor outputting a current to a load connected to the output terminal, the protection circuit including: a first discharge unit that is connected between a gate electrode of the output transistor and the power supply terminal, and discharges an electric charge of the gate electrode until a potential of the gate electrode becomes equal to a power supply potential, when an abnormality occurs in the system, and a second discharge unit that is connected between the gate electrode and a source electrode of the output transistor, and discharges the electric charge of the gate electrode until the potential of the gate electrode becomes equal to an output potential, when an abnormality occurs in the system.

Abstract: In a power supply control apparatus for controlling supplying of power from a battery to a load including a battery terminal connectable to the battery, an output terminal connectable to the load, and a ground terminal, a transistor is connected between the battery terminal and the output terminal to turn ON and OFF a connection between the battery and the load. An overcurrent detecting circuit is connected between the battery terminal and the output terminal to detect whether or not an overcurrent has flown through the transistor. A control circuit is connected between the battery terminal and the ground terminal to activate the transistor and the overcurrent detecting circuit.

Abstract: A power switching circuit according to an exemplary embodiment of the present invention includes an output transistor connected between a power supply terminal VCC and an output terminal OUT, an output controller which controls a conducting state of the output transistor according to an input signal, a sense transistor having a gate commonly connected with the output transistor, which detects an output current flowing into the output transistor, an output current detection terminal in which a detection voltage is generated according to the output current detected by the sense transistor and a short circuit detector which detects a short circuit condition of the output current detection terminal according to the detection voltage and stops the output transistor or limits the output current.

Abstract: Noise generation is reduced further. Oscillation control circuit 11 generates a modulation signal modulating oscillation frequency of an oscillation signal generated by oscillation circuit 12 and outputs modulation signal to same. Preferably, the modulation signal fluctuates period of the oscillation signal sequentially. The oscillation circuit 12 is composed of a ring oscillator, for example, and the power supply voltage or power supply current of the ring oscillator is controlled to fluctuate sequentially by the modulation signal output from the oscillation circuit 11. Buffer 14 of charge pump circuit 13 generates signals /? and ? by the oscillation signal and drives capacitors C1 and C2 for supplying a higher voltage than the voltage of the power supply Vcc to gate of N-channel MOSFET Q1.

Abstract: A semiconductor device includes a fuse section having a plurality of fuse circuits configured to generate switch control signals; and an offset adjusting section configured to adjust an offset voltage of a differential amplifier based on the switch control signals supplied from output nodes of the plurality of fuse circuits. Each of the plurality of fuse circuits includes a fuse connected between a first power supply voltage and a cut node; a current source connected between a second power supply voltage and the output node; and a first transistor connected between the output node and the cut node and having a gate connected to the second power supply voltage.

Abstract: Noise generation is reduced further. Oscillation control circuit 11 generates a modulation signal modulating oscillation frequency of an oscillation signal generated by oscillation circuit 12 and outputs modulation signal to same. Preferably, the modulation signal fluctuates period of the oscillation signal sequentially. The oscillation circuit 12 is composed of a ring oscillator, for example, and the power supply voltage or power supply current of the ring oscillator is controlled to fluctuate sequentially by the modulation signal output from the oscillation circuit 11. Buffer 14 of charge pump circuit 13 generates signals/? and ? by the oscillation signal and drives capacitors C1 and C2 for supplying a higher voltage than the voltage of the power supply Vcc to gate of N-channel MOSFET Q1.

Abstract: The oscillator circuit comprises a capacitor and first to fourth constant current supplies and switches are connected to the capacitor. Both terminals of the capacitor are used for charges and discharges. One period comprises four steps; charging the first terminal of the capacitor, discharging the second terminal, charging the first terminal, and discharging the second terminal.

Abstract: The semiconductor device according to the present invention comprises an output MOS transistor M0, an MOS transistor M3 connected between a gate G1 of the output MOS transistor M0 and a ground voltage GND, a parasitic transistor Tr1 which is formed in parallel with the MOS transistor M3 with the substrate terminal of the MOS transistor M3 as a base, and a parasitic transistor control circuit for controlling the conducting status of the parasitic transistor Tr1 based on the power supply voltage Vcc.

Abstract: The oscillator circuit comprises a capacitor and first to fourth constant current supplies and switches are connected to the capacitor. Both terminals of the capacitor are used for charges and discharges. One period comprises four steps; charging the first terminal of the capacitor, discharging the second terminal, charging the first terminal, and discharging the second terminal.

Abstract: The oscillator circuit comprises a capacitor and first to fourth constant current supplies and switches are connected to the capacitor. Both terminals of the capacitor are used for charges and discharges. One period comprises four steps; charging the first terminal of the capacitor, discharging the second terminal, charging the first terminal, and discharging the second terminal.

Abstract: The semiconductor device according to the present invention comprises an output MOS transistor M0, an MOS transistor M3 connected between a gate G1 of the output MOS transistor M0 and a ground voltage GND, a parasitic transistor Tr1 which is formed in parallel with the MOS transistor M3 with the substrate terminal of the MOS transistor M3 as a base, and a parasitic transistor control circuit for controlling the conducting status of the parasitic transistor Tr1 based on the power supply voltage Vcc.

Abstract: The oscillator circuit comprises a capacitor and first to fourth constant current supplies and switches are connected to the capacitor. Both terminals of the capacitor are used for charges and discharges. One period comprises four steps; charging the first terminal of the capacitor, discharging the second terminal, charging the first terminal, and discharging the second terminal.

Abstract: In a power supply control apparatus for controlling supplying of power from a battery to a load including a battery terminal connectable to the battery, an output terminal connectable to the load, and a ground terminal, a transistor is connected between the battery terminal and the output terminal to turn ON and OFF a connection between the battery and the load. An overcurrent detecting circuit is connected between the battery terminal and the output terminal to detect whether or not an overcurrent has flown through the transistor. A control circuit is connected between the battery terminal and the ground terminal to activate the transistor and the overcurrent detecting circuit.

Abstract: A motor drive circuit for driving a brushless motor having a rotor and exciting coils of respective phases. A square wave rotor position signal for each phase is produced wherein a half period of the rotor position signal corresponds to a time period from a polarity inversion of an induced voltage of the exciting coil to the next polarity inversion of the induced voltage. Based on the rotor position signal, excitation of the exciting coils is performed by controlling switching elements for conducting excitation currents by using square wave on-control and/or pulse width converted square wave pulse width modulation (PWM) control. A pulse width converted sinusoidal wave PWM signal is generated whose pulse width varies according to a sinusoidal function. Excitation of the exciting coils is controlled based on the pulse width converted sinusoidal wave PWM signal immediately before and after the square wave on-controlled portions and/or the pulse width converted square wave PWM controlled portions.

Abstract: A motor drive circuit for driving a brushless motor having a rotor and exciting coils of respective phases. A square wave rotor position signal for each phase is produced wherein a half period of the rotor position signal corresponds to a time period from a polarity inversion of an induced voltage of the exciting coil to the next polarity inversion of the induced voltage. Based on the rotor position signal, excitation of the exciting coils is performed by controlling switching elements for conducting excitation currents by using square wave on-control and/or pulse width converted square wave pulse width modulation (PWM) control. A pulse width converted sinusoidal wave PWM signal is generated whose pulse width varies according to a sinusoidal function. Excitation of the exciting coils is controlled based on the pulse width converted sinusoidal wave PWM signal immediately before and after the square wave on-controlled portions and/or the pulse width converted square wave PWM controlled portions.