Patents by Inventor Tsuyoshi Nishida

Tsuyoshi Nishida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130332426
    Abstract: According to one embodiment, an information processing apparatus includes a nonvolatile memory, a calculation module and a storage module. The nonvolatile memory has a data region as a subject of falsification detection and a hash value storage region in which a hash value of the data region is written. The calculation module calculates the hash value from the data. The storage module stores the calculated hash value in the hash value storage region. According to another embodiment, an information processing method includes: providing a nonvolatile memory which has a data region as a subject of falsification detection and a hash value storage region in which a hash value of the data region is written; calculating the hash value from the data; and storing the calculated hash value in the hash value storage region.
    Type: Application
    Filed: April 22, 2013
    Publication date: December 12, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Tsuyoshi NISHIDA
  • Publication number: 20130086659
    Abstract: According to one embodiment, a storage stores secret data, first identification data, and a first random key. A generation module generates first authentication data from the secret data, first identification data, and second identification data of a removable medium. A first verification module determines whether the first authentication data and second authentication in the removable medium are identical. A second verification module determines whether the first random key and a second random key in the removable medium are identical, if the first and second authentication data are identical. An activation module activates the data processing apparatus if the first and second random keys are identical.
    Type: Application
    Filed: June 28, 2012
    Publication date: April 4, 2013
    Inventors: Tadashi Tsuji, Tsuyoshi Nishida
  • Publication number: 20110185142
    Abstract: According to one embodiment, an information processing apparatus includes a first storage, a second storage, a data saving module, and a data saving acceleration module. The data saving module is configured to save data stored in the first storage to the second storage after compressing the data stored in the first storage. The data saving acceleration module is configured to reserve a storage area on the first storage and to write predetermined data to the reserved storage area in order to fill the reserved storage area with regular data with high compression efficiency, when the data saving module saves the data stored in the first storage to the second storage.
    Type: Application
    Filed: December 29, 2010
    Publication date: July 28, 2011
    Inventor: Tsuyoshi Nishida
  • Patent number: 7971026
    Abstract: According to one embodiment, an information processing apparatus includes a processor including a register file which holds physical registers to which general purpose registers provided by an instruction set architecture are assigned, a virtual register assigning unit which assigns a virtual address in the main memory space to a physical register in the register file based on a request from a program, and records a correspondence between each of the virtual addresses and a corresponding one of the physical registers in a virtual register conversion table, and an access converting unit which determines whether or not a virtual address to be accessed is recorded in the virtual register conversion table managed by the virtual register assigning unit, and executes, when the virtual address is recorded therein, processing of accessing the physical register of which a correspondence to the virtual address is recorded in the virtual register conversion table.
    Type: Grant
    Filed: March 10, 2008
    Date of Patent: June 28, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tsuyoshi Nishida, Gen Watanabe, Kazuyoshi Kuwahara, Hajime Sonobe
  • Patent number: 7937577
    Abstract: According to one embodiment, an information processing apparatus includes a determination module provided for an SMI handler of an ACPI compatible Basic Input/Output System (BIOS). The determination module determines, when a system management interrupt (SMI) occurs due to issuance of an Advanced Configuration and Power Interface (ACPI) Enable command by an ACPI compatible operating system, a type of a kernel of the operating system by referring to a CPU STATE MAP area holding a state of a CPU upon occurrence of an SMI.
    Type: Grant
    Filed: December 19, 2008
    Date of Patent: May 3, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tsuyoshi Nishida
  • Publication number: 20100275257
    Abstract: According to one embodiment, an electronic device includes a receiver, a selector, a converter, and an authentication module. The receiver receives data on a password input through a keyboard. The selector selects one of key layouts of different keyboards. The converter converts the data on the password received through the keyboard to a password character string according to the one of the key layouts. The authentication module determines that the password is authenticated when information based on the password character string obtained by the converter for the one of the key layouts matches information based on a registered password character string.
    Type: Application
    Filed: February 26, 2010
    Publication date: October 28, 2010
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Tsuyoshi Nishida
  • Patent number: 7818161
    Abstract: An information processing apparatus includes: a processor configured to run an operating system; a reconfiguration module configured to rewrite a capability pointer of a PCI device configuration to set a controller compatible of controlling a non-UART device to be incompatible; a virtualization module configured to virtualize one or more UARTs; and a recognition module configured to cause the operating system to recognize the UARTs virtualized by the virtualization module by altering hardware information.
    Type: Grant
    Filed: July 6, 2009
    Date of Patent: October 19, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tsuyoshi Nishida
  • Publication number: 20100169070
    Abstract: An information processing apparatus includes: a processor configured to run an operating system; a reconfiguration module configured to rewrite a capability pointer of a PCI device configuration to set a controller compatible of controlling a non-UART device to be incompatible; a virtualization module configured to virtualize one or more UARTs; and a recognition module configured to cause the operating system to recognize the UARTs virtualized by the virtualization module by altering hardware information.
    Type: Application
    Filed: July 6, 2009
    Publication date: July 1, 2010
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Tsuyoshi Nishida
  • Publication number: 20090323488
    Abstract: According to one embodiment, an information processing apparatus includes one or more devices, a device control module which performs drive control of the one or more devices, and a nonvolatile memory. Each of the one or more devices includes a command reception module which receives from the device control module a command to cause the nonvolatile memory to store operation setting information, a setting module which performs, when the operation setting information has been stored in the nonvolatile memory at the time of power-on or resetting, operation setting based on the information, and an erasing module which erases the information stored in the nonvolatile memory after the setting means has completed the operation setting. The device control module includes a command issuing module which issues to the one or more devices a command to cause the nonvolatile memory to store operation setting information before power-off or resetting.
    Type: Application
    Filed: May 15, 2009
    Publication date: December 31, 2009
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Ken HATANO, Tsuyoshi NISHIDA
  • Patent number: 7634600
    Abstract: An LBA correspondence table creating unit creates an LBA correspondence table to convert address information on a floppy disk which is a copy source into address information on an SD memory card, in relation to an FD image area. If an access to the floppy disk to be emulated is requested, an FD access control unit alternately executes access to the SD memory card on the basis of the LBA correspondence table. An FD exchange emulating unit monitors updating and deletion in an FD image SD area by an HD access control unit. If the access is made, the FD exchange emulating unit executes emulation as if the floppy disk was exchanged.
    Type: Grant
    Filed: November 16, 2004
    Date of Patent: December 15, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tsuyoshi Nishida
  • Publication number: 20090164768
    Abstract: According to one embodiment, an information processing apparatus includes a determination module provided for an SMI handler of an ACPI compatible Basic Input/Output System (BIOS). The determination module determines, when a system management interrupt (SMI) occurs due to issuance of an Advanced Configuration and Power Interface (ACPI) Enable command by an ACPI compatible operating system, a type of a kernel of the operating system by referring to a CPU STATE MAP area holding a state of a CPU upon occurrence of an SMI.
    Type: Application
    Filed: December 19, 2008
    Publication date: June 25, 2009
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Tsuyoshi Nishida
  • Publication number: 20080270767
    Abstract: According to one embodiment, an information processing apparatus includes a first processor which has a first instruction set, a second processor which has a second instruction set, a storage unit which stores a program including a first program module which is described by using the second instruction set and causes the second processor to execute a first process including the arithmetic process, and a second program module which is described by using the first instruction set and causes the first processor to execute a process which is the same as the first process, and a control unit which switches a mode for executing the program between a first mode in which the first program module is assigned to the second processor and a second mode in which the second program module is assigned to the first processor.
    Type: Application
    Filed: April 7, 2008
    Publication date: October 30, 2008
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hajime Sonobe, Gen Watanabe, Tsuyoshi Nishida, Kazuyoshi Kuwahara
  • Publication number: 20080267256
    Abstract: According to one embodiment, an information processing apparatus comprises a plurality of temperature transmission sections provided in each of first and second semiconductor circuits, and configure to transmit first measured temperature of one of the first and second semiconductor circuits to the other of first and second semiconductor circuits when the first measured temperature is higher than a threshold temperature, and a plurality of operation speed varying sections provided in each of the first and second semiconductor circuits configure to reduce operation speed of the processor circuit possessed by the other of first and second semiconductor circuits, when the received first measured temperature is higher than the second measured temperature of the other of the first and second semiconductor circuits.
    Type: Application
    Filed: April 25, 2008
    Publication date: October 30, 2008
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Gen Watanabe, Tsuyoshi Nishida, Kazuyoshi Kuwahara, Hajime Sonobe
  • Publication number: 20080270736
    Abstract: According to one embodiment, an information processing apparatus includes a processor including a register file which holds physical registers to which general purpose registers provided by an instruction set architecture are assigned, a virtual register assigning unit which assigns a virtual address in the main memory space to a physical register in the register file based on a request from a program, and records a correspondence between each of the virtual addresses and a corresponding one of the physical registers in a virtual register conversion table, and an access converting unit which determines whether or not a virtual address to be accessed is recorded in the virtual register conversion table managed by the virtual register assigning unit, and executes, when the virtual address is recorded therein, processing of accessing the physical register of which a correspondence to the virtual address is recorded in the virtual register conversion table.
    Type: Application
    Filed: March 10, 2008
    Publication date: October 30, 2008
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tsuyoshi Nishida, Gen Watanabe, Kazuyoshi Kuwahara, Hajime Sonobe
  • Publication number: 20080163360
    Abstract: An information processing apparatus includes firmware incorporated in the apparatus; utility software that can be installed and uninstalled; a first restricting unit; and a second restricting unit. The information processing apparatus executes the firmware and the utility software to access a device. The firmware uses the first restricting unit to restrict use of the device on the basis of restriction information, supplies the restriction information to the utility software, and removes the restriction by the first restricting unit if an instruction to remove the restriction is received from the utility software. The utility software determines whether the use of the device has already been restricted by the second restricting unit when the utility software receives the restriction information from the firmware, and instructs the firmware to remove the restriction by the first restricting unit if the use of the device has already been restricted by the second restricting unit.
    Type: Application
    Filed: December 20, 2007
    Publication date: July 3, 2008
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Tsuyoshi Nishida
  • Pen
    Patent number: D575819
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: August 26, 2008
    Assignee: Mitsubishi Pencil Co., Ltd.
    Inventor: Tsuyoshi Nishida
  • Pen
    Patent number: D586393
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: February 10, 2009
    Assignee: Mitsubishi Pencil Co., Ltd.
    Inventor: Tsuyoshi Nishida
  • Pen
    Patent number: D641404
    Type: Grant
    Filed: June 1, 2010
    Date of Patent: July 12, 2011
    Assignee: Mitsubishi Pencil Company, Limited
    Inventor: Tsuyoshi Nishida
  • Pen
    Patent number: D667502
    Type: Grant
    Filed: May 27, 2011
    Date of Patent: September 18, 2012
    Assignee: Mitsubishi Pencil Company, Limited
    Inventor: Tsuyoshi Nishida
  • Patent number: D691654
    Type: Grant
    Filed: December 8, 2011
    Date of Patent: October 15, 2013
    Assignee: Mitsubishi Pencil Company, Limited
    Inventor: Tsuyoshi Nishida