Patents by Inventor Tuan Pham

Tuan Pham has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180108671
    Abstract: Memory openings and support openings can be formed through an alternating stack of insulating layers and sacrificial material layers. A set of dielectric layers and at least one semiconductor material layer can be sequentially deposited in each of the memory openings and the support openings. The at least one semiconductor material layer is removed from inside the support openings, while the at least one semiconductor material layer is not removed from inside the memory openings. Memory stack structures and support pillar structures are formed in the memory openings and the support openings, respectively. The sacrificial material layers are replaced with electrically conductive layers. Removal of the at least one semiconductor material layer from the support pillar structures reduces or eliminates leakage current through the support pillar structures.
    Type: Application
    Filed: October 18, 2016
    Publication date: April 19, 2018
    Inventors: Fabo YU, Jayavel PACHAMUTHU, Jongsun SEL, Tuan PHAM, Cheng-Chung CHU, Yao-Sheng LEE, Kensuke YAMAGUCHI, Masanori TERAHARA, Shuji MINAGAWA
  • Patent number: 9917093
    Abstract: A three-dimensional memory device includes a plurality of planes, each having a respective alternating stack, strings of memory stack structures which extends through the respective alternating stack, and backside contact via structures vertically extending through the respective alternating stack, extending generally along the first horizontal direction, and laterally separating neighboring pairs of strings of memory stack structures along a second horizontal direction. A first plane includes a first plurality of strings that are laterally spaced apart along the second horizontal direction by a first plurality of backside contact via structures.
    Type: Grant
    Filed: June 28, 2016
    Date of Patent: March 13, 2018
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Cheng-Chung Chu, Jayavel Pachamuthu, Tuan Pham, Fumitoshi Ito, Masaaki Higashitani
  • Patent number: 9911058
    Abstract: A method of updating a scene model for a foreground segmentation of an input image captured from a camera, is disclosed. One or more visual elements of the input image are determined. A spatial relationship between at least one of the visual elements and the scene model for a foreground segmentation of the input image is determined. The method updates the scene model for determining the foreground segmentation of the input image based on the determined spatial relationship.
    Type: Grant
    Filed: December 19, 2014
    Date of Patent: March 6, 2018
    Assignee: Canon Kabushiki Kaisha
    Inventors: Amit Kumar Gupta, Quang Tuan Pham
  • Patent number: 9911198
    Abstract: At least one method of, and at least one apparatus, system and computer readable medium for, matching moving targets between two camera views are discussed herein. The moving targets are tracked over video frames in each of the camera views and motion directions of the targets are recorded. Appearance similarities for cross-camera target pairs over synchronized ones of the video frames are determined. A joint probability model of co-occurred ones of the recorded motion directions for the camera views are determined using a weighted accumulation of the recorded motion directions of the cross-camera target pairs, where accumulation weights used in determining the joint probability model are derived from the determined appearance similarities. The moving targets between the camera views are matched using the joint probability model.
    Type: Grant
    Filed: December 17, 2015
    Date of Patent: March 6, 2018
    Assignee: Canon Kabushiki Kaisha
    Inventor: Quang Tuan Pham
  • Publication number: 20180060669
    Abstract: A method and system associated with a camera view of a moving-object in a scene. The method comprises detecting and tracking the moving object over multiple video frames, estimating an orientation of the moving object in each of the video frames, and constructing a cost map from the estimated orientations over the multiple video frames for finding a minimum cost path over the cost map. The Method also comprises determining regularised orientation estimates of the moving-object from the minimum cost path, and locating the vanishing point of the camera view based on an axis of the moving-object from the minimum cost path, the axis formed by using the regularised orientation estimates.
    Type: Application
    Filed: August 30, 2016
    Publication date: March 1, 2018
    Inventors: QUANG TUAN PHAM, GEOFFREY RICHARD TAYLOR
  • Publication number: 20170373078
    Abstract: A three-dimensional memory device includes a plurality of planes, each having a respective alternating stack, strings of memory stack structures which extends through the respective alternating stack, and backside contact via structures vertically extending through the respective alternating stack, extending generally along the first horizontal direction, and laterally separating neighboring pairs of strings of memory stack structures along a second horizontal direction. A first plane includes a first plurality of strings that are laterally spaced apart along the second horizontal direction by a first plurality of backside contact via structures.
    Type: Application
    Filed: June 28, 2016
    Publication date: December 28, 2017
    Inventors: Cheng-Chung CHU, Jayavel PACHAMUTHU, Tuan PHAM, Fumitoshi ITO, Masaaki HIGASHITANI
  • Publication number: 20170373087
    Abstract: Die cracking of a three dimensional memory device may be reduced by adding offsets to backside contact via structures. Each backside contact via structure can include laterally extending portions that extend along a first horizontal direction adjoined by adjoining portions that extend along a horizontal direction other than the first horizontal direction. In order to preserve periodicity of memory stack structures extending through an alternating stack of insulating layers and electrically conductive layers, the distance between an outermost row of a string of memory stack structures between a pair of backside contact via structures and a most proximal backside contact via structure can vary from a laterally extending portion to another laterally extending portion within the most proximal backside contact via structure. Source shunt lines that are parallel to bit lines can be formed over a selected subset of offset portions of the backside contact via structures.
    Type: Application
    Filed: June 28, 2016
    Publication date: December 28, 2017
    Inventors: Fumitoshi ITO, Masaaki HIGASHITANI, Cheng-Chung CHU, Jayavel PACHAMUTHU, Tuan PHAM
  • Patent number: 9842851
    Abstract: An alternating stack of insulating layers and sacrificial material layers is formed over a substrate. A dielectric collar structure can be formed prior to formation of an epitaxial channel portion, and can be employed to protect the epitaxial channel portion during replacement of the sacrificial material layers with electrically conductive layers. Exposure of the epitaxial channel portion to an etchant during removal of the sacrificial material layers is avoided through use of the dielectric collar structure. Additionally or alternatively, facets on the top surface of the epitaxial channel portion can be reduced or eliminated by forming the epitaxial channel portion to a height that exceeds a target height, and by recessing a top portion of the epitaxial channel portion. The recess etch can remove protruding portions of the epitaxial channel portion at a greater removal rate than a non-protruding portion.
    Type: Grant
    Filed: October 30, 2015
    Date of Patent: December 12, 2017
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Jayavel Pachamuthu, Tuan Pham
  • Patent number: 9768270
    Abstract: Undesirable metal contamination from a selective metal deposition process can be minimized or eliminated by employing a first material layer on a bevel and a back side of a substrate, while providing a second material layer only on a front side of the substrate. The first material layer and the second material layer are selected such that a selective deposition process of a metal material provides a metal material portion only on the second material layer, while no deposition occurs on the first material layer or isolated islands of the metal material are formed on the first material layer. Any residual metal material can be removed from the bevel and the back side by a wet etch to reduce or prevent metal contamination from the deposited metal material.
    Type: Grant
    Filed: August 31, 2015
    Date of Patent: September 19, 2017
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Marika Gunji-Yoneoka, Atsushi Suyama, Kensuke Yamaguchi, Hiroyuki Kinoshita, Raghuveer S. Makala, Rahul Sharangpani, Shigehisa Inoue, Tuan Pham
  • Publication number: 20170259048
    Abstract: A dilation catheter system includes a body and a shaft assembly. The shaft assembly extends passed a distal end of the body. The shaft assembly includes a fixed guide member, a catheter shaft, a dilator, a removable guide member, and a guidewire. The fixed guide member is fixed relative to the body. The dilator is fixed to the catheter shaft. The catheter shaft is operable to expand the dilator. The removable guide member is operable to selectively attach to the body. The catheter shaft is slidably disposed along the removable guide member such that the catheter shaft is configured to translate along the removable guide member. The guidewire is slidably disposed within the removable guide member.
    Type: Application
    Filed: September 28, 2016
    Publication date: September 14, 2017
    Inventors: George L. Matlock, Don Q. Ngo-Chu, Randy S. Chan, Jason R. Phillips, Tuan Pham
  • Patent number: 9711522
    Abstract: In a three dimensional nonvolatile memory, memory holes extend vertically through two or more physical levels in which memory cells are formed. Memory hole structures are formed in memory holes to include vertical channels. Vertical trenches are subsequently formed to divide memory hole structures into two or more vertical NAND strings.
    Type: Grant
    Filed: October 3, 2014
    Date of Patent: July 18, 2017
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Chan Park, Jong Sun Sel, Tuan Pham
  • Publication number: 20170178345
    Abstract: At least one method of, and at least one apparatus, system and computer readable medium for, matching moving targets between two camera views are discussed herein. The moving targets are tracked over video frames in each of the camera views and motion directions of the targets are recorded. Appearance similarities for cross-camera target pairs over synchronised ones of the video frames are determined. A joint probability model of co-occurred ones of the recorded motion directions for the camera views are determined using a weighted accumulation of the recorded motion directions of the cross-camera target pairs, where accumulation weights used in determining the joint probability model are derived from the determined appearance similarities. The moving targets between the camera views are matched using the joint probability model.
    Type: Application
    Filed: December 17, 2015
    Publication date: June 22, 2017
    Inventor: QUANG TUAN PHAM
  • Patent number: 9659956
    Abstract: A method of manufacturing a three-dimensional memory device includes forming, a bottom dielectric layer, a bottom sacrificial material layer, and an alternating stack of insulating layers and spacer material layers over a semiconductor substrate, forming a memory opening, forming an epitaxial channel portion and a memory stack structure in the memory opening, forming a backside contact trench, forming a first backside recess by selectively removing the bottom sacrificial material layer, forming a semiconductor oxide layer underneath the bottom dielectric layer and around a material of the epitaxial channel portion, forming second backside recesses by selectively removing the spacer material layers, and forming electrically conductive layers in the first and second backside recesses.
    Type: Grant
    Filed: January 6, 2016
    Date of Patent: May 23, 2017
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Jayavel Pachamuthu, Tuan Pham, Henry Chien
  • Publication number: 20170125438
    Abstract: An alternating stack of insulating layers and sacrificial material layers is formed over a substrate. A dielectric collar structure can be formed prior to formation of an epitaxial channel portion, and can be employed to protect the epitaxial channel portion during replacement of the sacrificial material layers with electrically conductive layers. Exposure of the epitaxial channel portion to an etchant during removal of the sacrificial material layers is avoided through use of the dielectric collar structure. Additionally or alternatively, facets on the top surface of the epitaxial channel portion can be reduced or eliminated by forming the epitaxial channel portion to a height that exceeds a target height, and by recessing a top portion of the epitaxial channel portion. The recess etch can remove protruding portions of the epitaxial channel portion at a greater removal rate than a non-protruding portion.
    Type: Application
    Filed: October 30, 2015
    Publication date: May 4, 2017
    Inventors: Jayavel Pachamuthu, Tuan Pham
  • Publication number: 20170091561
    Abstract: Method, system, apparatus and computer readable medium for re-identifying a query objection moving from a first camera view to a second camera view. The method comprises the steps of accessing a first set of image frames (Q) captured from the first camera view and a second set of image frames (C) captured from the second camera view; selecting a first representative frame (QR) from the first set of image frames and a second representative frame (CR) from the second set of image frames based on a plurality of intra-camera object appearance distances between frame pairs in each set of image frames; and re-identifying the candidate object in the second camera view as the query object in the first camera view based on at least one inter-camera object appearance distance (D) calculated between the first representative frame and the second representative frame.
    Type: Application
    Filed: September 28, 2016
    Publication date: March 30, 2017
    Inventor: QUANG TUAN PHAM
  • Patent number: 9601508
    Abstract: An alternating stack of insulating layers and sacrificial material layers is formed over a substrate. After formation of a memory opening, all surfaces of the memory opening are provided as silicon oxide surfaces by formation of at least one silicon oxide portion. A silicon nitride layer is formed in the memory opening. After formation of a memory stack structure, backside recesses can be formed employing the silicon oxide portions as an etch stop. The silicon oxide portions can be subsequently removed employing the silicon nitride layer as an etch stop. Physically exposed portions of the silicon nitride layer can be removed selective to the memory stack structure. Damage to the outer layer of the memory stack structure can be minimized or eliminated by successive use of etch stop structures. Electrically conductive layers can be subsequently formed in the backside recesses.
    Type: Grant
    Filed: October 23, 2015
    Date of Patent: March 21, 2017
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Jongsun Sel, Chan Park, Atsushi Suyama, Frank Yu, Hiroyuki Ogawa, Ryoichi Honma, Kensuke Yamaguchi, Hiroaki Iuchi, Naoki Takeguchi, Tuan Pham, Kiyohiko Sakakibara, Jiao Chen
  • Publication number: 20160315095
    Abstract: An alternating stack of insulating layers and sacrificial material layers is formed over a substrate. After formation of a memory opening, all surfaces of the memory opening are provided as silicon oxide surfaces by formation of at least one silicon oxide portion. A silicon nitride layer is formed in the memory opening. After formation of a memory stack structure, backside recesses can be formed employing the silicon oxide portions as an etch stop. The silicon oxide portions can be subsequently removed employing the silicon nitride layer as an etch stop. Physically exposed portions of the silicon nitride layer can be removed selective to the memory stack structure. Damage to the outer layer of the memory stack structure can be minimized or eliminated by successive use of etch stop structures. Electrically conductive layers can be subsequently formed in the backside recesses.
    Type: Application
    Filed: October 23, 2015
    Publication date: October 27, 2016
    Inventors: Jongsun Sel, Chan Park, Atsushi Suyama, Frank Yu, Hiroyuki Ogawa, Ryoichi Honma, Kensuke Yamaguchi, Hiroaki Iuchi, Naoki Takeguchi, Tuan Pham, Kiyohiko Sakakibara, Jiao Chen
  • Patent number: 9466113
    Abstract: A method of blurring an image using a spatially variable blur is disclosed. The method comprises the steps of: for each pixel of a scan line of pixels in the image: obtaining a measure representative of image depth at the pixel; determining a blur kernel width for the pixel based on the measure representative of image depth at the pixel; and where an increase in the determined blur kernel width with respect to a blur kernel width of a previous pixel in the scan line is detected: determining, from the determined blur kernel width, a tapered blur width adapted to provide an asymmetric filter response for the pixel; and applying the tapered blur width to a filter to output a blurred pixel value for the pixel by using a plurality of filter coefficients determined based on blur width values of one or more previously blurred pixels.
    Type: Grant
    Filed: December 17, 2014
    Date of Patent: October 11, 2016
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Quang Tuan Pham
  • Patent number: 9460958
    Abstract: Air gap isolation in non-volatile memory arrays and related fabrication processes are provided. Electrical isolation between adjacent active areas of a substrate can be provided, at least in part, by bit line air gaps that are elongated in a column direction between the active areas. At least one cap is formed over each isolation region, at least partially overlying air to provide an upper endpoint for the corresponding air gap. The caps may be formed at least partially along the sidewalls of adjacent charge storage regions. In various embodiments, selective growth processes are used to form capping strips over the isolation regions to define the air gaps. Word line air gaps that are elongated in a row direction between adjacent rows of storage elements are also provided.
    Type: Grant
    Filed: November 26, 2013
    Date of Patent: October 4, 2016
    Assignee: SanDisk Technologies LLC
    Inventors: Vinod R Purayath, Hiroyuki Kinoshita, Tuan Pham
  • Patent number: 9379120
    Abstract: High-density semiconductor memory utilizing metal control gate structures and air gap electrical isolation between discrete devices in these types of structures are provided. During gate formation and definition, etching the metal control gate layer(s) is separated from etching the charge storage layer to form protective sidewall spacers along the vertical sidewalls of the metal control gate layer(s). The sidewall spacers encapsulate the metal control gate layer(s) while etching the charge storage material to avoid contamination of the charge storage and tunnel dielectric materials. Electrical isolation is provided, at least in part, by air gaps that are formed in the row direction and/or air gaps that are formed in the column direction.
    Type: Grant
    Filed: July 22, 2013
    Date of Patent: June 28, 2016
    Assignee: SanDisk Technologies Inc.
    Inventors: Vinod Robert Purayath, Tuan Pham, Hiroyuki Kinoshita, Yuan Zhang, Henry Chin, James K Kai, Takashi W Orimoto, George Matamis, Henry Chien