Abstract: A direct AC-coupled amplifier for use with a plurality of magnetoresistive read elements includes a differential amplifier having first and second inputs and first and second outputs. A plurality of input circuits are provided, one for each MR element. Each input circuit has first and second connections to opposite sides of the respective MR element and a pair of emitter-follower its. Each emitter-follower circuit comprises a transistor having a base connected to one of the connections and a collector arranged to be connected a first voltage source. A capacitor is connected between the emitter of each of the transistors and a respective input of the amplifier. A current is applied to the first and second connections of a selected one of the input circuits to operate the respective MR element.

Abstract: A write driver drives a current through a two-terminal inductive load. A switching circuit drives current through the inductive load, and connects to the inductive load and to at least one control node. A driver circuit charges and discharges the control node in response to an input signal. The driver circuit has at least one charging path to charge the control node and at least two active discharging paths to discharge the control node.

Abstract: A power supply filter is constructed with a capacitive element and an active element coupled to a filtered node and an impedance coupled between the filtered node and a power supply node. The filtered node for carrying a filtered version of a power supply signal on the power supply node. The active element having electrical characteristics such that the addition of the active element to the power supply filter reduces the amount of capacitance needed from the capacitive element to achieve a desired pole frequency for a given voltage drop across the impedance element.

Abstract: A write driver for a magnetic transducer having a three-terminal inductive coil includes first and second voltage sources, a write current source, and a switching network having first and second switching transistors connected between the second voltage source and the respective first and second taps. The switching network responds to respective first and second inputs to switch the write current between respective first and second taps. Active pull-down subcircuits operate to alternately supply base current to the respective first and second switching transistors to charge parasitic capacitances of the respective switching transistors and to alternately sink base current from the respective switching transistors to discharge parasitic capacitances.

Abstract: A system for writing servo information to a plurality of magnetic discs in a servo write mode, and for writing data to the plurality of magnetic discs in a data write mode in disclosed. The system includes a servo binary input buffer for receiving a mode signal and for directing the write signal based upon the mode signal. A first plurality of switches, coupled to the servo binary input buffer and to a disc select buffer, directs the write signal to a selected portion of a plurality of write heads. A second plurality of switches, coupled to the first plurality of switches, to the plurality of write heads, and to a head select buffer, supplies the write signal to one write head in the selected portion of the plurality of write heads during the data write mode, and supplies the write signal to one half of the write heads in the selected portion of the plurality of write heads during the servo write mode.

Abstract: A logic translating buffer for low voltage operation for receiving a TTL compatible signal and providing a current mode logic signal. The logic translating buffer includes an emitter coupled differential pair of NPN transistors with the common emitters each being connected to a current source. One of the transistors of the differential pair has a constant voltage bias applied to the base thereof that is equal to the sum of a forward biased PN junction, a forward biased Schottky diode, and the voltage drop across a first resistor. The other transistor of the differential pair is provided a signal that is representative of the logic level input to the translating buffer. A clamping transistor is provided for keeping the other transistor of the differential pair from saturating.

Abstract: A read preamplifier for use in reading data in a magnetic storage system uses positive feedback to reduce the preamplifier's input capacitance. The read preamplifier includes first and second voltage supply terminals. An input is coupled to the second voltage supply terminal and receives input signals from a connected magnetic head. An output is coupled to the first voltage supply terminal and to the input for producing output signals based upon the input signals. A positive feedback circuit, coupled to the input reduces the input capacitance of the read preamplifier.

Abstract: The present invention is an improved current mirror circuit. This improved current mirror circuit includes first and second transistors of the same conductivity type and have bases connected together. The first transistor is connected between a first supply terminal and an input terminal. The second transistor is connected between a first supply terminal and an output terminal. Included is a feedback circuit for providing a voltage feedback between the input terminal and the bases of the first and second transistors. Also included is a bias circuit for providing a bias current to the feedback circuit that is based on the input current.

Abstract: A write driver for driving a transducer in a storage system. The write driver includes first and second supply terminals and a H-switch for switching current flow through the transducer between a first direction and a second direction, opposite to the first direction. The H-switch includes pull-up transistors and pull-down transistors connected across the transducer for switching current flow through the transducer. Each pull-up transistor and pull-down transistor has a control terminal for controlling current flow through the transistor. The write driver further includes data input terminals for receiving data signals. A bias circuit is connected between the control terminals of the pull-up and pull-down transistors and the data input terminals for switching the pull-up and pull-down transistors between conducting and non-conducting states as a function of the received data signals.

Abstract: A write circuit for driving a magnetic head in a magnetic storage system which greatly improves the voltage swing across the magnetic head. The write circuit includes data input for receiving data input signals, a predriver current source, a predriver circuit, and a write driver circuit. The predriver circuit is connected to the data input and has first and second predriver current paths. The predriver current paths are connected to a predriver current source. The predriver circuit directs current from the predriver current source through the first and second predriver current paths as a function of the data input signals. The write driver circuit has first and second write currents paths connected across the magnetic head. The first write current path directs current through the magnetic head in a first direction and the second write current path directs current through the magnetic head in a second direction, opposite to the first direction.

Abstract: A base current compensation circuit is configured for connection to a first current mirror that has lost base current. The compensation circuit includes a compensation mirror coupled in a feedback loop to the first current mirror. A current sensing transistor senses the lost base current. A current duplicating mirror is coupled to the current sensing transistor and generates a compensation current in response to the sensed lost base current. The compensation current is fed back into the first current mirror to compensate for the lost base current. A voltage clamp is coupled to the current sensing transistor and the current duplicating transistor. The voltage clamp maintains approximately equal collector-base voltages in the current sensing transistor and the current duplicating transistor to increase accuracy of the compensation mirror.

Abstract: A bias current cancellation circuit provides current to the bases of a pair of transistors forming a differential amplifier. A transistor of matched characteristics to the differential amplifier pair is operated so that its base current replicates the base currents of the differential transistor pair. This replicated base current is inverted by a current mirror which is connected to the bases of the differential transistional pair. A second order cancellation error caused by base current differences in the current mirror is cancelled by a feedback circuit so that only the base current of the matching transistor affects the currents supplied to differential amplifier.

Abstract: Trimming of input offset voltage of a diferential amplifier is provided by a pair of resistance networks which are connected to the emitters of a pair of current mirror transistors. By adjusting the resistances of the resistance networks, the adjustment currents flowing through the current mirror transistors are selected to cancel out the input offset voltage of the differential amplifier. Each resistance network includes a plurality of resistors connected in series with a low resistance shorting link connected in parallel with each of the plurality of resistances. The input offset voltage is trimmed by selectively cutting the shorting links with a two-phase measure and trim process.