Abstract: A method and system for acquiring data for assessment of cardiovascular disease, the method comprising one or more of: manipulating one or more hardware aspects of the photoplethysmography data acquisition system(s) implementing the method; manipulating or providing user experience/user interface (UX/UI) aspects of the system(s) implementing the method; acquiring, processing, and deriving insights population specific data; accounting for or controlling sampling site variability; and using other suitable sources of data in order to generate high quality data for characterization, assessment, and management of cardiovascular disease.

Abstract: A multi-chip module (MCM) package includes an organic laminate substrate; first and second semiconductor device chips that are mounted to a top side of the substrate and that define a chip gap region between opposing edges of the chips; and a stiffener that is embedded in the bottom side of the substrate. The stiffener extends across a stiffening region, which underlies the chip gap region, and does not protrude beyond a bottom side metallization of the substrate.

Abstract: An electronic apparatus that includes a first semiconductor chip mounted on a substrate; a second semiconductor chip mounted on the substrate; a spacer attached to the substrate and situated between the first and second semiconductor chips; a lid mounted on the substrate and enclosing the first and second semiconductor chips and the spacer, the spacer having an adhesive material adhesively attached to the lid; and underfill material underneath the first and second semiconductor chips, underneath the spacer and between the spacer and the first and second semiconductor chips.

Abstract: Embodiments of the present invention are directed to a new crack stop system and a method for providing an interlayer dielectric (ILD) crack bifurcation in semiconductor back-end-of-line (BEOL). In a non-limiting embodiment of the invention, a crack stop is formed over a substrate. The crack stop can span one or more dielectric layers. A topologically interlocking composite structure is formed adjacent to the crack stop and over the substrate. The topologically interlocking composite structure spans the one or more dielectric layers. A capping film is formed over the topologically interlocking composite structure and one or more metal interconnect layers are formed over the capping film. The composite structure includes a bulk matrix material and embedded inclusions. To promote crack bifurcation, materials of the inclusions and bulk matrix material are selected to ensure that the Young's modulus of the inclusions is greater than the Young's modulus of the bulk matrix material.

Abstract: A multi-chip module (MCM) package includes an organic laminate substrate; first and second semiconductor device chips that are mounted to a top side of the substrate and that define a chip gap region between opposing edges of the chips; and a stiffener that is embedded in the bottom side of the substrate. The stiffener extends across a stiffening region, which underlies the chip gap region, and does not protrude beyond a bottom side metallization of the substrate.

Abstract: Chip pairs in a semiconductor module have a spacing between them that forms a spacing region. A lid has a lid bottom side and one or more feet. The feet protrude from a periphery of the lid bottom side. A sealband adhesive has a sealband adhesive thickness and adheres the feet to a substrate so the chip pairs are under the lid bottom side and back sides of the chips are in thermal contact with the lid bottom side. A variable thickness lid adhesive connects the substrate in the spacing region to the lid bottom side. The variable thickness lid adhesive has a lid adhesive thickness that is greater than the sealband adhesive thickness by a delta thickness amount. In some embodiments, the lid also has a shortened central lid rib with a bottom. The shorten central lid rib protrudes an extension distance from the lid bottom side into the spacing region. In these embodiments, the variable thickness lid adhesive connects the substrate in the spacing region to the bottom.

Abstract: An electronic apparatus that includes a first semiconductor chip mounted on a substrate; a second semiconductor chip mounted on the substrate; a spacer attached to the substrate and situated between the first and second semiconductor chips; a lid mounted on the substrate and enclosing the first and second semiconductor chips and the spacer, the spacer having an adhesive material adhesively attached to the lid; and underfill material underneath the first and second semiconductor chips, underneath the spacer and between the spacer and the first and second semiconductor chips.

Abstract: An integrated circuit (IC) module includes a carrier and multiple IC devices. A heterogenous seal band connects a lid to the carrier. A perimeter wall of the lid is joined to a low modulus seal band and an inner wall of the lid is joined to a high modulus seal band. The low modulus seal band is located around the perimeter of the lid and a perimeter of the multiple IC devices. The high modulus seal band is located between the multiple IC devices. The low modulus seal band has a low resistance to being deformed elastically and the high modulus seal band has a high resistance to being deformed elastically. The low modulus seal band allows for dimensional fluctuations between the lid and carrier. The high modulus seal band allows for adequate joining of the lid and the carrier with relatively less seal band material.

Abstract: A multi integrated circuit (IC) chip package includes multiple IC chips, a carrier, and a lid. The IC chips may be connected to the carrier. Alternatively, each IC chip may be connected to an interposer and multiple interposers may be connected to the carrier. The carrier may be positioned against a carrier deck. The lid may be positioned relative to carrier by aligning one or more alignment features within the lid with one or more respective alignment features of the carrier deck. A compression fixture cover may contact the lid and exert a force toward the carrier deck, the lid be loaded against respective IC chips, and the lid may be loaded against the carrier. While under compression, thermal interface material between respective the lid and respective IC chips and seal band material between the lid and the carrier may be cured.

Abstract: A system and method for determining cardiovascular parameters can include: receiving a plethymogram (PG) dataset, removing noise from the PG dataset, segmenting the PG dataset, extracting a set of fiducials from the PG dataset, and transforming the set of fiducials to determine the cardiovascular parameters.

Abstract: A semiconductor device that includes a semiconductor substrate having a surface, the surface having several regions having different thermal and/or mechanical requirements; and a composite thermal interface material including several spatially localized thermal interface materials placed on the surface, each of the several thermal interface materials tailored to the different thermal and/or mechanical requirements of each of the regions. Also disclosed is a method of forming the composite thermal interface material.

Abstract: An integrated circuit (IC) device, such as a wafer, die, or the like, includes a viscoelastic pad upon a contact. The viscoelastic pad includes a viscoelastic material and an electrically conductive material within the viscoelastic material. The viscoelastic pad provides for a probe needle of an IC device tester to be electrically connected to the IC device contact without the probe needle directly contacting the IC device contact. The viscoelastic pad may be probed multiple instances by the probe needle and may be washed or otherwise removed from the IC device after testing is completed. The viscoelastic pad may be formed upon the IC device by forming the viscoelastic material within a mask, aligning the viscoelastic pad to the IC device contact, and ejecting the viscoelastic material from the mask upon the IC device contact.

Abstract: A thermal interface material and systems and methods for forming a thermal interface material include depositing a layer of a composite material, including at least a first material and a second material, the first material including a carrier fluid and the second material including a filler particle suspended within the first material. A particle manipulator is positioned over the layer of the composite material, the particle manipulator including at least one emitter to apply a particle manipulating field to bias a movement of the filler particles. The second material is redistributed by applying the particle manipulating field to interact with the second material causing the second material to migrate from a surrounding region in the composite material into a high concentration region in the composite material to form a customized thermal interface such that the high concentration region is configured and positioned corresponding to a hotspot.

Abstract: Embodiments of the present invention are directed to a new crack stop system and a method for providing an interlayer dielectric (ILD) crack bifurcation in semiconductor back-end-of-line (BEOL). In a non-limiting embodiment of the invention, a crack stop is formed over a substrate. The crack stop can span one or more dielectric layers. A topologically interlocking composite structure is formed adjacent to the crack stop and over the substrate. The topologically interlocking composite structure spans the one or more dielectric layers. A capping film is formed over the topologically interlocking composite structure and one or more metal interconnect layers are formed over the capping film. The composite structure includes a bulk matrix material and embedded inclusions. To promote crack bifurcation, materials of the inclusions and bulk matrix material are selected to ensure that the Young's modulus of the inclusions is greater than the Young's modulus of the bulk matrix material.

Abstract: Embodiments of the present invention relate to an heterogenous thermal interface material (TIM). The heterogenous TIM includes two or more different materials. One material has a low elastic modulus, also known as Young's modulus, and is utilized primarily to transfer heat from one component to another component. Another material has a higher elastic modulus and is primarily utilized to bond or connect the corners and/or edges of one component to the other component. The high elastic modulus material is generally located within the heterogenous TIM where TIM strain is or is expected to be high. For example, the high elastic modulus material may be located at the corner and/or edge regions of the heterogenous TIM.

Abstract: A heat spreader is disclosed with regions where material is absent to reduce the mass/weight of the heat spreader without substantially reducing the temperature of the semiconductor chip and without substantially affecting the warpage and mechanical stress/strain in the electronic package.

Abstract: A semiconductor device that includes a semiconductor substrate having a surface, the surface having several regions having different thermal and/or mechanical requirements; and a composite thermal interface material including several spatially localized thermal interface materials placed on the surface, each of the several thermal interface materials tailored to the different thermal and/or mechanical requirements of each of the regions. Also disclosed is a method of forming the composite thermal interface material.

Abstract: Embodiments of the present invention relate to an heterogenous thermal interface material (TIM). The heterogenous TIM includes two or more different materials. One material has a low elastic modulus, also known as Young's modulus, and is utilized primarily to transfer heat from one component to another component. Another material has a higher elastic modulus and is primarily utilized to bond or connect the corners and/or edges of one component to the other component. The high elastic modulus material is generally located within the heterogenous TIM where TIM strain is or is expected to be high. For example, the high elastic modulus material may be located at the corner and/or edge regions of the heterogenous TIM.

Abstract: An integrated circuit (IC) device, such as a wafer, die, or the like, includes a viscoelastic pad upon a contact. The viscoelastic pad includes a viscoelastic material and an electrically conductive material within the viscoelastic material. The viscoelastic pad provides for a probe needle of an IC device tester to be electrically connected to the IC device contact without the probe needle directly contacting the IC device contact. The viscoelastic pad may be probed multiple instances by the probe needle and may be washed or otherwise removed from the IC device after testing is completed. The viscoelastic pad may be formed upon the IC device by forming the viscoelastic material within a mask, aligning the viscoelastic pad to the IC device contact, and ejecting the viscoelastic material from the mask upon the IC device contact.

Abstract: A multi integrated circuit (IC) chip package includes multiple IC chips, a carrier, and a lid. The IC chips may be connected to the carrier. Alternatively, each IC chip may be connected to an interposer and multiple interposers may be connected to the carrier. The carrier may be positioned against a carrier deck. The lid may be positioned relative to carrier by aligning one or more alignment features within the lid with one or more respective alignment features of the carrier deck. A compression fixture cover may contact the lid and exert a force toward the carrier deck, the lid be loaded against respective IC chips, and the lid may be loaded against the carrier. While under compression, thermal interface material between respective the lid and respective IC chips and seal band material between the lid and the carrier may be cured.