Patents by Inventor Tung-An Lee

Tung-An Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180164516
    Abstract: A method for manufacturing an active optical cable comprises (a) flip-chip packaging chips onto a circuit board to form a OE circuit board, (b) integrating the OE circuit board onto an optical bench to form a OE bench, (c) integrating the OE bench onto a printed circuit board to form a OE module, (d) molding encapsulant onto the OE bench, (e) coupling a hybrid cable onto the OE module, and (f) utilizing low temperature, low pressure injection molding process to form the active optical cable.
    Type: Application
    Filed: January 23, 2017
    Publication date: June 14, 2018
    Inventors: Tung-An Lee, Shih-Jye Yo, Chia-Chi Chang
  • Publication number: 20180015090
    Abstract: The present invention relates to a novel type of PPAR? modulator having a pyrimido[5,4-d]pyrimidine main structure. The PPAR? modulator can enhance the expression and nuclear translocation of PPAR? in cells. The present invention also relates to a pharmaceutical composition comprising the PPAR? modulator of the invention encapsulated in a pharmaceutically acceptable cell-penetrating drug delivery system so that it can be directly delivered into cells. The present invention thus provides a method of preventing or treating PPAR?-related disorders or conditions comprising administering to a subject in need thereof a therapeutically effective amount of the PPAR? modulator of the invention or the pharmaceutical composition of the invention.
    Type: Application
    Filed: January 27, 2016
    Publication date: January 18, 2018
    Applicant: REALINN LIFE SCIENCE LIMITED
    Inventors: Jen Cheng LIN, Chun-Chieh LIN, Hsu-Tung LEE, Yu-Ming FAN, Jui-Chi TSAI, Ying-Chi DU
  • Publication number: 20170138884
    Abstract: Herein is disclosed a method for detecting a material comprising a thiol group (e.g. homocysteine, cysteine, glutathione) in a sample, the method comprising: •providing an electrode comprising a carbon material; •contacting said electrode with said sample in the presence of catechol or more generally a precursor of ortho-quinone; •performing cyclic or square wave voltammetry to convert catechol to ortho-quinone and wherein said ortho-quinone reacts with the material comprising a thiol group to form an electrochemical reaction product.
    Type: Application
    Filed: March 20, 2015
    Publication date: May 18, 2017
    Inventors: Patricia Tung Lee, Denise Lowinsohn, Richard Guy Compton
  • Publication number: 20170126318
    Abstract: A photoelectric conversion assembly is proposed. The photoelectric conversion module comprises three parts, photoelectric conversion module, a printed circuit board (PCB) and a hybrid cable. The photoelectric conversion module comprises an interposer, at least one optical element configured on the interposer, and an optical bench for the printed circuit board and the interposer configured thereon. Electrical wires are used for coupling to the printed circuit board. An optical ferrule is used for engaging with the photoelectric conversion module and an optical fiber component. A plug is used for electrically connecting the printed circuit board. A first lens array is configured under the interposer. A mirror is configured under the first lens array. A second lens array is configured left side of the mirror.
    Type: Application
    Filed: March 4, 2016
    Publication date: May 4, 2017
    Applicant: AQUAOPTICS CORP.
    Inventors: Chia-Chi Chang, Tung-An Lee, Shih-Jye Yo
  • Patent number: 9581776
    Abstract: A photoelectric conversion module is proposed. The photoelectric conversion module comprises two parts, interposer and optical bench. At least one optical element is configured on the interposer. The interposer is configured on a first concave portion of the optical bench. A first lens array is configured under the interposer to align the at least one optical element. A mirror is configured under the first lens array, with an optical micro-reflection surface. A second lens array is configured left side of the mirror.
    Type: Grant
    Filed: November 2, 2015
    Date of Patent: February 28, 2017
    Assignee: AQUAOPTICS CORP.
    Inventors: Tung-An Lee, Chia-Chi Chang, Shih-Jye Yo
  • Patent number: 9401604
    Abstract: The present invention provides a relay-based foolproof circuit for over-voltage protection, which is electrically connected between a plug and an electric device, and includes a relay having at least one magnetic core, a coil wound around the magnetic core and two reed switches each having a reed and being normally in a closed state because of the elastic effect of its reed. The relay-based foolproof circuit is able to provide AC power of a first specification (e.g., 110 V AC power) received from the plug to the electric device. However, when AC power of a second specification (e.g., 220 V AC power) greater than the first specification flows through the coil, the coil causes the magnetic core to generate a magnetic force great enough to drive the two reed switches into an open state for stopping the AC power of the second specification from being provided to the electric device.
    Type: Grant
    Filed: June 24, 2014
    Date of Patent: July 26, 2016
    Assignee: ALPHA NETWORKS INC.
    Inventors: Chung-Wang Lee, Pao-Ching Hu, Huai-Tung Lee
  • Patent number: 9339040
    Abstract: A bread maker has a base disposed with a power member, a container, an upper rotating shaft and a lower rotating shaft. The power member is in driving connection with the lower rotating shaft. The lower rotating shaft is in driving connection with the upper rotating shaft. The upper rotating shaft is in driving connection with a mixing and kneading blade situated inside the container. A transmitting plate is disposed in the base with an optical signal transmitting lamp and an optical signal receiver. A through hole perpendicular to an axis disposed on the lower shaft and running through the lower rotating shaft is disposed on the lower rotating shaft. The receiver is in signal connection with the power member. The transmitting lamp and the receiver are respectively located at two sides of the lower rotating shaft. The receiver is in signal connection with the power member.
    Type: Grant
    Filed: January 17, 2012
    Date of Patent: May 17, 2016
    Assignee: TSANN KUEN (ZHANG ZHOU) ENTERPRISE CO., LTD.
    Inventors: Xiaoju Yu, Fudong Cui, Shangqian Gao, Silong Guo, Yen Tung Lee
  • Patent number: 9302904
    Abstract: A method of fabricating an integrated semiconductor device, comprising: providing a substrate having a first region and a second region; and forming a semiconductor unit on the first region and forming a micro electro mechanical system (MEMS) unit on the second region in one process.
    Type: Grant
    Filed: September 25, 2014
    Date of Patent: April 5, 2016
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Hsueh-I Huang, Ming-Tung Lee, Shuo-Lun Tu
  • Publication number: 20150353422
    Abstract: Provided herein are compositions, methods, and systems for a material containing metastable carbonate and stabilizer. Methods for making the compositions and using the compositions are also provided.
    Type: Application
    Filed: August 17, 2015
    Publication date: December 10, 2015
    Inventors: MIGUEL FERNANDEZ, IRVIN CHEN, PATRICIA TUNG LEE, MATTHEW GINDER-VOGEL
  • Patent number: 9202862
    Abstract: A semiconductor structure and a manufacturing method of the same are provided. The semiconductor structure includes a substrate, a first well, a first heavily doping region, a field oxide, a first dielectric layer, and a conductive layer. The first well is disposed on the substrate, and the first heavily doping region is disposed in the first well. The field oxide is disposed on the first well and adjacent to the first heavily doping region. The first dielectric layer is disposed on the field oxide and covering the field oxide. The conductive layer is disposed on the first dielectric layer. The first well and the first heavily doping region have a first type doping.
    Type: Grant
    Filed: March 14, 2014
    Date of Patent: December 1, 2015
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Ming-Tung Lee, Cheng-Chi Lin, Chih-Chia Hsu, Chien-Chung Chen, Shih-Chin Lien, Shyi-Yuan Wu
  • Publication number: 20150288168
    Abstract: The present invention provides a relay-based foolproof circuit for over-voltage protection, which is electrically connected between a plug and an electric device, and includes a relay having at least one magnetic core, a coil wound around the magnetic core and two reed switches each having a reed and being normally in a closed state because of the elastic effect of its reed. The relay-based foolproof circuit is able to provide AC power of a first specification (e.g., 110 V AC power) received from the plug to the electric device. However, when AC power of a second specification (e.g., 220 V AC power) greater than the first specification flows through the coil, the coil causes the magnetic core to generate a magnetic force great enough to drive the two reed switches into an open state for stopping the AC power of the second specification from being provided to the electric device.
    Type: Application
    Filed: June 24, 2014
    Publication date: October 8, 2015
    Applicant: ALPHA NETWORKS INC.
    Inventors: Chung-Wang LEE, Pao-Ching HU, Huai-Tung LEE
  • Patent number: 9139472
    Abstract: Provided herein are compositions, methods, and systems for a material containing metastable carbonate and stabilizer. Methods for making the compositions and using the compositions are also provided.
    Type: Grant
    Filed: December 10, 2014
    Date of Patent: September 22, 2015
    Assignee: Calera Corporation
    Inventors: Miguel Fernandez, Irvin Chen, Patricia Tung Lee, Matthew Ginder-Vogel
  • Publication number: 20150263085
    Abstract: A semiconductor structure and a manufacturing method of the same are provided. The semiconductor structure includes a substrate, a first well, a first heavily doping region, a field oxide, a first dielectric layer, and a conductive layer. The first well is disposed on the substrate, and the first heavily doping region is disposed in the first well. The field oxide is disposed on the first well and adjacent to the first heavily doping region. The first dielectric layer is disposed on the field oxide and covering the field oxide. The conductive layer is disposed on the first dielectric layer. The first well and the first heavily doping region have a first type doping.
    Type: Application
    Filed: March 14, 2014
    Publication date: September 17, 2015
    Applicant: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Ming-Tung Lee, Cheng-Chi Lin, Chih-Chia Hsu, Chien-Chung Chen, Shih-Chin Lien, Shyi-Yuan Wu
  • Patent number: 9061940
    Abstract: Provided herein are compositions, methods, and systems for cementitious compositions containing calcium carbonate compositions and aggregate. The compositions find use in a variety of applications, including use in a variety of building materials and building applications.
    Type: Grant
    Filed: October 3, 2012
    Date of Patent: June 23, 2015
    Assignee: Calera Corporation
    Inventors: Irvin Chen, Patricia Tung Lee, Joshua Patterson
  • Publication number: 20150096470
    Abstract: Provided herein are compositions, methods, and systems for a material containing metastable carbonate and stabilizer. Methods for making the compositions and using the compositions are also provided.
    Type: Application
    Filed: December 10, 2014
    Publication date: April 9, 2015
    Inventors: MIGUEL FERNANDEZ, IRVIN CHEN, PATRICIA TUNG LEE, MATTHEW GINDER-VOGEL
  • Publication number: 20150044808
    Abstract: A method of fabricating an integrated semiconductor device, comprising: providing a substrate having a first region and a second region; and forming a semiconductor unit on the first region and forming a micro electro mechanical system (MEMS) unit on the second region in one process.
    Type: Application
    Filed: September 25, 2014
    Publication date: February 12, 2015
    Inventors: Hsueh-I Huang, Ming-Tung Lee, Shuo-Lun Tu
  • Patent number: 8940609
    Abstract: A semiconductor device and method of forming the semiconductor device are disclosed, where the semiconductor device includes additional implant regions in the source and drain areas of the device for improving Ron-sp and BVD characteristics of the device. The device includes a gate electrode formed over a channel region that separates first and second implant regions in the device substrate. The first implant region has a first conductivity type, and the second implant region has a second conductivity type. A source diffusion region is formed in the first implant region, and a drain diffusion region is formed in the second implant region.
    Type: Grant
    Filed: June 18, 2014
    Date of Patent: January 27, 2015
    Assignee: Macronix International Co., Ltd.
    Inventors: Chien-Chung Chen, Ming-Tung Lee, Shih-Chin Lien, Shyi-Yuan Wu
  • Patent number: 8936773
    Abstract: Provided herein are compositions, methods, and systems for a material containing metastable carbonate and stabilizer. Methods for making the compositions and using the compositions are also provided.
    Type: Grant
    Filed: April 26, 2012
    Date of Patent: January 20, 2015
    Assignee: Calera Corporation
    Inventors: Miguel Fernandez, Irvin Chen, Patricia Tung Lee, Matthew Ginder-Vogel
  • Patent number: 8928095
    Abstract: A semiconductor device having a well, a p well implant bounded at least in part within a substrate by the well, a conductive layer disposed on the substrate, a high voltage n? (HVN?) doped well implanted in the p well implant, a high voltage p doped (HVPD) well implanted in the p well implant, and a drain n? well and a source n? well disposed in the HVN? doped well and HVPD well, respectively, is provided. A method of fabricating the semiconductor device is also provided. In certain embodiments, the method of fabricating the semiconductor device is characterized by implanting the HVN? ions at a first tilt angle and/or implanting the HVPD ions at a second tilt angle.
    Type: Grant
    Filed: August 16, 2013
    Date of Patent: January 6, 2015
    Assignee: Macronix International Co., Ltd.
    Inventors: Chien-Chung Chen, Ming-Tung Lee, Yin-Fu Huang, Shih-Chin Lien, Shyi-Yuan Wu
  • Patent number: 8897470
    Abstract: A method of fabricating an integrated semiconductor device, comprising: providing a substrate having a first region and a second region; and forming a semiconductor unit on the first region and forming a micro electro mechanical system (MEMS) unit on the second region in one process.
    Type: Grant
    Filed: July 31, 2009
    Date of Patent: November 25, 2014
    Assignee: Macronix International Co., Ltd.
    Inventors: Hsueh-I Huang, Ming-Tung Lee, Shuo-Lun Tu