Abstract: A semiconductor device and method of forming the semiconductor device are disclosed, where the semiconductor device includes additional implant regions in the source and drain areas of the device for improving Ron-sp and BVD characteristics of the device. The device includes a gate electrode formed over a channel region that separates first and second implant regions in the device substrate. The first implant region has a first conductivity type, and the second implant region has a second conductivity type. A source diffusion region is formed in the first implant region, and a drain diffusion region is formed in the second implant region.

Abstract: A semiconductor device having a well, a p well implant bounded at least in part within a substrate by the well, a conductive layer disposed on the substrate, a high voltage n? (HVN?) doped well implanted in the p well implant, a high voltage p doped (HVPD) well implanted in the p well implant, and a drain n? well and a source n? well disposed in the HVN? doped well and HVPD well, respectively, is provided. A method of fabricating the semiconductor device is also provided. In certain embodiments, the method of fabricating the semiconductor device is characterized by implanting the HVN? ions at a first tilt angle and/or implanting the HVPD ions at a second tilt angle.

Abstract: Computer-implemented methods are provided for the delivery and/or prioritization of electronic marketing and promotional offers to a client device. In some embodiments, user context information associated with a user, and/or extrinsic context information, is employed to identify matching offers for a user, and to prioritize and optionally rank a subset of the matching offers. In other embodiments, user context information, and optionally extrinsic context information, is employed to dynamically trigger the activation and optional customization of offers for users, according to triggering logic and trigger parameters. In other embodiments, extrinsic context information is employed for triggering the availability of offers to one or more users, according to triggering logic and trigger parameters.

Abstract: A semiconductor device and method of forming the semiconductor device are disclosed, where the semiconductor device includes additional implant regions in the source and drain areas of the device for improving Ron-sp and BVD characteristics of the device. The device includes a gate electrode formed over a channel region that separates first and second implant regions in the device substrate. The first implant region has a first conductivity type, and the second implant region has a second conductivity type. A source diffusion region is formed in the first implant region, and a drain diffusion region is formed in the second implant region.

Abstract: A repair amplification circuit includes a controlling unit, a first operational amplifier, a second operational amplifier, a first switching unit, and a second switching unit. Under a detection mode, the controlling unit generates a detecting signal according to a testing signal transmitted by a unnecessary repair segment in a test picture. Under an operation mode, the controlling unit generates a switching signal according to a repair controlling signal related to the detecting signal. The first switching unit and the second switching unit are controlled by the switching signal, so as to transmit the driving signal to one of the first operational amplifier and the second operational amplifier, and to transmit a positive polarity repairing signal generated by the first operational amplifier or a negative polarity repairing signal generated by the second operational amplifier to a necessary repair segment.

Abstract: The present invention is provided with a toaster, which comprising a housing, a longitudinal groove, a transparent movable baffle and a positioning mechanism. It can be observed from the exterior with the heating status of the toast, making it convenient to use. The movable baffle is sliding and connected to the longitudinal groove and positioned by the positioning mechanism, making it able to be drawn out of the housing to clean, so that the present invention is used with health, clean and it makes the food more delicious finally.

Abstract: A bread maker has a base disposed with a power member, a container, an upper rotating shaft and a lower rotating shaft. The power member is in driving connection with the lower rotating shaft. The lower rotating shaft is in driving connection with the upper rotating shaft. The upper rotating shaft is in driving connection with a mixing and kneading blade situated inside the container. A transmitting plate is disposed in the base with an optical signal transmitting lamp and an optical signal receiver. A through hole perpendicular to an axis disposed on the lower shaft and running through the lower rotating shaft is disposed on the lower rotating shaft. The receiver is in signal connection with the power member. The transmitting lamp and the receiver are respectively located at two sides of the lower rotating shaft. The receiver is in signal connection with the power member.

Abstract: A bipolar junction transistor and a manufacturing method for the same are provided. The bipolar junction transistor includes a well region, an emitter electrode, a base electrode, a collector electrode, and a conductive layer. The emitter electrode, the base electrode and the collector electrode are separated from each other by the well region. The conductive layer is on the well region between the base electrode and the collector electrode.

Abstract: An apparatus of and method for making enhanced Schottky diodes having p-body regions operable to pinch a current flow path in a high-voltage n-well region and field plate structures operable to distribute an electric potential of the Schottky diode allow for a device with enhanced breakdown voltage properties. N-well regions implanted into the substrate over a p-type epitaxial layer may act as an anode of the Schottky diode and n-type well regions implanted in the high-voltage n-well regions may act as cathodes of the Schottky diode. The Schottky diode may also be used as a low-side mosfet structure device.

Abstract: The present invention provides a display device. The display device comprises: a timing controller, having a first number of output points; and a second number of source drivers, coupled to the first number of output points of the timing controller, respectively; wherein the first number is equal to the second number. The display device has higher resolution and fewer control pins between a timing controller and a source driver thereof. In addition, the display device provided by the present invention comprises the de-skew operation for minimizing the data and clock skew issue under high speed operation in prior art and the error bit check operation for avoiding display failure caused by error transmission.

Abstract: A semiconductor device and method of forming the semiconductor device are disclosed, where the semiconductor device includes additional implant regions in the source and drain areas of the device for improving Ron-sp and BVD characteristics of the device. The device includes a gate electrode formed over a channel region that separates first and second implant regions in the device substrate. The first implant region has a first conductivity type, and the second implant region has a second conductivity type. A source diffusion region is formed in the first implant region, and a drain diffusion region is formed in the second implant region.

Abstract: A bipolar junction transistor and a manufacturing method for the same are provided. The bipolar junction transistor includes a well region, an emitter electrode, a base electrode, a collector electrode, and a conductive layer. The emitter electrode, the base electrode and the collector electrode are separated from each other by the well region. The conductive layer is on the well region between the base electrode and the collector electrode.

Abstract: Provided herein are compositions, methods, and systems for a material containing metastable carbonate and stabilizer. Methods for making the compositions and using the compositions are also provided.

Abstract: A method of manufacturing a semiconductor bio-sensor comprises providing a substrate, forming a first dielectric layer on the substrate, forming a patterned first conductive layer on the first dielectric layer, the patterned first conductive layer including a first portion and a pair of second portions, forming a second dielectric layer, a third dielectric layer and a fourth dielectric layer in sequence over the patterned first conductive layer, forming cavities into the fourth dielectric layer, forming vias through the cavities, exposing the second portions of the patterned first conductive layer, forming a patterned second conductive layer on the fourth dielectric layer, forming a passivation layer on the patterned second conductive layer, forming an opening to expose a portion of the third dielectric layer over the first portion of the patterned first conductive layer, and forming a chamber through the opening.

Abstract: A semiconductor device for use in a relatively high voltage application that comprises a substrate, a first n-type well region in the substrate to serve as a high voltage n-well (HVNW) for the semiconductor device, a pair of second n-type well regions in the first n-type well region, a p-type region in the first n-type well region between the second n-type well regions, a pair of conductive regions on the substrate between the second n-type well regions, and a number of n-type regions to serve as n-type buried layers (NBLs) for the semiconductor device, wherein the NBLs are located below the first n-type region and dispersed in the substrate.

Abstract: A method of manufacturing a semiconductor bio-sensor comprises providing a substrate, forming a first dielectric layer on the substrate, forming a patterned first conductive layer on the first dielectric layer, the patterned first conductive layer including a first portion and a pair of second portions, forming a second dielectric layer, a third dielectric layer and a fourth dielectric layer in sequence over the patterned first conductive layer, forming cavities into the fourth dielectric layer, forming vias through the cavities, exposing the second portions of the patterned first conductive layer, forming a patterned second conductive layer on the fourth dielectric layer, forming a passivation layer on the patterned second conductive layer, forming an opening to expose a portion of the third dielectric layer over the first portion of the patterned first conductive layer, and forming a chamber through the opening.

Abstract: A method of manufacturing a semiconductor bio-sensor comprises providing a substrate, forming a first dielectric layer on the substrate, forming a patterned first conductive layer on the first dielectric layer, the patterned first conductive layer including a first portion and a pair of second portions, forming a second dielectric layer, a third dielectric layer and a fourth dielectric layer in sequence over the patterned first conductive layer, forming cavities into the fourth dielectric layer, forming vias through the cavities, exposing the second portions of the patterned first conductive layer, forming a patterned second conductive layer on the fourth dielectric layer, forming a passivation layer on the patterned second conductive layer, forming an opening to expose a portion of the third dielectric layer over the first portion of the patterned first conductive layer, and forming a chamber through the opening.

Abstract: A repair amplification circuit includes a controlling unit, a first operational amplifier, a second operational amplifier, a first switching unit, and a second switching unit. Under a detection mode, the controlling unit generates a detecting signal according to a testing signal transmitted by a unnecessary repair segment in a test picture. Under an operation mode, the controlling unit generates a switching signal according to a repair controlling signal related to the detecting signal. The first switching unit and the second switching unit are controlled by the switching signal, so as to transmit the driving signal to one of the first operational amplifier and the second operational amplifier, and to transmit a positive polarity repairing signal generated by the first operational amplifier or a negative polarity repairing signal generated by the second operational amplifier to a necessary repair segment.

Abstract: LDMOS devices having a single-strip contact pad in the source region, and related methods of manufacturing are disclosed. The LDMOS may comprise a first well lightly doped with a first dopant and formed into a portion of a substrate, the first well having a drain region at its surface heavily doped with the first dopant, and a second well lightly doped with a second dopant formed in another portion of the substrate, the second well having a source region at its surface comprising first portions heavily doped with the first dopant directly adjacent second portions heavily doped with the second dopant. Also, the LDMOS device may comprise a field oxide at the upper surface of the substrate between the source and drain regions, and contacting the first well but separated from the second well, and a gate formed partially over the field oxide and partially over the source region.

Abstract: A method of manufacturing a semiconductor bio-sensor comprises providing a substrate, forming a first dielectric layer on the substrate, forming a patterned first conductive layer on the first dielectric layer, the patterned first conductive layer including a first portion and a pair of second portions, forming a second dielectric layer, a third dielectric layer and a fourth dielectric layer in sequence over the patterned first conductive layer, forming cavities into the fourth dielectric layer, forming vias through the cavities, exposing the second portions of the patterned first conductive layer, forming a patterned second conductive layer on the fourth dielectric layer, forming a passivation layer on the patterned second conductive layer, forming an opening to expose a portion of the third dielectric layer over the first portion of the patterned first conductive layer, and forming a chamber through the opening.