Patents by Inventor Tung Hsu

Tung Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250126825
    Abstract: A dual gate high electron mobility transistor (HEMT) includes a substrate, a channel layer above the substrate, a source electrode, a drain electrode, a first gate electrode, and a second gate electrode. The source electrode and the drain electrode are respectively electrically coupled to the channel layer and are respectively above the channel layer. The first gate electrode and the second gate electrode are respectively electrically coupled to the channel layer and are respectively above the channel layer. The first gate electrode is located between the source electrode and the drain electrode. The second gate electrode is located between the source electrode and the first gate electrode. The second gate electrode is biased with a DC voltage.
    Type: Application
    Filed: January 3, 2024
    Publication date: April 17, 2025
    Inventors: Heng-Tung HSU, Ping-Hsun CHIU
  • Patent number: 12267984
    Abstract: A heat dissipation assembly is disclosed and includes a frame and a fan. The frame includes a heat conduction channel and an airflow intake. The heat conduction channel is communication with an exterior through airflow intake. The frame includes a first plane, a second plane and an inclined plane. The first plane is disposed adjacent to the airflow intake. The inclined plane is connected between the first plane and the second plane. The second plane includes an inlet. The heat conduction channel is in communication between the airflow intake and the inlet. A cross-section area of the heat conduction channel adjacent to the airflow intake is greater than that of the heat conduction channel adjacent to the inlet. The fan is spatially corresponding to the inlet, and assembled with the frame to form an outlet in communication with the airflow intake and the heat conduction channel through the inlet.
    Type: Grant
    Filed: November 18, 2022
    Date of Patent: April 1, 2025
    Assignee: Delta Electronics, Inc.
    Inventors: Yi-Han Wang, Chao-Fu Yang, Chih-Chung Chen, Kuo-Tung Hsu, Meng-Yu Chen
  • Patent number: 12223130
    Abstract: A touch panel and a display apparatus. The touch panel has a touch region and a fingerprint identification region and includes a first metal mesh layer, a second metal mesh layer, and a dielectric layer. The first metal mesh layer includes a plurality of touch electrodes disposed in the touch region and a plurality of fingerprint identification electrodes disposed in the fingerprint identification region. The second metal mesh layer includes a plurality of fingerprint lead wires. Each of the plurality of fingerprint lead wires is electrically connected to corresponding one of the plurality of fingerprint identification electrodes. The dielectric layer is disposed between the first metal mesh layer and the second metal mesh layer. The dielectric layer is provided with a plurality of contact holes via which the identification lead wires are electrically connected to the fingerprint identification electrodes.
    Type: Grant
    Filed: November 14, 2023
    Date of Patent: February 11, 2025
    Assignee: YUNGU (GU'AN) TECHNOLOGY CO., LTD.
    Inventors: Haofeng Zhang, Rui Guo, Meng Zhang, Ching Tung Hsu
  • Patent number: 12146502
    Abstract: An impeller and a fan are provided. The impeller includes a hub, a plurality of first blades, a plurality of second blades and a connecting member. The plurality of first blades are disposed around the hub separately. Each first blade is connected with a periphery of the hub. The plurality of second blades are disposed around the hub separately. Each second blade is disposed away from the periphery of the hub and located between two adjacent first blades of the plurality of first blades. The connecting member is disposed around the hub and penetrated through the plurality of first blades and the plurality of second blades. The connecting member is not in contact with a first edge of any side of each first blade. The connecting member is not in contact with a second edge of any side of each second blade.
    Type: Grant
    Filed: September 2, 2020
    Date of Patent: November 19, 2024
    Assignee: Delta Electronics, Inc.
    Inventors: Kuo-Tung Hsu, Shun-Chen Chang, Chao-Fu Yang, Li-Han Hung
  • Publication number: 20240377755
    Abstract: Examples of a multiple-mask multiple-exposure lithographic technique and suitable masks are provided herein. In some examples, a photomask includes a die area and a stitching region disposed adjacent to the die area and along a boundary of the photomask. The stitching region includes a mask feature for forming an integrated circuit feature and an alignment mark for in-chip overlay measurement.
    Type: Application
    Filed: July 22, 2024
    Publication date: November 14, 2024
    Inventors: Peter Yu, Chih-Tung Hsu, Kevin Wang, Chih-Chia Hu, Roger Chen
  • Publication number: 20240376907
    Abstract: A fan frame includes a housing, a shaft seat, a curved rib, a plurality of first ribs, and a plurality of second ribs. The shaft seat is disposed at the center of the housing. The curved rib is disposed between the housing and the shaft seat. The first ribs extend through the curved rib and connect the shaft seat to the housing, and the second ribs connect the curved rib to the shaft seat.
    Type: Application
    Filed: June 29, 2023
    Publication date: November 14, 2024
    Inventors: Kuo-Tung HSU, Jen-Bo HUANG, Chao-Fu YANG, Yu-Lun WENG
  • Patent number: 12140157
    Abstract: A fan frame includes a housing, a shaft seat, a curved rib, a plurality of first ribs, and a plurality of second ribs. The shaft seat is disposed at the center of the housing. The curved rib is disposed between the housing and the shaft seat. The first ribs extend through the curved rib and connect the shaft seat to the housing, and the second ribs connect the curved rib to the shaft seat.
    Type: Grant
    Filed: June 29, 2023
    Date of Patent: November 12, 2024
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Kuo-Tung Hsu, Jen-Bo Huang, Chao-Fu Yang, Yu-Lun Weng
  • Patent number: 12129864
    Abstract: An impeller is provided, including a metal housing, a shaft, and a plastic member. The metal housing has a shaft mounting hole. The inner surface of the shaft mounting hole includes three or more contact points, and the contact points are closer to the shaft than other portions of the inner surface of the shaft mounting hole. The shaft passes through the shaft mounting hole and is affixed by the contact points. The metal housing divides the shaft into an upper section, a middle section, and a lower section. The plastic member passes through the shaft mounting hole and is in contact with the middle section.
    Type: Grant
    Filed: December 13, 2023
    Date of Patent: October 29, 2024
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Wei-I Ling, Chao-Fu Yang, Chih-Chung Chen, Kuo-Tung Hsu
  • Publication number: 20240290721
    Abstract: A semiconductor structure includes a conductive line, a pad layer, and a barrier layer. The conductive line is embedded in a multi-level interconnect structure. The pad layer is over the conductive line. The barrier layer is between the conductive line and the pad layer. The pad layer is electrically connected to the conductive line through the barrier layer, and the barrier layer includes a first poly-crystalline layer and a second poly-crystalline layer. A boundary is between the first poly-crystalline layer and the second poly-crystalline layer.
    Type: Application
    Filed: April 5, 2024
    Publication date: August 29, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ya-Chin CHIU, Ming-Hsien LIN, Chia-Tung HSU, Lun-Chieh CHIU
  • Patent number: 12044977
    Abstract: Examples of a multiple-mask multiple-exposure lithographic technique and suitable masks are provided herein. In some examples, a photomask includes a die area and a stitching region disposed adjacent to the die area and along a boundary of the photomask. The stitching region includes a mask feature for forming an integrated circuit feature and an alignment mark for in-chip overlay measurement.
    Type: Grant
    Filed: July 26, 2023
    Date of Patent: July 23, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Peter Yu, Chih-Tung Hsu, Kevin Wang, Chih-Chia Hu, Roger Chen
  • Publication number: 20240164051
    Abstract: A fan module is adapted to be disposed on a mainboard. The fan module includes a base, a stator unit, a circuit board, a first restriction structure and a second restriction structure. The base includes a mounting shaft and a base opening, wherein the mounting shaft has an axis. The mounting shaft is telescoped in the stator unit. The circuit board is coupled to the stator unit, wherein the circuit board includes a circuit board connection port. The first restriction structure restricts the circuit board, wherein the first restriction structure is arranged on the first straight line, and the first restriction structure is disposed a first distance away from the axis. The second restriction structure restricts the circuit board, wherein the second restriction structure is arranged on the second straight line, the second restriction structure is disposed a second distance away from the axis.
    Type: Application
    Filed: June 12, 2023
    Publication date: May 16, 2024
    Inventors: Kuo-Tung HSU, Wen-Chun HSU, Chao-Fu YANG, Shuo-Sheng HSU
  • Patent number: 11978703
    Abstract: A semiconductor structure includes a conductive line, a pad layer, and a barrier layer. The conductive line is embedded in a multi-level interconnect structure. The pad layer is over the conductive line. The barrier layer is between the conductive line and the pad layer. The pad layer is electrically connected to the conductive line through the barrier layer, and the barrier layer includes a first poly-crystalline layer and a second poly-crystalline layer. A boundary is between the first poly-crystalline layer and the second poly-crystalline layer.
    Type: Grant
    Filed: November 17, 2022
    Date of Patent: May 7, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ya-Chin Chiu, Ming-Hsien Lin, Chia-Tung Hsu, Lun-Chieh Chiu
  • Publication number: 20240110576
    Abstract: An impeller is provided, including a metal housing, a shaft, and a plastic member. The metal housing has a shaft mounting hole. The inner surface of the shaft mounting hole includes three or more contact points, and the contact points are closer to the shaft than other portions of the inner surface of the shaft mounting hole. The shaft passes through the shaft mounting hole and is affixed by the contact points. The metal housing divides the shaft into an upper section, a middle section, and a lower section. The plastic member passes through the shaft mounting hole and is in contact with the middle section.
    Type: Application
    Filed: December 13, 2023
    Publication date: April 4, 2024
    Inventors: Wei-I LING, Chao-Fu YANG, Chih-Chung CHEN, Kuo-Tung HSU
  • Publication number: 20240077967
    Abstract: A touch panel and a display apparatus. The touch panel has a touch region and a fingerprint identification region and includes a first metal mesh layer, a second metal mesh layer, and a dielectric layer. The first metal mesh layer includes a plurality of touch electrodes disposed in the touch region and a plurality of fingerprint identification electrodes disposed in the fingerprint identification region. The second metal mesh layer includes a plurality of fingerprint lead wires. Each of the plurality of fingerprint lead wires is electrically connected to corresponding one of the plurality of fingerprint identification electrodes. The dielectric layer is disposed between the first metal mesh layer and the second metal mesh layer. The dielectric layer is provided with a plurality of contact holes via which the identification lead wires are electrically connected to the fingerprint identification electrodes.
    Type: Application
    Filed: November 14, 2023
    Publication date: March 7, 2024
    Applicant: Yungu (Gu’an) Technology Co., Ltd.
    Inventors: Haofeng ZHANG, Rui GUO, Meng ZHANG, Ching Tung HSU
  • Patent number: 11908800
    Abstract: A semiconductor structure includes a multi-level interconnect structure, a passivation layer, a barrier layer, and a pad layer. The passivation layer is above the multi-level interconnect structure. The barrier layer lines an inner sidewall of the passivation layer, a top surface of the passivation layer and a top surface of a conductive line of the multi-level interconnect structure. The barrier layer includes a first layer, a second layer, a third layer, and a fourth layer. The first layer is in a nano-crystalline phase. The second layer is above the first layer and in an amorphous phase. The third layer is above the second layer and in a polycrystalline phase. The fourth layer is above the third layer and in a nano-crystalline phase. The pad layer is above the barrier layer.
    Type: Grant
    Filed: July 22, 2022
    Date of Patent: February 20, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ya-Chin Chiu, Ming-Hsien Lin, Chia-Tung Hsu, Lun-Chieh Chiu
  • Publication number: 20240048164
    Abstract: A power amplifier includes an amplifying circuit, a feedback circuit and a grounding capacitor. The amplifier circuit includes at least a first transistor and a second transistor. A control terminal of the first transistor is configured to receive an input signal, a first terminal of the second transistor is coupled to the first transistor, and a second terminal of the second transistor is configured to generate an output signal. The feedback circuit is coupled to the control terminal of the first transistor and the second terminal of the second transistor. The ground capacitor is configured to couple the control terminal of the second transistor to ground. When a frequency of the input signal is between a first band and a second band, an amplification gain of the output signal relative to the input signal is substantially the same.
    Type: Application
    Filed: October 28, 2022
    Publication date: February 8, 2024
    Inventors: Heng-Tung HSU, Yi-Fan TSAO
  • Patent number: 11892007
    Abstract: An impeller is provided, including a metal housing, a shaft, and a plastic member. The metal housing has a shaft mounting hole. The inner surface of the shaft mounting hole includes three or more contact points, and the contact points are closer to the shaft than other portions of the inner surface of the shaft mounting hole. The shaft passes through the shaft mounting hole and is affixed by the contact points. The metal housing divides the shaft into an upper section, a middle section, and a lower section. The plastic member passes through the shaft mounting hole and is in contact with the middle section.
    Type: Grant
    Filed: March 15, 2023
    Date of Patent: February 6, 2024
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Wei-I Ling, Chao-Fu Yang, Chih-Chung Chen, Kuo-Tung Hsu
  • Publication number: 20230367229
    Abstract: Examples of a multiple-mask multiple-exposure lithographic technique and suitable masks are provided herein. In some examples, a photomask includes a die area and a stitching region disposed adjacent to the die area and along a boundary of the photomask. The stitching region includes a mask feature for forming an integrated circuit feature and an alignment mark for in-chip overlay measurement.
    Type: Application
    Filed: July 26, 2023
    Publication date: November 16, 2023
    Inventors: Peter Yu, Chih-Tung Hsu, Kevin Wang, Chih-Chia Hu, Roger Chen
  • Patent number: D1072224
    Type: Grant
    Filed: January 5, 2022
    Date of Patent: April 22, 2025
    Assignee: Delta Electronics, Inc.
    Inventors: Li-Han Hung, Kuo-Tung Hsu, Chao-Fu Yang, Jen-Bo Huang
  • Fan
    Patent number: D1073040
    Type: Grant
    Filed: September 2, 2021
    Date of Patent: April 29, 2025
    Assignee: Delta Electronics, Inc.
    Inventors: Kuo-Tung Hsu, Shun-Chen Chang, Wen-Chun Hsu, Chao-Fu Yang, Shuo-Sheng Hsu