Patents by Inventor Tyler Daigle

Tyler Daigle has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11082019
    Abstract: In a general aspect, a circuit can include an input circuit configured to receive an input signal, and an amplifier circuit coupled with the input circuit. The amplifier circuit can include an amplifier, and first and second feedback paths. The first feedback path can be from a positive output to a negative input of the amplifier, and the second feedback path can be from a negative output to a positive input of the first amplifier. The circuit can also include a loop circuit configured to provide a local feedback loop for the first amplifier and configured to control current flow into the positive input of the first amplifier and current flow into the negative input of the first amplifier. The circuit can also include a control circuit that is configured to enable the loop circuit in response to a magnitude of the input signal exceeding a threshold.
    Type: Grant
    Filed: April 8, 2020
    Date of Patent: August 3, 2021
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Tyler Daigle, Hrvoje Jasa, Andrew Jordan, Gregory Maher
  • Publication number: 20210211109
    Abstract: In a general aspect, a circuit can include an input circuit configured to receive an input signal, and an amplifier circuit coupled with the input circuit. The amplifier circuit can include an amplifier, and first and second feedback paths. The first feedback path can be from a positive output to a negative input of the amplifier, and the second feedback path can be from a negative output to a positive input of the first amplifier. The circuit can also include a loop circuit configured to provide a local feedback loop for the first amplifier and configured to control current flow into the positive input of the first amplifier and current flow into the negative input of the first amplifier. The circuit can also include a control circuit that is configured to enable the loop circuit in response to a magnitude of the input signal exceeding a threshold.
    Type: Application
    Filed: April 8, 2020
    Publication date: July 8, 2021
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Tyler DAIGLE, Hrvoje JASA, Andrew JORDAN, Gregory MAHER
  • Patent number: 10573711
    Abstract: In one general aspect, an apparatus can include a first terminal, a second terminal, and a resistive element extending between the first terminal and the second terminal. The resistive element can include a first via in contact with a first segment of a first metal layer and a first segment of a second metal layer, and can include a second via in contact with the first segment of the second metal layer and a second segment of the first metal layer. The apparatus can also include a third via in contact with the second segment of the first metal layer and a third segment of the second metal layer.
    Type: Grant
    Filed: July 13, 2017
    Date of Patent: February 25, 2020
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Tyler Daigle, Andrew Jordan, Hrvoje Jasa, Gregory Maher
  • Patent number: 10574194
    Abstract: In a general aspect, a circuit can include an amplifier circuit including a first amplifier, a first feedback path, and a second feedback path. The first feedback path can provide a feedback path from a positive output of the first amplifier to a negative input of the first amplifier. The second feedback path can provide a feedback path from a negative output of the first amplifier to a positive input of the first amplifier, The circuit can also include a loop circuit including a second amplifier, The loop circuit can be configured to provide a local feedback loop for the first amplifier and configured to control current flow into the positive input of the first amplifier and into the negative input of the first amplifier.
    Type: Grant
    Filed: July 17, 2019
    Date of Patent: February 25, 2020
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Tyler Daigle, Hrvoje Jasa, Andrew Jordan, Gregory Maher
  • Publication number: 20190372531
    Abstract: In a general aspect, a circuit can include an amplifier circuit including a first amplifier, a first feedback path, and a second feedback path. The first feedback path can provide a feedback path from a positive output of the first amplifier to a negative input of the first amplifier. The second feedback path can provide a feedback path from a negative output of the first amplifier to a positive input of the first amplifier. The circuit can also include a loop circuit including a second amplifier. The loop circuit can be configured to provide a local feedback loop for the first amplifier and configured to control current flow into the positive input of the first amplifier and into the negative input of the first amplifier.
    Type: Application
    Filed: July 17, 2019
    Publication date: December 5, 2019
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Tyler DAIGLE, Hrvoje JASA, Andrew JORDAN, Gregory MAHER
  • Patent number: 10396724
    Abstract: In a general aspect, a system can include a fully differential amplifier circuit that includes a first amplifier, and first and second feedback paths. The first feedback path can provide a feedback path from a positive output of the first amplifier to a negative input of the first amplifier. The second feedback path can provide a feedback path from a negative output of the first amplifier to a positive input of the first amplifier. The system can include a chopper clock circuit configured to output a variable duty cycle chopper clock signal. The system can include a common mode loop circuit including a second amplifier and chopper switches. The common mode loop circuit can be configured as a local feedback loop for the first amplifier. The chopper switches can be configured to receive the chopper clock signal and control current flow into the positive and negative inputs.
    Type: Grant
    Filed: May 30, 2018
    Date of Patent: August 27, 2019
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Tyler Daigle, Hrvoje Jasa, Andrew Jordan, Gregory Maher
  • Patent number: 10200054
    Abstract: In a general aspect, an apparatus can include a signal analyzer configured to analyze a signal associated with a processing pipeline, and a dynamic element matching (DEM) selection module configured to select a DEM algorithm from a plurality of DEM algorithms based on the analysis performed by the signal analyzer. The apparatus can include a set of circuit elements where each circuit element from the set of circuit elements has the same logical configuration, and a circuit element selection module configured to select a subset of the set of circuit elements based on the selected DEM algorithm.
    Type: Grant
    Filed: January 12, 2018
    Date of Patent: February 5, 2019
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Hrvoje Jasa, Tyler Daigle, Andrew Jordan, Gregory Maher
  • Publication number: 20190019859
    Abstract: In one general aspect, an apparatus can include a first terminal, a second terminal, and a resistive element extending between the first terminal and the second terminal. The resistive element can include a first via in contact with a first segment of a first metal layer and a first segment of a second metal layer, and can include a second via in contact with the first segment of the second metal layer and a second segment of the first metal layer. The apparatus can also include a third via in contact with the second segment of the first metal layer and a third segment of the second metal layer.
    Type: Application
    Filed: July 13, 2017
    Publication date: January 17, 2019
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Tyler DAIGLE, Andrew JORDAN, Hrvoje JASA, Gregory MAHER
  • Patent number: 9936317
    Abstract: Methods and apparatus for calibrating an audio system including headset coupled to an electronic device via an audio dongle. In an example, a circuit configured to couple a Universal Serial Bus (USB) audio dongle with an audio circuit of an electronic device can include a first impedance configured to couple with a first audio channel of the audio circuit, a second impedance coupled in series with the first impedance and configured to couple with a second audio channel of the audio circuit, a third impedance coupled to a ground sense channel and to a node common to the first impedance and the second impedance, and a controller configured to initiate a first signal on the first channel, to monitor crosstalk of the first signal on the second audio channel and to adjust a setting of the third impedance to reduce the crosstalk.
    Type: Grant
    Filed: October 30, 2015
    Date of Patent: April 3, 2018
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Gregory A. Maher, Tyler Daigle
  • Publication number: 20160127828
    Abstract: Methods and apparatus for calibrating an audio system including headset coupled to an electronic device via an audio dongle. In an example, a circuit configured to couple a Universal Serial Bus (USB) audio dongle with an audio circuit of an electronic device can include a first impedance configured to couple with a first audio channel of the audio circuit, a second impedance coupled in series with the first impedance and configured to couple with a second audio channel of the audio circuit, a third impedance coupled to a ground sense channel and to a node common to the first impedance and the second impedance, and a controller configured to initiate a first signal on the first channel, to monitor crosstalk of the first signal on the second audio channel and to adjust a setting of the third impedance to reduce the crosstalk.
    Type: Application
    Filed: October 30, 2015
    Publication date: May 5, 2016
    Inventors: Gregory A. Maher, Tyler Daigle
  • Patent number: 9294080
    Abstract: An apparatus comprises at least one transistor configured as analog switch, a well biasing circuit configured to provide a dynamic electrical bias to a bulk region of the at least one transistor, and a comparator circuit in electrical communication with the well biasing circuit and the transistor. The comparator circuit is configured to detect a first operating condition of the transistor and a second operating condition of the transistor. The well biasing circuit is configured to apply a first electrical bias to the bulk region of a transistor when the first operating condition is detected and apply a second electrical bias to the bulk region of the transistor when the second operating condition is detected, and wherein the comparator is configured to apply hysteresis to detection of the first and second operating conditions.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: March 22, 2016
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Tyler Daigle, Julie Lynn Stultz
  • Patent number: 9263431
    Abstract: In certain examples an integrated circuit protection circuit can include a circuit module, and an isolation device. The isolation device can be configured to couple a ground node of the circuit module to a power ground in an on state, and to isolate the ground node of the circuit module from the power ground in an off state, wherein the isolation module is configured to enter the off state when the IC receives a negative input voltage.
    Type: Grant
    Filed: April 12, 2013
    Date of Patent: February 16, 2016
    Assignee: FAIRCHILD SEMICONDUCTOR CORPORATION
    Inventors: Sam Zheng, Gary Sun, Steven M. Leibiger, Tyler Daigle, Julie Lynn Stultz
  • Patent number: 9218014
    Abstract: This application discusses apparatus and methods for reducing supply voltage induced band gap voltage variation. In an example, a method of compensating a reference voltage current source for supply voltage variation can include providing at least a portion if a reference current for establishing the reference voltage using a first output transistor coupled to the supply voltage, maintaining a constant voltage across the first output transistor using a second output transistor coupled between the first output transistor and an output node, modulating a compensation impedance between a first node and ground as the supply voltage varies, the first node located where the first output transistor is coupled to the second output transistor, and wherein the modulating includes modulating the compensation impedance to substantially equal an output impedance, the output impedance measured between an output node and an input for the supply voltage.
    Type: Grant
    Filed: October 23, 2013
    Date of Patent: December 22, 2015
    Assignee: FAIRCHILD SEMICONDUCTOR CORPORATION
    Inventor: Tyler Daigle
  • Patent number: 9148026
    Abstract: Method and apparatus, among other things, are provided for detecting a charger type. In an example, a method to classify a potential charger coupled to a port of an electronic device can include detecting the potential charger coupled to a USB-compatible port of the electronic device, applying a pull-down current to first and second data lines of the USB-compatible port to provide a first test voltage on each of the first and second data lines, and executing a primary detection process of a USB Battery Charging 1.2 Compliance Plan if the first test voltage on each of the first and second data lines is not between a first threshold and a second threshold using the pull-down current.
    Type: Grant
    Filed: September 26, 2012
    Date of Patent: September 29, 2015
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Nickole Gagne, Oscar W. Freitas, Christian Klein, Tyler Daigle, Derek Richardson
  • Patent number: 9100004
    Abstract: A buffer system is provided that reduces threshold current using a current source to provide power to one or more stages of the buffer system. The buffer system may also include delay management techniques that balances all of, or part of, a delay that may be imparted to an input signal by the current source. In addition, hysteresis techniques may be used to provide enhanced noise management of the input signal.
    Type: Grant
    Filed: November 5, 2013
    Date of Patent: August 4, 2015
    Assignee: Fairchild Semiconductor Corporation
    Inventor: Tyler Daigle
  • Patent number: 9077557
    Abstract: This application discusses methods and apparatus for a data-on-supply repeater. In an example, a repeater can include a repeater circuit configured to receive a power signal at an input and to provide a representation of a received analog data signal at an output, a direction detector configured to receive the power signal from a first bus conductor of a plurality of bus conductors, to identify the first buss conductor of the plurality of bus conductors as a transmitting conductor, and to provide an output indicative of the transmitting conductor, a first input multiplexer configured to couple the transmitting conductor to the input of the repeater circuit in response to the output of the direction detector, and an output multiplexer configured to couple the output of the repeater circuit to a second bus conductor of the plurality of bus conductors, wherein the second bus conductor is different than the transmitting conductor.
    Type: Grant
    Filed: February 13, 2013
    Date of Patent: July 7, 2015
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Gregory A. Maher, Tyler Daigle
  • Patent number: 9059692
    Abstract: An apparatus comprises an input to receive a voltage, a threshold voltage circuit, a comparison circuit, and an output. The threshold voltage circuit provides an adjustable first threshold voltage at a first output and an adjustable second threshold voltage at a second output. The comparison circuit determines when the input voltage is greater than the first voltage threshold, including when the first voltage threshold is adjusted substantially up to a high supply voltage rail, and determines when the input voltage is less than the second voltage threshold, including when the second voltage threshold is adjusted substantially down to a low supply voltage rail. The output provides a first indication when the input voltage is greater than the first voltage threshold and to provide a second indication when the input voltage is less than the second voltage threshold.
    Type: Grant
    Filed: May 31, 2011
    Date of Patent: June 16, 2015
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Tyler Daigle, Julie Lynn Stultz
  • Patent number: 8947156
    Abstract: This application discusses, among other things, apparatus and methods for driving the bulk of a high-voltage transistor using transistors having gates with low-voltage ratings. In an example, a bulk driver can include an output configured to couple to bulk of a high-voltage transistor, a pick circuit configured to couple the output to an input voltage at an input terminal of the high-voltage transistor or an output voltage at the output terminal of the high-voltage transistor when the high-voltage transistor is in a high impedance state, and a bypass circuit configured to couple the output of the bulk driver to the output voltage when the high-voltage transistor is in a low impedance state.
    Type: Grant
    Filed: November 7, 2013
    Date of Patent: February 3, 2015
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Julie Lynn Stultz, Tyler Daigle
  • Publication number: 20140323184
    Abstract: An apparatus comprises at least one transistor configured as analog switch, a well biasing circuit configured to provide a dynamic electrical bias to a bulk region of the at least one transistor, and a comparator circuit in electrical communication with the well biasing circuit and the transistor. The comparator circuit is configured to detect a first operating condition of the transistor and a second operating condition of the transistor. The well biasing circuit is configured to apply a first electrical bias to the bulk region of a transistor when the first operating condition is detected and apply a second electrical bias to the bulk region of the transistor when the second operating condition is detected, and wherein the comparator is configured to apply hysteresis to detection of the first and second operating conditions.
    Type: Application
    Filed: March 28, 2014
    Publication date: October 30, 2014
    Applicant: FAIRCHILD SEMICONDUCTOR CORPORATION
    Inventors: Tyler Daigle, Julie Lynn Stultz
  • Patent number: 8817517
    Abstract: This document discusses, among other things, a reference voltage generator circuit coupled to a plurality of fuse read circuits. The reference voltage generator circuit can be configured to mirror a reference current to produce a reference voltage and a gate bias voltage. The plurality of fuse read circuits can each be coupled to the reference voltage generator circuit and can also be coupled to a fuse of a plurality of fuses. Each fuse read circuit of the plurality of fuse read circuits can be configured to mirror the reference current using the gate bias voltage to produce a fuse read voltage across each fuse coupled to the plurality of fuse read circuits. Each fuse read circuit of the plurality of fuse read circuits can compare the fuse read voltage of each fuse and the reference voltage and can indicate a state of each fuse coupled to each fuse read circuit using the comparison.
    Type: Grant
    Filed: December 30, 2011
    Date of Patent: August 26, 2014
    Assignee: Fairchild Semiconductor Corporation
    Inventor: Tyler Daigle