Abstract: A switch controller is provided that uses one or more capacitors to generate a slow turn on/slow turn off switch control signals to suppress audible switching noise in an audio switch. In some embodiments, an analog inverter and a capacitor are used to generate the switch control signals, while in other embodiments two capacitors are used to generate the switch control signals. To conserve power between switching states, routing logic is provided that ties the switch control signals to respective voltage rails and disables selected portions of the switch controller.

Abstract: This application discusses methods and apparatus for a data-on-supply repeater. In an example, a repeater can include a repeater circuit configured to receive a power signal at an input and to provide a representation of a received analog data signal at an output, a direction detector configured to receive the power signal from a first bus conductor of a plurality of bus conductors, to identify the first buss conductor of the plurality of bus conductors as a transmitting conductor, and to provide an output indicative of the transmitting conductor, a first input multiplexer configured to couple the transmitting conductor to the input of the repeater circuit in response to the output of the direction detector, and an output multiplexer configured to couple the output of the repeater circuit to a second bus conductor of the plurality of bus conductors, wherein the second bus conductor is different than the transmitting conductor.

Abstract: This application discusses, among other things, apparatus and methods for driving the bulk of a high-voltage transistor using transistors having gates with low-voltage ratings. In an example, a bulk driver can include an output configured to couple to bulk of a high-voltage transistor, a pick circuit configured to couple the output to an input voltage at an input terminal of the high-voltage transistor or an output voltage at the output terminal of the high-voltage transistor when the high-voltage transistor is in a high impedance state, and a bypass circuit configured to couple the output of the bulk driver to the output voltage when the high-voltage transistor is in a low impedance state.

Abstract: This application discusses apparatus and methods for reducing supply voltage induced band gap voltage variation. In an example, a method of compensating a reference voltage current source for supply voltage variation can include providing at least a portion if a reference current for establishing the reference voltage using a first output transistor coupled to the supply voltage, maintaining a constant voltage across the first output transistor using a second output transistor coupled between the first output transistor and an output node, modulating a compensation impedance between a first node and ground as the supply voltage varies, the first node located where the first output transistor is coupled to the second output transistor, and wherein the modulating includes modulating the compensation impedance to substantially equal an output impedance, the output impedance measured between an output node and an input for the supply voltage.

Abstract: A buffer system is provided that reduces threshold current using a current source to provide power to one or more stages of the buffer system. The buffer system may also include delay management techniques that balances all of, or part of, a delay that may be imparted to an input signal by the current source. In addition, hysteresis techniques may be used to provide enhanced noise management of the input signal.

Abstract: This document discloses, among other things, a switch circuit that includes a depletion-mode field-effect transistor (DMFET) having an ON-state and an OFF-state, wherein the DMFET is configured to couple a first node to a second node in the ON-state, and wherein the DMFET is configured to isolate the first node from the second node in the OFF-state, a negative charge pump that is coupled to a gate terminal of the DMFET, the charge pump configured to supply a negative charge pump voltage to the gate terminal of the DMFET, and a negative discriminator coupled to the charge pump, the discriminator configured to compare a first voltage at the first node and a second voltage at the second node and determine the negative charge pump voltage based on the comparison.

Abstract: This document discusses, among other things, apparatus and methods for controlling a hysteresis range of a voltage comparator. In an example, an apparatus can include an amplifier having a temperature dependency, a comparator configured to receive first and second currents and to provide an output voltage indicative of a hysteretic comparison of the first and second input voltages, wherein a range of hysteresis of the apparatus is controlled over a range of temperatures. In an example, the amplifier can be configured to receive first and second input voltages and to provide the first and second currents.

Abstract: This document discloses, among other things, a switch circuit that includes a depletion-mode field-effect transistor (DMFET) having an ON-state and an OFF-state, wherein the DMFET is configured to couple a first node to a second node in the ON-state, and wherein the DMFET is configured to isolate the first node from the second node in the OFF-state, a negative charge pump that is coupled to a gate terminal of the DMFET, the charge pump configured to supply a negative charge pump voltage to the gate terminal of the DMFET, and a negative discriminator coupled to the charge pump, the discriminator configured to compare a first voltage at the first node and a second voltage at the second node and determine the negative charge pump voltage based on the comparison.

Abstract: In certain examples an integrated circuit protection circuit can include a circuit module, and an isolation device. The isolation device can be configured to couple a ground node of the circuit module to a power ground in an on state, and to isolate the ground node of the circuit module from the power ground in an off state, wherein the isolation module is configured to enter the off state when the IC receives a negative input voltage.

Abstract: A buffer system is provided that reduces threshold current using a current source to provide power to one or more stages of the buffer system. The buffer system may also include delay management techniques that balances all of, or part of, a delay that may be imparted to an input signal by the current source. In addition, hysteresis techniques may be used to provide enhanced noise management of the input signal.

Abstract: In one general aspect, an apparatus can include a reference oscillator counter circuit configured to produce a reference oscillator count value based on a reference oscillator signal, and a target oscillator counter circuit configured to produce a target oscillator count value based on a target oscillator signal where the target oscillator signal has a frequency targeted for calibration against a frequency of the reference oscillator signal. The apparatus can include a difference circuit configured to calculate a difference between the reference oscillator counter value and the target oscillator counter value, and a summation circuit configured to define a trim code based on only a portion of bit values from the difference.

Abstract: This document discusses, among other things, a charge pump circuit that includes an input, an output, a plurality of field effect transistors (FETs), each of the plurality FETs having a respective gate terminal, and at least two flying capacitors in electrical communication with at least one of the plurality of FETs. Each of the respective gate terminals is configured to receive a respective logic level shifted clock signal voltage. The at least two flying capacitors are configured to alternatingly charge and discharge in response to the logic level shifted clock signal voltages, and the at least two flying capacitors are configured to supply a voltage at the output that is different from a voltage at the input.

Abstract: This document discusses, among other things, a reference voltage generator circuit coupled to a plurality of fuse read circuits. The reference voltage generator circuit can be configured to mirror a reference current to produce a reference voltage and a gate bias voltage. The plurality of fuse read circuits can each be coupled to the reference voltage generator circuit and can also be coupled to a fuse of a plurality of fuses. Each fuse read circuit of the plurality of fuse read circuits can be configured to mirror the reference current using the gate bias voltage to produce a fuse read voltage across each fuse coupled to the plurality of fuse read circuits. Each fuse read circuit of the plurality of fuse read circuits can compare the fuse read voltage of each fuse and the reference voltage and can indicate a state of each fuse coupled to each fuse read circuit using the comparison.

Abstract: This document discusses, among other things, apparatus and methods for providing a power-on-reset signal. An example apparatus can include a regulator configured to receive a supply voltage and to provide a regulated voltage at an output, and a power-on-reset (POR) circuit including a POR comparator. The POR circuit can be configured to provide an indication that the regulated voltage is below a threshold level using an output of the POR comparator and to disable the POR comparator when the regulated voltage is above the threshold level.

Abstract: In one general aspect, an apparatus can include a reference oscillator counter circuit configured to produce a reference oscillator count value based on a reference oscillator signal, and a target oscillator counter circuit configured to produce a target oscillator count value based on a target oscillator signal where the target oscillator signal has a frequency targeted for calibration against a frequency of the reference oscillator signal. The apparatus can include a difference circuit configured to calculate a difference between the reference oscillator counter value and the target oscillator counter value, and a summation circuit configured to define a trim code based on only a portion of bit values from the difference.

Abstract: Method and apparatus, among other things, are provided for detecting a charger type. In an example, a method to classify a potential charger coupled to a port of an electronic device can include detecting the potential charger coupled to a USB-compatible port of the electronic device, applying a pull-down current to first and second data lines of the USB-compatible port to provide a first test voltage on each of the first and second data lines, and executing a primary detection process of a USB Battery Charging 1.2 Compliance Plan if the first test voltage on each of the first and second data lines is not between a first threshold and a second threshold using the pull-down current.

Abstract: Devices, systems and methods are provided for protecting electronic circuitry from voltage transients including undervoltage transients in a supply voltage. The device may include a first low voltage isolated transistor coupled in forward bias with respect to a power supply and a second low voltage isolated transistor coupled in series with the first low voltage isolated transistor and in reverse bias with respect to the power supply voltage. The device may further include a resistor coupled between a gate of the first low voltage isolated transistor and the power supply, the resistor configured to limit current flow to the gate of the first low voltage isolated transistor during an overvoltage event.

Abstract: An apparatus comprises an input to receive a voltage, a threshold voltage circuit, a comparison circuit, and an output. The threshold voltage circuit provides an adjustable first threshold voltage at a first output and an adjustable second threshold voltage at a second output. The comparison circuit determines when the input voltage is greater than the first voltage threshold, including when the first voltage threshold is adjusted substantially up to a high supply voltage rail, and determines when the input voltage is less than the second voltage threshold, including when the second voltage threshold is adjusted substantially down to a low supply voltage rail. The output provides a first indication when the input voltage is greater than the first voltage threshold and to provide a second indication when the input voltage is less than the second voltage threshold.

Abstract: A switch controller is provided that uses one or more capacitors to generate a slow turn on/slow turn off switch control signals to suppress audible switching noise in an audio switch. In some embodiments, an analog inverter and a capacitor are used to generate the switch control signals, while in other embodiments two capacitors are used to generate the switch control signals. To conserve power between switching states, routing logic is provided that ties the switch control signals to respective voltage rails and disables selected portions of the switch controller.

Abstract: A buffer system is provided that reduces threshold current using a current source to provide power to one or more stages of the buffer system. The buffer system may also include delay management techniques that balances all of, or part of, a delay that may be imparted to an input signal by the current source. In addition, hysteresis techniques may be used to provide enhanced noise management of the input signal.