Patents by Inventor Tzu-Chieh Lin

Tzu-Chieh Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250013020
    Abstract: An imaging lens sequentially includes a prism, a first lens element, a second lens element, a third lens element, a fourth lens element, and a fifth lens element from an object side to an image side along an optical axis. The prism has a light incident surface. The light incident surface includes at least one phase delay structure being a circle and including a circle center and microstructures. Diopters of the first to fifth lens elements are respectively negative, negative, positive, positive, and negative. A spacing between two adjacent microstructures in a radial direction of the circle is the same. The first to fifth lens elements are aspheric lens elements. The imaging lens satisfies 3.86<TL/ImgH<9.8, where TL is a distance from an object side surface of the first lens element to an image plane on the optical axis, and ImgH is half of a diagonal of the image plane.
    Type: Application
    Filed: April 26, 2024
    Publication date: January 9, 2025
    Applicant: GUANGZHOU LUXVISIONS INNOVATION TECHNOLOGY LIMITED
    Inventors: Tzu-Yao Lin, Shih-Chieh Yen
  • Publication number: 20240421267
    Abstract: A display device includes a light-emitting substrate, a counter substrate, multiple color conversion layers, a low-refractive-index layer, and multiple patterned Fabry-Perot filter layers. The light-emitting substrate is used to emit a light. The counter substrate is disposed opposite to the light-emitting substrate. The color conversion layers are disposed between the light-emitting substrate and the counter substrate. The low-refractive-index layer is disposed between the counter substrate and the color conversion layers. The refractive index of the low-refractive-index layer is less than or equal to that of the color conversion layers. The patterned Fabry-Perot filter layers are disposed between the low-refractive-index layer and the color conversion layers. Each of the patterned Fabry-Perot filter layers has multiple through-holes and includes two reflective layers and a spacer layer between the two reflective layers.
    Type: Application
    Filed: December 19, 2023
    Publication date: December 19, 2024
    Inventors: Tzu-Chieh LIN, Chun-Liang LIN
  • Patent number: 12169340
    Abstract: An electronic device is provided. The electronic device includes a first panel. The first panel includes a first substrate, a second substrate, a liquid crystal layer, a first transparent electrode, a second transparent electrode, and a first signal line. The second substrate is opposite to the first substrate. The liquid crystal layer is disposed between the first substrate and the second substrate. The first transparent electrode is disposed between the first substrate and the liquid crystal layer. The second transparent electrode is disposed between the second substrate and the liquid crystal layer. The first signal line is electrically connected to the first transparent electrode and extending along a first direction. The impedance of the first signal line is less than the impedance of the first transparent electrode.
    Type: Grant
    Filed: February 3, 2023
    Date of Patent: December 17, 2024
    Assignee: INNOLUX CORPORATION
    Inventors: Ting-Wei Liang, Jiunn-Shyong Lin, I-An Yao, Tzu-Chieh Lai, Chung-Chun Cheng, Shih-Che Chen
  • Publication number: 20240413278
    Abstract: A display device includes a light-emitting substrate, a counter substrate, multiple color conversion layers and, a patterned distributed Bragg reflector. The counter substrate is disposed opposite to the light-emitting substrate, and has multiple sub-pixel regions. Each of the sub-pixel regions has a sub-pixel width. The color conversion layers are disposed between the light-emitting substrate and the counter substrate. The patterned distributed Bragg reflector is disposed on one side of the color conversion layers, and has multiple openings. Each of the openings has an opening width greater than or equal to 1 ?m and less than the sub-pixel width.
    Type: Application
    Filed: December 19, 2023
    Publication date: December 12, 2024
    Inventors: Tzu-Chieh LIN, Chun-Liang LIN
  • Publication number: 20240371649
    Abstract: A method of forming a semiconductor device includes forming a first epitaxial layer over a substrate to form a wafer, depositing a dielectric layer over the first epitaxial layer, patterning the dielectric layer to form an opening, etching the first epitaxial layer through the opening to form a recess, forming a second epitaxial layer in the recess, etching the dielectric layer to expose a top surface of the first epitaxial layer, and planarizing the exposed top surface of the first epitaxial layer and a top surface of the second epitaxial layer.
    Type: Application
    Filed: July 17, 2024
    Publication date: November 7, 2024
    Inventors: Che-Lun Chang, Pin-Chuan Su, Hsin-Chieh Huang, Ming-Yuan Wu, Tzu kai Lin, Yu-Wen Wang, Che-Yuan Hsu
  • Patent number: 12131911
    Abstract: A method of forming a semiconductor device includes forming a first epitaxial layer over a substrate to form a wafer, depositing a dielectric layer over the first epitaxial layer, patterning the dielectric layer to form an opening, etching the first epitaxial layer through the opening to form a recess, forming a second epitaxial layer in the recess, etching the dielectric layer to expose a top surface of the first epitaxial layer, and planarizing the exposed top surface of the first epitaxial layer and a top surface of the second epitaxial layer.
    Type: Grant
    Filed: June 20, 2022
    Date of Patent: October 29, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Che-Lun Chang, Pin-Chuan Su, Hsin-Chieh Huang, Ming-Yuan Wu, Tzu kai Lin, Yu-Wen Wang, Che-Yuan Hsu
  • Publication number: 20240345367
    Abstract: An optical photographing lens assembly includes seven lens elements which are, in order from an object side to an image side along an optical path, a first lens element through a seventh lens element. Each of the seven lens elements has an object-side surface facing toward the object side and an image-side surface facing toward the image side. The object-side surface of the second lens element is convex in a paraxial region thereof. The sixth lens element has positive refractive power. The object-side surface of the seventh lens element is convex in a paraxial region thereof. At least one of the object-side surface and the image-side surface of at least one of the seven lens elements has at least one inflection point in an off-axis region thereof.
    Type: Application
    Filed: June 7, 2023
    Publication date: October 17, 2024
    Applicant: LARGAN PRECISION CO., LTD.
    Inventors: Yu Jui LIN, Tzu-Chieh KUO
  • Publication number: 20240332420
    Abstract: A method includes forming a gate stack for a short-channel device and a longer-channel device; forming a first metal cap layer over the gate stacks for the short-channel device and the longer-channel device, wherein the first metal cap layer of the longer-channel device has a metal-cap recess; forming a first dielectric cap layer in the metal-cap recess; selectively removing in parallel, a portion of the gate stacks and first metal cap layer for the short-channel device and the longer-channel device; forming a first channel recess between spacers in the short-channel device and a second channel recess between a spacer and the first dielectric cap layer in the longer-channel device by the selectively removing; wherein each of the first channel recess and the second channel recess has a width dimension and a difference between the width dimensions of the first channel recess and second channel recess is less than 3 nm.
    Type: Application
    Filed: March 29, 2023
    Publication date: October 3, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Chieh CHAO, Ryan Chia-Jen CHEN, Yih-Ann LIN, Yu-Hsien LIN, Li-Wei YIN, Tzu-Wen PAN, Jih-Sheng YANG
  • Publication number: 20240329459
    Abstract: An electronic device includes: a light modulation medium layer including a liquid crystal material and a dye material; a reflective element disposed opposite to the light modulation medium layer and away from a display side of the electronic device; a reflective polarizing element disposed between the light modulation medium layer and the reflective element; and a polarizer disposed between the reflective polarizing element and the reflective element, wherein the reflective element has a reflectance of light with wavelengths ranging from 380 nm to 780 nm greater than or equal to 80%.
    Type: Application
    Filed: March 7, 2024
    Publication date: October 3, 2024
    Inventors: Chih-Chin KUO, Hsu-Kuan HSU, Tzu-Chieh LAI, Mao-Shiang LIN
  • Publication number: 20240321739
    Abstract: Provided are structures and methods for forming structures with surfaces having a W-shaped profile. An exemplary method includes differentially etching a gate material to a recessed surface including a first and second horn and a valley located therebetween including first and second sections and a middle section therebetween; depositing an etch-retarding layer over the recessed surface including first and second edge regions and a central region therebetween, wherein the first edge region is located over the first horn and the first section, the second edge region is located over the second horn and the second section, the central region is located over the middle region, and the central region is thicker than the first edge region and the second edge region; and performing an etch process to recess the horns to establish the gate material with a W-shaped profile.
    Type: Application
    Filed: March 24, 2023
    Publication date: September 26, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jih-Sheng Yang, Li-Wei Yin, Yu-Hsien Lin, Tzu-Wen Pan, Shih-Chieh Chao, Chia Ming Liang, Yih-Ann Lin, Ryan Chia-Jen Chen
  • Publication number: 20240321765
    Abstract: A package structure including a first semiconductor die, a second semiconductor die, first conductive pillars and a first insulating encapsulation is provided. The first semiconductor die includes a semiconductor substrate, an interconnect structure and a first redistribution circuit structure. The semiconductor substrate includes a first portion and a second portion disposed on the first portion. The interconnect structure is disposed on the second portion, the first redistribution circuit structure is disposed on the interconnect structure, and the lateral dimension of the first portion is greater than the lateral dimension of the second portion. The second semiconductor die is disposed on the first semiconductor die. The first conductive pillars are disposed on the first redistribution circuit structure of the first semiconductor die. The first insulating encapsulation is disposed on the first portion.
    Type: Application
    Filed: June 6, 2024
    Publication date: September 26, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tzu-Sung Huang, Cheng-Chieh Hsieh, Hsiu-Jen Lin, Hui-Jung Tsai, Hung-Yi Kuo, Hao-Yi Tsai, Ming-Hung Tseng, Yen-Liang Lin, Chun-Ti Lu, Chung-Ming Weng
  • Publication number: 20240300211
    Abstract: A laminated composite component is provided in this disclosure. The laminated composite component comprises a foam material layer, a first laminated sheet group and a second laminated sheet group. The foam material layer has a first surface and a second surface opposite to each other. The first laminated sheet group is disposed on the first surface. The second laminated sheet group is disposed on the second surface. The first laminated sheet group includes a plurality of first sheets. The second laminated sheet group includes a plurality of second sheets. The foam material layer, the first sheets of the first laminated sheet group, and the second sheets of the second laminated sheet group are laminated and pressed to form in one piece.
    Type: Application
    Filed: February 20, 2024
    Publication date: September 12, 2024
    Applicant: Acer Incorporated
    Inventors: Dong-Sheng WU, Tzu-Wei LIN, Chih-Chun LIU, Cheng-Nan LING, Wen-Chieh TAI
  • Publication number: 20240272469
    Abstract: An electronic device includes a scattering structure, a dimming structure and a controller. The dimming structure is arranged on the scattering structure. The controller is electrically connected to the dimming structure. The controller includes a first control unit, and the first control unit is provided to adjust the transmittance of the dimming structure.
    Type: Application
    Filed: January 16, 2024
    Publication date: August 15, 2024
    Inventors: En-Hsiang CHEN, Chih-Chin KUO, Mao-Shiang LIN, Hsu-Kuan HSU, WenQi LIN, Tzu-Chieh LAI
  • Publication number: 20240249983
    Abstract: A light-emitting device includes a substrate, a light-emitting diode, a first layer, a color filter layer, and a second layer. The light-emitting diode is disposed on the substrate. The first layer is disposed on the substrate and has an opening. At least a portion of the light-emitting diode is disposed in the opening of the first layer. The color filter layer is disposed on the light-emitting diode. The second layer is disposed on the first layer and has an opening overlapped with the opening of the first layer. The second layer is configured to shield light emitted from the light-emitting diode. In the cross-sectional view of the light-emitting device, the minimum width of the opening of the first layer is less than the minimum width of the opening of the second layer.
    Type: Application
    Filed: April 2, 2024
    Publication date: July 25, 2024
    Inventors: Tung-Kai LIU, Tsau-Hua HSIEH, Wei-Cheng CHU, Chun-Hsien LIN, Chandra LIUS, Ting-Kai HUNG, Kuan-Feng LEE, Ming-Chang LIN, Tzu-Min YAN, Hui-Chieh WANG
  • Publication number: 20240248351
    Abstract: An electronic device includes: a panel, including: a first substrate; a second substrate disposed opposite to the first substrate; a light modulation layer disposed between the first substrate and the second substrate; a plurality of first strip electrodes disposed between the first substrate and the light modulation layer; a plurality of second strip electrodes disposed between the second substrate and the light modulation layer; a first electrode disposed between the first substrate and the plurality of first strip electrodes; and a second electrode disposed between the second substrate and the plurality of second strip electrodes, wherein the light modulation layer includes a liquid crystal material and a dye material, and an extension direction of the plurality of first strip electrodes is different from an extension direction of the plurality of second strip electrodes.
    Type: Application
    Filed: January 10, 2024
    Publication date: July 25, 2024
    Inventors: Hsu-Kuan HSU, Tzu-Chieh LAI, Chih-Chin KUO, En-Hsiang CHEN, Wen-Qi LIN
  • Patent number: 12046217
    Abstract: Embodiments of the disclosure provide a color correction method and a color correction device. The method includes: obtaining native gamma information and native color point information of a display; obtaining target gamma information and target color point information of a target color space; obtaining a gamma correction parameter associated with the display based on the native gamma information and the target gamma information; determining a first pseudo gamma parameter based on the target gamma information; determining a second pseudo gamma parameter based on an inverse gamma operation of the target gamma information; determining a pseudo color space conversion matrix based on the native color point information and the target color point information; and updating a 3D lookup table of the display based on the first pseudo gamma parameter, the pseudo color space conversion matrix, and the second pseudo gamma parameter in sequence.
    Type: Grant
    Filed: October 20, 2022
    Date of Patent: July 23, 2024
    Assignee: Acer Incorporated
    Inventors: Tzu-Chieh Lin, Chen-Kang Su
  • Patent number: 12040283
    Abstract: A package structure including a first semiconductor die, a second semiconductor die, first conductive pillars and a first insulating encapsulation is provided. The first semiconductor die includes a semiconductor substrate, an interconnect structure and a first redistribution circuit structure. The semiconductor substrate includes a first portion and a second portion disposed on the first portion. The interconnect structure is disposed on the second portion, the first redistribution circuit structure is disposed on the interconnect structure, and the lateral dimension of the first portion is greater than the lateral dimension of the second portion. The second semiconductor die is disposed on the first semiconductor die. The first conductive pillars are disposed on the first redistribution circuit structure of the first semiconductor die. The first insulating encapsulation is disposed on the first portion.
    Type: Grant
    Filed: April 19, 2023
    Date of Patent: July 16, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tzu-Sung Huang, Cheng-Chieh Hsieh, Hsiu-Jen Lin, Hui-Jung Tsai, Hung-Yi Kuo, Hao-Yi Tsai, Ming-Hung Tseng, Yen-Liang Lin, Chun-Ti Lu, Chung-Ming Weng
  • Publication number: 20240013750
    Abstract: Embodiments of the disclosure provide a color correction method and a color correction device. The method includes: obtaining native gamma information and native color point information of a display; obtaining target gamma information and target color point information of a target color space; obtaining a gamma correction parameter associated with the display based on the native gamma information and the target gamma information; determining a first pseudo gamma parameter based on the target gamma information; determining a second pseudo gamma parameter based on an inverse gamma operation of the target gamma information; determining a pseudo color space conversion matrix based on the native color point information and the target color point information; and updating a 3D lookup table of the display based on the first pseudo gamma parameter, the pseudo color space conversion matrix, and the second pseudo gamma parameter in sequence.
    Type: Application
    Filed: October 20, 2022
    Publication date: January 11, 2024
    Applicant: Acer Incorporated
    Inventors: Tzu-Chieh Lin, Chen-Kang Su
  • Patent number: 11579795
    Abstract: A control method for a solid state drive is provided. The solid state drive includes a non-volatile memory with plural blocks. In a step (a1), a block is opened. In a step (a2), a program action is performed to store a valid write data into the open block. Then, a step (a3) is performed to judge whether an amount of the valid write data in the open block reaches a predetermined capacity. In a step (a4), if the amount of the valid write data in the open block does not reach the predetermined capacity, the step (a2) is performed again. In a step (a5), if the amount of the valid write data in the open block reaches the predetermined capacity, the open block is closed and the step (a1) is performed again. The predetermined capacity is lower than a capacity of one block.
    Type: Grant
    Filed: March 8, 2021
    Date of Patent: February 14, 2023
    Assignee: SOLID STATE STORAGE TECHNOLOGY CORPORATION
    Inventors: Shih-Hung Hsieh, Hsuan-Yi Chiang, Shi-Xuan Chen, Tzu-Chieh Lin
  • Publication number: 20220236906
    Abstract: A control method for a solid state drive is provided. The solid state drive includes a non-volatile memory with plural blocks. In a step (a1), a block is opened. In a step (a2), a program action is performed to store a valid write data into the open block. Then, a step (a3) is performed to judge whether an amount of the valid write data in the open block reaches a predetermined capacity. In a step (a4), if the amount of the valid write data in the open block does not reach the predetermined capacity, the step (a2) is performed again. In a step (a5), if the amount of the valid write data in the open block reaches the predetermined capacity, the open block is closed and the step (a1) is performed again. The predetermined capacity is lower than a capacity of one block.
    Type: Application
    Filed: March 8, 2021
    Publication date: July 28, 2022
    Inventors: Shih-Hung HSIEH, Hsuan-Yi CHIANG, Shi-Xuan CHEN, Tzu-Chieh LIN