Patents by Inventor Tzu-Hsiang HSU
Tzu-Hsiang HSU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10483396Abstract: An embodiment is a semiconductor structure. The semiconductor structure includes a substrate. A fin is on the substrate. The fin includes silicon germanium. An interfacial layer is over the fin. The interfacial layer has a thickness in a range from greater than 0 nm to about 4 nm. A source/drain region is over the interfacial layer. The source/drain region includes silicon germanium.Type: GrantFiled: June 11, 2018Date of Patent: November 19, 2019Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Yun Chin, Chii-Horng Li, Chien-Wei Lee, Hsueh-Chang Sung, Heng-Wen Ting, Roger Tai, Pei-Ren Jeng, Tzu-Hsiang Hsu, Yen-Ru Lee, Yan-Ting Lin, Davie Liu
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Publication number: 20190304984Abstract: A semiconductor device includes a layer having a semiconductive material. The layer includes an outwardly-protruding fin structure. An isolation structure is disposed over the layer but not over the fin structure. A first spacer and a second spacer are each disposed over the isolation structure and on sidewalls of the fin structure. The first spacer is disposed on a first sidewall of the fin structure. The second spacer is disposed on a second sidewall of the fin structure opposite the first sidewall. The second spacer is substantially taller than the first spacer. An epi-layer is grown on the fin structure. The epi-layer protrudes laterally. A lateral protrusion of the epi-layer is asymmetrical with respect to the first side and the second side.Type: ApplicationFiled: March 30, 2018Publication date: October 3, 2019Inventors: Chun Po Chang, Chen-Ming Lee, Fu-Kai Yang, Mei-Yun Wang, Wei-Yang Lee, Tzu-Hsiang Hsu
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Publication number: 20190123200Abstract: A semiconductor structure includes a first region. The first region includes at least three first gate structures separate one from another and adjacent to each other and at least three second gate structures separate one from another and adjacent to each other. The first gate structures are further away from each other than the second gate structures. The first region further includes first epitaxial semiconductor features proximate the first gate structures and second epitaxial semiconductor features proximate the second gate structures. A first distance from the first epitaxial semiconductor features to the respective first gate structures is smaller than a second distance from the second epitaxial semiconductor features to the respective second gate structures.Type: ApplicationFiled: December 12, 2018Publication date: April 25, 2019Inventors: Wei-Yang Lee, Tzu-Hsiang Hsu, Ting-Yeh Chen, Feng-Cheng Yang
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Patent number: 10269935Abstract: A semiconductor device includes a first fin structure for a first fin field effect transistor (PET). The first fin structure includes a first base layer protruding from a substrate, a first intermediate layer disposed over the first base layer and a first channel layer disposed over the first intermediate layer. The first fin structure further includes a first protective layer made of a material that prevents an underlying layer from oxidation. The first channel layer is made of SiGe, the first intermediate layer includes a first semiconductor (e.g., SiGe) layer disposed over the first base layer and a second semiconductor layer (e.g., Si) disposed over the first semiconductor layer. The first protective layer covers side walls of the first base layer, side walls of the first semiconductor layer and side walls of the second semiconductor layer.Type: GrantFiled: August 31, 2017Date of Patent: April 23, 2019Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Gin-Chen Huang, Tzu-Hsiang Hsu, Chia-Jung Hsu, Feng-Cheng Yang, Teng-Chun Tsai
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Patent number: 10164097Abstract: A semiconductor device includes a substrate, at least one first isolation structure, at least two second isolation structures, and a plurality of epitaxy structures. The substrate has a plurality of semiconductor fins therein. The first isolation structure is disposed between the semiconductor fins. The semiconductor fins are disposed between the second isolation structures, and the second isolation structures extend into the substrate further than the first isolation structure. The epitaxy structures are respectively disposed on the semiconductor fins. The epitaxy structures are separated from each other, and at least one of the epitaxy structures has a substantially round profile.Type: GrantFiled: September 11, 2015Date of Patent: December 25, 2018Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yen-Ru Lee, Chii-Horng Li, Heng-Wen Ting, Tzu-Hsiang Hsu, Chih-Yun Chin
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Patent number: 10158017Abstract: A semiconductor structure includes a substrate, first gate structures and second gate structures over the substrate, third epitaxial semiconductor features proximate the first gate structures, and fourth epitaxial semiconductor features proximate the second gate structures. The first gate structures have a greater pitch than the second gate structures. The third and fourth epitaxial semiconductor features are at least partially embedded in the substrate. A first proximity of the third epitaxial semiconductor features to the respective first gate structures is smaller than a second proximity of the fourth epitaxial semiconductor features to the respective second gate structures. In an embodiment, a first depth of the third epitaxial semiconductor features embedded into the substrate is greater than a second depth of the fourth epitaxial semiconductor features embedded into the substrate.Type: GrantFiled: August 23, 2017Date of Patent: December 18, 2018Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Wei-Yang Lee, Tzu-Hsiang Hsu, Ting-Yeh Chen, Feng-Cheng Yang
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Patent number: 10068992Abstract: A semiconductor device includes a fin structure for a fin field effect transistor (FET). The fin structure includes a base layer protruding from a substrate, an intermediate layer disposed over the base layer and an upper layer disposed over the intermediate layer. The fin structure further includes a first protective layer and a second protective layer made of a different material than the first protective layer. The intermediate layer includes a first semiconductor layer disposed over the base layer, the first protective layer covers at least side walls of the first semiconductor layer and the second protective layer covers at least side walls of the first protective layer.Type: GrantFiled: May 9, 2017Date of Patent: September 4, 2018Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Hung Lo, Tzu-Hsiang Hsu, Chia-Jung Hsu, Feng-Cheng Yang, Teng-Chun Tsai, Ying-Ho Chen
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Patent number: 9882029Abstract: A semiconductor device includes a first fin structure for a first fin field effect transistor (FET). The first fin structure includes a first base layer protruding from a substrate, a first intermediate layer disposed over the first base layer and a first channel layer disposed over the first intermediate layer. The first fin structure further includes a first protective layer made of a material that prevents an underlying layer from oxidation. The first channel layer is made of SiGe, the first intermediate layer includes a first semiconductor (e.g., SiGe) layer disposed over the first base layer and a second semiconductor layer (e.g., Si) disposed over the first semiconductor layer. The first protective layer covers side walls of the first base layer, side walls of the first semiconductor layer and side walls of the second semiconductor layer.Type: GrantFiled: July 12, 2016Date of Patent: January 30, 2018Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Gin-Chen Huang, Tzu-Hsiang Hsu, Chia-Jung Hsu, Feng-Cheng Yang, Teng-Chun Tsai
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Publication number: 20170373189Abstract: A semiconductor structure includes a substrate, first gate structures and second gate structures over the substrate, third epitaxial semiconductor features proximate the first gate structures, and fourth epitaxial semiconductor features proximate the second gate structures. The first gate structures have a greater pitch than the second gate structures. The third and fourth epitaxial semiconductor features are at least partially embedded in the substrate. A first proximity of the third epitaxial semiconductor features to the respective first gate structures is smaller than a second proximity of the fourth epitaxial semiconductor features to the respective second gate structures. In an embodiment, a first depth of the third epitaxial semiconductor features embedded into the substrate is greater than a second depth of the fourth epitaxial semiconductor features embedded into the substrate.Type: ApplicationFiled: August 23, 2017Publication date: December 28, 2017Inventors: Wei-Yang Lee, Tzu-Hsiang Hsu, Ting-Yeh Chen, Feng-Cheng Yang
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Publication number: 20170365707Abstract: A semiconductor device includes a first fin structure for a first fin field effect transistor (PET). The first fin structure includes a first base layer protruding from a substrate, a first intermediate layer disposed over the first base layer and a first channel layer disposed over the first intermediate layer. The first fin structure further includes a first protective layer made of a material that prevents an underlying layer from oxidation. The first channel layer is made of SiGe, the first intermediate layer includes a first semiconductor (e.g., SiGe) layer disposed over the first base layer and a second semiconductor layer (e.g., Si) disposed over the first semiconductor layer. The first protective layer covers side walls of the first base layer, side walls of the first semiconductor layer and side walls of the second semiconductor layer.Type: ApplicationFiled: August 31, 2017Publication date: December 21, 2017Inventors: Gin-Chen HUANG, Tzu-Hsiang HSU, Chia-Jung HSU, Feng-Cheng YANG, Teng-Chun TSAI
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Patent number: 9780214Abstract: A semiconductor device includes a first fin structure for a first fin field effect transistor (FET). The first fin structure includes a first base layer protruding from a substrate, a first intermediate layer disposed over the first base layer and a first channel layer disposed over the first intermediate layer. The first fin structure further includes a first protective layer made of a material that prevents an underlying layer from oxidation. The first channel layer is made of SiGe, the first intermediate layer includes a first semiconductor (e.g., SiGe) layer disposed over the first base layer and a second semiconductor layer (e.g., Si) disposed over the first semiconductor layer. The first protective layer covers side walls of the first base layer, side walls of the first semiconductor layer and side walls of the second semiconductor layer.Type: GrantFiled: December 22, 2014Date of Patent: October 3, 2017Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Gin-Chen Huang, Tzu-Hsiang Hsu, Chia-Jung Hsu, Feng-Cheng Yang, Teng-Chun Tsai
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Patent number: 9748389Abstract: A method includes receiving a precursor having a substrate and first and second pluralities of gate structures, the first pluralities having a greater pitch than the second pluralities. The method further includes depositing a dielectric layer covering the substrate and the first and second pluralities; and performing an etching process to the dielectric layer. The etching process removes a first portion of the dielectric layer over the substrate, while a second portion of the dielectric layer remains over sidewalls of the first and second pluralities. The second portion of the dielectric layer is thicker over the sidewalls of the second plurality than over the sidewalls of the first plurality. The method further includes etching the substrate to form third and fourth pluralities of recesses adjacent the first and second pluralities, respectively; and epitaxially growing fifth and sixth pluralities of semiconductor features in the third and fourth pluralities, respectively.Type: GrantFiled: June 21, 2016Date of Patent: August 29, 2017Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Wei-Yang Lee, Tzu-Hsiang Hsu, Ting-Yeh Chen, Feng-Cheng Yang
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Publication number: 20170243957Abstract: A semiconductor device includes a fin structure for a fin field effect transistor (FET). The fin structure includes a base layer protruding from a substrate, an intermediate layer disposed over the base layer and an upper layer disposed over the intermediate layer. The fin structure further includes a first protective layer and a second protective layer made of a different material than the first protective layer. The intermediate layer includes a first semiconductor layer disposed over the base layer, the first protective layer covers at least side walls of the first semiconductor layer and the second protective layer covers at least side walls of the first protective layer.Type: ApplicationFiled: May 9, 2017Publication date: August 24, 2017Inventors: Hung LO, Tzu-Hsiang HSU, Chia-Jung HSU, Feng-Cheng YANG, Teng-Chun TSAI, Ying-Ho CHEN
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Patent number: 9680017Abstract: A semiconductor device includes a fin structure for a fin field effect transistor (FET). The fin structure includes a base layer protruding from a substrate, an intermediate layer disposed over the base layer and an upper layer disposed over the intermediate layer. The fin structure further includes a first protective layer and a second protective layer made of a different material than the first protective layer. The intermediate layer includes a first semiconductor layer disposed over the base layer, the first protective layer covers at least side walls of the first semiconductor layer and the second protective layer covers at least side walls of the first protective layer.Type: GrantFiled: September 16, 2015Date of Patent: June 13, 2017Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Hung Lo, Chia-Jung Hsu, Teng-Chun Tsai, Tzu-Hsiang Hsu, Feng-Cheng Yang, Ying-Ho Chen
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Publication number: 20170077286Abstract: A semiconductor device includes a fin structure for a fin field effect transistor (FET). The fin structure includes a base layer protruding from a substrate, an intermediate layer disposed over the base layer and an upper layer disposed over the intermediate layer. The fin structure further includes a first protective layer and a second protective layer made of a different material than the first protective layer. The intermediate layer includes a first semiconductor layer disposed over the base layer, the first protective layer covers at least side walls of the first semiconductor layer and the second protective layer covers at least side walls of the first protective layer.Type: ApplicationFiled: September 16, 2015Publication date: March 16, 2017Inventors: Hung LO, Chia-Jung HSU, Teng-Chun TSAI, Tzu-Hsiang HSU, Feng-Cheng YANG
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Publication number: 20170077300Abstract: A semiconductor device includes a substrate, at least one first isolation structure, at least two second isolation structures, and a plurality of epitaxy structures. The substrate has a plurality of semiconductor fins therein. The first isolation structure is disposed between the semiconductor fins. The semiconductor fins are disposed between the second isolation structures, and the second isolation structures extend into the substrate further than the first isolation structure. The epitaxy structures are respectively disposed on the semiconductor fins. The epitaxy structures are separated from each other, and at least one of the epitaxy structures has a substantially round profile.Type: ApplicationFiled: September 11, 2015Publication date: March 16, 2017Inventors: Yen-Ru LEE, Chii-Horng LI, Heng-Wen TING, Tzu-Hsiang HSU, Chih-Yun CHIN
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Publication number: 20160322477Abstract: A semiconductor device includes a first fin structure for a first fin field effect transistor (FET). The first fin structure includes a first base layer protruding from a substrate, a first intermediate layer disposed over the first base layer and a first channel layer disposed over the first intermediate layer. The first fin structure further includes a first protective layer made of a material that prevents an underlying layer from oxidation. The first channel layer is made of SiGe, the first intermediate layer includes a first semiconductor (e.g., SiGe) layer disposed over the first base layer and a second semiconductor layer (e.g., Si) disposed over the first semiconductor layer. The first protective layer covers side walls of the first base layer, side walls of the first semiconductor layer and side walls of the second semiconductor layer.Type: ApplicationFiled: July 12, 2016Publication date: November 3, 2016Inventors: Gin-Chen HUANG, Tzu-Hsiang HSU, Chia-Jung HSU, Feng-Cheng YANG, Teng-Chun TSAI
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Publication number: 20160181414Abstract: A semiconductor device includes a first fin structure for a first fin field effect transistor (FET). The first fin structure includes a first base layer protruding from a substrate, a first intermediate layer disposed over the first base layer and a first channel layer disposed over the first intermediate layer. The first fin structure further includes a first protective layer made of a material that prevents an underlying layer from oxidation. The first channel layer is made of SiGe, the first intermediate layer includes a first semiconductor (e.g., SiGe) layer disposed over the first base layer and a second semiconductor layer (e.g., Si) disposed over the first semiconductor layer. The first protective layer covers side walls of the first base layer, side walls of the first semiconductor layer and side walls of the second semiconductor layer.Type: ApplicationFiled: December 22, 2014Publication date: June 23, 2016Inventors: Gin-Chen HUANG, Tzu-Hsiang HSU, Chia-Jung HSU, Feng-Cheng YANG, Teng-Chun TSAI