Patents by Inventor Tzu-Jui WANG

Tzu-Jui WANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240014244
    Abstract: The present disclosure relates to an image sensor including a first semiconductor layer having a first doping type. A second semiconductor layer having the first doping type is between sidewalls of the first semiconductor layer and extends vertically along the sidewalls of the first semiconductor layer from a bottom side of the first semiconductor layer toward a top side of the first semiconductor layer. A first doped region having the first doping type is in the first semiconductor layer and laterally beside the second semiconductor layer. The first doped region extends vertically along a sidewall of the second semiconductor layer. A second doped region having a second doping type is in the first semiconductor layer and laterally beside the first doped region. The second doped region extends vertically along a side of the first doped region and forms a p-n junction with the first doped region.
    Type: Application
    Filed: July 5, 2022
    Publication date: January 11, 2024
    Inventors: Kuo-Chin Huang, Tzu-Jui Wang
  • Publication number: 20240014245
    Abstract: Various embodiments of the present disclosure are directed towards an image sensor. The image sensor includes a first chip bonded to a second chip. The first chip includes a semiconductor substrate. The first chip includes a first transistor cell and a second transistor cell. The second transistor cell is laterally spaced from the first transistor cell. A first through-substrate via (TSV) extends vertically through the semiconductor substrate. The first transistor cell is electrically coupled to the first TSV. A second TSV extends vertically through the first semiconductor substrate. The second transistor cell is electrically coupled to the second TSV. The second chip comprises a first readout circuit that is electrically coupled to the first TSV and the second TSV. The first readout circuit is disposed laterally between the first TSV and the second TSV. The first readout circuit is configured to receive a first signal from the first transistor cell.
    Type: Application
    Filed: January 4, 2023
    Publication date: January 11, 2024
    Inventors: Chi-Hsien Chung, Tzu-Jui Wang, Shang-Fu Yeh, Tzu-Hsuan Hsu, Chen-Jong Wang, Dun-Nian Yaung
  • Publication number: 20230411431
    Abstract: Various embodiments of the present disclosure are directed towards a stacked complementary metal-oxide semiconductor (CMOS) image sensor with a high full well capacity (FWC). A first integrated circuit (IC) chip and a second IC chip are stacked with each other. The first IC chip comprises a first semiconductor substrate, and the second IC chip comprises a second semiconductor substrate. A pixel sensor is in and spans the first and second IC chips. The pixel sensor comprises a transfer transistor and a pinned photodiode adjoining the transfer transistor at the first semiconductor substrate, and further comprises a plurality of additional transistors (e.g., a reset transistor, a source-follower transistor, etc.) at the second semiconductor substrate. A bulk of the first semiconductor substrate and a bulk of the second semiconductor substrate are electrically isolated from each other and are configured to be biased with different voltages (e.g., a negative voltage and ground).
    Type: Application
    Filed: August 15, 2022
    Publication date: December 21, 2023
    Inventors: Chi-Hsien Chung, Tzu-Jui Wang, Chen-Jong Wang, Tzu-Hsuan Hsu, Dun-Nian Yaung
  • Patent number: 11837613
    Abstract: A photovoltaic cell includes a germanium-containing well embedded in a single crystalline silicon substrate and extending to a proximal horizontal surface of the single crystalline silicon substrate, wherein germanium-containing well includes germanium at an atomic percentage greater than 50%. A silicon-containing capping structure is located on a top surface of the germanium-containing well and includes silicon at an atomic percentage greater than 42%. The silicon-containing capping structure prevents oxidation of the germanium-containing well. A photovoltaic junction may be formed within, or across, the trench by implanting dopants of a first conductivity type and dopants of a second conductivity type.
    Type: Grant
    Filed: April 12, 2021
    Date of Patent: December 5, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Jyh-Ming Hung, Tzu-Jui Wang, Kuan-Chieh Huang, Jhy-Jyi Sze
  • Publication number: 20230369360
    Abstract: A photovoltaic cell includes a germanium-containing well embedded in a single crystalline silicon substrate and extending to a proximal horizontal surface of the single crystalline silicon substrate, wherein germanium-containing well includes germanium at an atomic percentage greater than 50%. A silicon-containing capping structure is located on a top surface of the germanium-containing well and includes silicon at an atomic percentage greater than 42%. The silicon-containing capping structure prevents oxidation of the germanium-containing well. A photovoltaic junction may be formed within, or across, the trench by implanting dopants of a first conductivity type and dopants of a second conductivity type.
    Type: Application
    Filed: July 25, 2023
    Publication date: November 16, 2023
    Inventors: Jyh-Ming Hung, Tzu-Jui WANG, Kuan-Chieh HUANG, Jhy-Jyi SZE
  • Publication number: 20230335572
    Abstract: The present disclosure, in some embodiments, relates to an image sensor integrated chip. The image sensor integrated chip includes a semiconductor substrate having sidewalls that form one or more trenches. The one or more trenches are disposed along opposing sides of a photodiode and vertically extend from an upper surface of the semiconductor substrate to within the semiconductor substrate. A doped region is arranged along the upper surface of the semiconductor substrate and along opposing sides of the photodiode. A first dielectric lines the sidewalls of the semiconductor substrate and the upper surface of the semiconductor substrate. A second dielectric lines sidewalls and an upper surface of the first dielectric. The doped region has a width laterally between a side of the photodiode and a side of the first dielectric. The width of the doped region varyies at different heights along the side of the photodiode.
    Type: Application
    Filed: June 16, 2023
    Publication date: October 19, 2023
    Inventors: Chun-Yuan Chen, Ching-Chun Wang, Dun-Nian Yaung, Hsiao-Hui Tseng, Jhy-Jyi Sze, Shyh-Fann Ting, Tzu-Jui Wang, Yen-Ting Chiang, Yu-Jen Wang, Yuichiro Yamashita
  • Publication number: 20230317760
    Abstract: An image sensor structure that further includes a first substrate having a front side and a back side; a photodetector disposed on the front side of the first substrate and spanning a dimension Dp along a first direction; a gate electrode formed on the front side of the first substrate and partially overlapping the photodetector; a doped region as a floating diffusion region formed on the front side of the first substrate and disposed next to the photodetector; and an interconnect structure disposed on the front surface of the first substrate and overlying the gate electrode. The interconnect structure includes a second metal layer over a first metal layer, the second metal layer further includes a first and second metal features distanced a distance Ds along the first direction, the first metal feature is electrically connected to the doped feature, and a first ratio Ds/Dp is greater than 0.3.
    Type: Application
    Filed: August 2, 2022
    Publication date: October 5, 2023
    Inventors: Hao-Lin Yang, Ching-Chun Wang, Tzu-Jui Wang, Chen-Jong Wang, Dun-Nian Yaung
  • Publication number: 20230299109
    Abstract: A semiconductor device includes a first chip comprising a plurality of photo-sensitive devices, wherein the plurality of photo-sensitive devices are formed as a first array. The semiconductor device includes a second chip bonded to the first chip and comprising: a plurality of groups of pixel transistors, wherein the plurality of groups of pixel transistors are formed as a second array; and a plurality of input/output transistors, wherein the plurality of input/output transistors are disposed outside the second array. The semiconductor device includes a third chip bonded to the second chip and comprising a plurality of logic transistors.
    Type: Application
    Filed: June 27, 2022
    Publication date: September 21, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chi-Hsien Chung, Tzu-Jui Wang, Chen-Jong Wang, Tzu-Hsuan Hsu, Dun-Nian Yaung, Calvin Yi-Ping Chao
  • Publication number: 20230290672
    Abstract: In some embodiments, the present disclosure relates to an image sensor. The image sensor comprises a substrate. A photodetector is in the substrate and includes a semiconductor guard ring extending into a first side of the substrate. A shallow trench isolation (STI) structure extends into the first side of the substrate. An outer isolation structure extends into a second side of the substrate, opposite the first side of the substrate, to the STI structure. The STI structure and the outer isolation structure laterally surround the photodetector. An inner isolation structure extends into the second side of the substrate and overlies the photodetector. The inner isolation structure is vertically separated from the photodetector by the substrate. Further, the outer isolation structure laterally surrounds the inner isolation structure.
    Type: Application
    Filed: May 19, 2023
    Publication date: September 14, 2023
    Inventors: Cheng-Hsien Chou, Sheng-Chau Chen, Tzu-Jui Wang, Sheng-Chan Li
  • Publication number: 20230261021
    Abstract: Various embodiments of the present disclosure are directed towards an image sensor. The image sensor includes a deep trench isolation (DTI) structure disposed in a substrate. A pixel region of the substrate is disposed within an inner perimeter of the DTI structure. A photodetector is disposed in the pixel region of the substrate. A gate electrode structure overlies, at least partially, the pixel region of the substrate. A first gate dielectric structure partially overlies the pixel region of the substrate. A second gate dielectric structure partially overlies the pixel region of the substrate. The gate electrode structure overlies both a portion of the first gate dielectric structure and a portion of the second gate dielectric structure. The first gate dielectric structure has a first thickness. The second gate dielectric structure has a second thickness that is greater than the first thickness.
    Type: Application
    Filed: May 23, 2022
    Publication date: August 17, 2023
    Inventors: Tzu-Jui Wang, Dun-Nian Yaung, Chen-Jong Wang, Ming-Chieh Hsu, Wei-Cheng Hsu, Yuichiro Yamashita
  • Patent number: 11728366
    Abstract: The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip includes an image sensor disposed within a substrate. The substrate has sidewalls and a horizontally extending surface defining one or more trenches extending from a first surface of the substrate to within the substrate. One or more isolation structures are arranged within the one or more trenches. A doped region is arranged within the substrate laterally between sidewalls of the one or more isolation structures and the image sensor and vertically between the image sensor and the first surface of the substrate. The doped region has a higher concentration of a first dopant type than an abutting part of the substrate that extends along opposing sides of the image sensor.
    Type: Grant
    Filed: November 5, 2021
    Date of Patent: August 15, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Yuan Chen, Ching-Chun Wang, Dun-Nian Yaung, Hsiao-Hui Tseng, Jhy-Jyi Sze, Shyh-Fann Ting, Tzu-Jui Wang, Yen-Ting Chiang, Yu-Jen Wang, Yuichiro Yamashita
  • Patent number: 11705360
    Abstract: In some embodiments, the present disclosure relates to an image sensor. The image sensor comprises a substrate. A photodetector is in the substrate and includes a semiconductor guard ring extending into a first side of the substrate. A shallow trench isolation (STI) structure extends into the first side of the substrate. An outer isolation structure extends into a second side of the substrate, opposite the first side of the substrate, to the STI structure. The STI structure and the outer isolation structure laterally surround the photodetector. An inner isolation structure extends into the second side of the substrate and overlies the photodetector. The inner isolation structure is vertically separated from the photodetector by the substrate. Further, the outer isolation structure laterally surrounds the inner isolation structure.
    Type: Grant
    Filed: March 10, 2021
    Date of Patent: July 18, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Hsien Chou, Sheng-Chau Chen, Tzu-Jui Wang, Sheng-Chan Li
  • Publication number: 20230207719
    Abstract: In some embodiments, the present disclosure relates to a single-photon avalanche detector (SPAD) device including a silicon substrate including a recess in an upper surface of the silicon substrate. A p-type region is arranged in the silicon substrate below a lower surface of the recess. An n-type avalanche region is arranged in the silicon substrate below the p-type region and meets the p-type region at a p-n junction. A germanium region is disposed within the recess over the p-n junction.
    Type: Application
    Filed: May 20, 2022
    Publication date: June 29, 2023
    Inventors: Hung-Chang Chien, Jung-I Lin, Ming-Chieh Hsu, Kuan-Chieh Huang, Tzu-Jui Wang, Shih-Min Huang, Chen-Jong Wang, Dun-Nian Yaung, Yi-Shin Chu, Hsiang-Lin Chen
  • Publication number: 20220406823
    Abstract: The present disclosure relates to an image sensor including a pixel along a substrate. The pixel includes a first semiconductor region having a first doping type. A second semiconductor region is directly over the first semiconductor region. The second semiconductor region has a second doping type opposite the first doping type and meets the first semiconductor region at a p-n junction. A ring-shaped third semiconductor region laterally surrounds the first and second semiconductor regions. The ring-shaped third semiconductor region has the first doping type. A ring-shaped fourth semiconductor region laterally surrounds the ring-shaped third semiconductor region. The ring-shaped fourth semiconductor region has the second doping type. A ring-shaped fifth semiconductor region is directly over the ring-shaped third semiconductor region and has the second doping type.
    Type: Application
    Filed: June 16, 2021
    Publication date: December 22, 2022
    Inventors: Tzu-Jui Wang, Yuichiro Yamashita
  • Publication number: 20220293457
    Abstract: In some embodiments, the present disclosure relates to an image sensor. The image sensor comprises a substrate. A photodetector is in the substrate and includes a semiconductor guard ring extending into a first side of the substrate. A shallow trench isolation (STI) structure extends into the first side of the substrate. An outer isolation structure extends into a second side of the substrate, opposite the first side of the substrate, to the STI structure. The STI structure and the outer isolation structure laterally surround the photodetector. An inner isolation structure extends into the second side of the substrate and overlies the photodetector. The inner isolation structure is vertically separated from the photodetector by the substrate. Further, the outer isolation structure laterally surrounds the inner isolation structure.
    Type: Application
    Filed: March 10, 2021
    Publication date: September 15, 2022
    Inventors: Cheng-Hsien Chou, Sheng-Chau Chen, Tzu-Jui Wang, Sheng-Chan Li
  • Publication number: 20220278161
    Abstract: The present disclosure describes a semiconductor device that includes a first die bonded to a second die with interconnect structures in the first die. The first die includes a photodiode having first and second electrodes on a first side of a first dielectric layer, and first, second, and third interconnect structures in the first dielectric layer. The first and second interconnect structures are connected to the first and second electrodes, respectively. The second electrode has a polarity opposite to the first electrode. The second and third interconnect structures extend to a second side opposite to the first side of the first dielectric layer. The second die includes a second dielectric layer and a fourth interconnect structure in the second dielectric layer. The second dielectric layer is bonded to the second side of the first dielectric layer. The fourth interconnect structure connects the second and third interconnect structures.
    Type: Application
    Filed: December 30, 2021
    Publication date: September 1, 2022
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Kuo-Chin HUANG, Tzu-Jui WANG, Hua-Mao CHEN, Chin-Chia KUO, Yuichiro YAMASHITA
  • Patent number: 11264525
    Abstract: A single photon avalanche diode (SPAT) image sensor is disclosed. The SPAT) image sensor include: a substrate of a first conductivity type, the substrate having a front surface and a back surface; a deep trench isolation (DTI) extending from the front surface toward the back surface of the substrate, the DTI having a first surface and a second surface opposite to the first surface, the first surface being level with the front surface of the substrate; an epitaxial layer of a second conductivity type opposite to the first conductivity type, the epitaxial layer surrounding sidewalls and the second surface of the DTI; and an implant region of the first conductivity type extending from the front surface to the back surface of the substrate. An associated method for fabricating the SPAD image sensor is also disclosed.
    Type: Grant
    Filed: May 21, 2020
    Date of Patent: March 1, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Tzu-Jui Wang, Jhy-Jyi Sze, Yuichiro Yamashita, Kuo-Chin Huang
  • Publication number: 20220059583
    Abstract: The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip includes an image sensor disposed within a substrate. The substrate has sidewalls and a horizontally extending surface defining one or more trenches extending from a first surface of the substrate to within the substrate. One or more isolation structures are arranged within the one or more trenches. A doped region is arranged within the substrate laterally between sidewalls of the one or more isolation structures and the image sensor and vertically between the image sensor and the first surface of the substrate. The doped region has a higher concentration of a first dopant type than an abutting part of the substrate that extends along opposing sides of the image sensor.
    Type: Application
    Filed: November 5, 2021
    Publication date: February 24, 2022
    Inventors: Chun-Yuan Chen, Ching-Chun Wang, Dun-Nian Yaung, Hsiao-Hui Tseng, Jhy-Jyi Sze, Shyh-Fann Ting, Tzu-Jui Wang, Yen-Ting Chiang, Yu-Jen Wang, Yuichiro Yamashita
  • Patent number: 11227889
    Abstract: The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip includes an image sensing element disposed within a semiconductor substrate. One or more isolation structures are arranged within one or more trenches disposed along a first surface of the semiconductor substrate. The one or more isolation structures are separated from opposing sides of the image sensing element by non-zero distances. The one or more trenches are defined by sidewalls and a horizontally extending surface of the semiconductor substrate. A doped region is laterally arranged between the sidewalls of the semiconductor substrate defining the one or more trenches and is vertically arranged between the image sensing element and the first surface of the semiconductor substrate.
    Type: Grant
    Filed: November 5, 2019
    Date of Patent: January 18, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Yuan Chen, Ching-Chun Wang, Dun-Nian Yaung, Hsiao-Hui Tseng, Jhy-Jyi Sze, Shyh-Fann Ting, Tzu-Jui Wang, Yen-Ting Chiang, Yu-Jen Wang, Yuichiro Yamashita
  • Publication number: 20210375959
    Abstract: A photovoltaic cell includes a germanium-containing well embedded in a single crystalline silicon substrate and extending to a proximal horizontal surface of the single crystalline silicon substrate, wherein germanium-containing well includes germanium at an atomic percentage greater than 50%. A silicon-containing capping structure is located on a top surface of the germanium-containing well and includes silicon at an atomic percentage greater than 42%. The silicon-containing capping structure prevents oxidation of the germanium-containing well. A photovoltaic junction may be formed within, or across, the trench by implanting dopants of a first conductivity type and dopants of a second conductivity type.
    Type: Application
    Filed: April 12, 2021
    Publication date: December 2, 2021
    Inventors: Jyh-Ming HUNG, Tzu-Jui WANG, Kuan-Chieh HUANG, Jhy-Jyi SZE