Abstract: The present invention provides an LED light device, including: a heat sink having a layered structure formed by a plurality of tubes; and a sub-mount positioned on the heat sink and mounted with an LED emitter.

Abstract: The invention provides a method for fabricating a camera module. An exemplary embodiment of the method for fabricating a camera module comprises providing plurality of lens sets. A dry film layer is formed on the plurality of lens sets. The dry film layer is patterned to form a plurality of dry film patterns respectively attaching to a plurality of lens sets. The plurality of lens sets are separated. A lens set separated from the plurality of lens sets is bonded to an image sensor device chip. The dry film pattern on the lens set is removed.

Abstract: The invention provides a method for fabricating a camera module. An exemplary embodiment of the method for fabricating a camera module comprises providing plurality of lens sets. A dry film layer is formed on the plurality of lens sets. The dry film layer is patterned to form a plurality of dry film patterns respectively attaching to a plurality of lens sets. The plurality of lens sets are separated. A lens set separated from the plurality of lens sets is bonded to an image sensor device chip. The dry film pattern on the lens set is removed.

Abstract: Light emitting devices conformally covered by a luminescent material layer are presented. A light emitting device includes a semiconductor light emitting die attached to a substrate. At least one bond pad is disposed on the semiconductor light emitting die. A luminescent material layer conformally covers the semiconductor light emitting die, wherein the luminescent material layer has at least one opening corresponding to and exposing the at least one bond pad. At least one wirebond is electrically connected to the at least one bond pad and a contact pad on the substrate.

Abstract: The invention provides a solar package structure and a method for fabricating the same. A solar package structure includes a carrier wafer. A conductive pattern layer is disposed on the carrier wafer. A solar cell chip array is disposed on the conductive pattern layer, wherein the solar cell chip array electrically connects to the conductive pattern layer. A first spacer dam is disposed on the carrier wafer, surrounding the solar cell chip array. A first optical element array is disposed over the carrier wafer to concentrate sunbeams onto the solar cell chip array, wherein the first optical element array is spaced apart from the carrier wafer by the first spacer dam.

Abstract: A camera module is disclosed. The camera module includes an imager sensor device comprising a microlens array. A lens set overlies the imager sensor device. A dry film type photoresist spacer is interposed between the imager sensor device and the lens set, wherein the dry film type photoresist spacer has an opening above the microlens array. A fabrication method of the camera module is also disclosed.

Abstract: According to embodiments of the invention, a lens assembly and method for forming the same is provided. The method includes providing a first lens layer having a first transparent substrate and a first lens on the first transparent substrate, providing a second lens layer having a second transparent substrate and a second lens on the second transparent substrate, forming a spacer structure between the first lens layer and the second lens layer, and thinning the first transparent substrate to a first thickness after the spacer is formed.

Abstract: A semiconductor device is disclosed. The semiconductor device comprises a light-emitting diode chip disposed in a cavity of a semiconductor substrate. At least two isolated outer wiring layers are disposed on the bottom surface of the semiconductor substrate and are electrically connected to the light-emitting diode chip, serving as input terminals. A lens module is adhered to the top surface of the semiconductor substrate to cap the cavity, in which the lens module comprises a molded lens and a transparent conductive layer coated with a fluorescent material under the molded lens. A method for fabricating the semiconductor devices is also disclosed.

Abstract: A light-emitting diode (LED) device is disclosed. The LED device includes a semiconductor substrate with a planar top surface, a light-emitting diode (LED) chip disposed over the top surface of the semiconductor substrate, at least two isolated outer wiring layers formed through the semiconductor substrate and electrically connected to the light-emitting diode chip, serving as input terminals, a transparent encapsulating layer with a substantially planar top surface formed over the semiconductor substrate, capping the LED chip and the at least two isolated outer wiring layers, and a lens module adhered to the substantially planar top surface of the transparent encapsulating layer to cap the light-emitting diode chip. In one embodiment, the lens module includes a fluorescent layer and a lens covering or covered by the fluorescent layer.

Abstract: According to embodiments of the invention, a lens assembly and method for forming the same is provided. The method includes providing a first lens layer having a first transparent substrate and a first lens on the first transparent substrate, providing a second lens layer having a second transparent substrate and a second lens on the second transparent substrate, forming a spacer structure between the first lens layer and the second lens layer, and thinning the first transparent substrate to a first thickness after the spacer is formed.

Abstract: An optoelectronic device chip, and a method for making the chip, are disclosed. The chip comprises a device substrate, an optically transparent upper substrate, and a composite spacer layer which includes an adhesive material and a plurality of particles dispersed in said adhesive material. The distance between the device substrate and the upper substrate is controlled by the thickness of the composite spacer layer so that the variation is within the depth of focus of optical system.

Abstract: Isolation structure for CMOS image sensor device chip scale packages and fabrication methods thereof. A CMOS image sensor chip scale package includes a transparent substrate configured as a support structure for the package. The transparent substrate includes a first cutting edge and a second cutting edge. A CMOS image sensor die with a die circuitry is mounted on the transparent substrate. An encapsulant is disposed on the substrate encapsulating the CMOS image sensor die. A connection extends from the die circuitry to a plurality of terminal contacts for the package on the encapsulant, wherein the connection is exposed by the first cutting edge. An isolation structure is disposed on the first cutting edge passivating the exposed connection and co-planed with the second cutting edge.

Abstract: Light emitting devices conformally covered by a luminescent material layer are presented. A light emitting device includes a semiconductor light emitting die attached to a substrate. At least one bond pad is disposed on the semiconductor light emitting die. A luminescent material layer conformally covers the semiconductor light emitting die, wherein the luminescent material layer has at least one opening corresponding to and exposing the at least one bond pad. At least one wirebond is electrically connected to the at least one bond pad and a contact pad on the substrate.

Abstract: A light-emitting diode (LED) device is disclosed. The LED device includes a semiconductor substrate with a planar top surface, a light-emitting diode (LED) chip disposed over the top surface of the semiconductor substrate, at least two isolated outer wiring layers formed through the semiconductor substrate and electrically connected to the light-emitting diode chip, serving as input terminals, a transparent encapsulating layer with a substantially planar top surface formed over the semiconductor substrate, capping the LED chip and the at least two isolated outer wiring layers, and a lens module adhered to the substantially planar top surface of the transparent encapsulating layer to cap the light-emitting diode chip. In one embodiment, the lens module includes a fluorescent layer and a lens covering or covered by the fluorescent layer.

Abstract: A semiconductor device is disclosed. The semiconductor device comprises a light-emitting diode chip disposed in a cavity of a semiconductor substrate. At least two isolated outer wiring layers are disposed on the bottom surface of the semiconductor substrate and are electrically connected to the light-emitting diode chip, serving as input terminals. A lens module is adhered to the top surface of the semiconductor substrate to cap the cavity, in which the lens module comprises a molded lens and a transparent conductive layer coated with a fluorescent material under the molded lens. A method for fabricating the semiconductor devices is also disclosed.

Abstract: Isolation structure for CMOS image sensor device chip scale packages and fabrication methods thereof. A CMOS image sensor chip scale package includes a transparent substrate configured as a support structure for the package. The transparent substrate includes a first cutting edge and a second cutting edge. A CMOS image sensor die with a die circuitry is mounted on the transparent substrate. An encapsulant is disposed on the substrate encapsulating the CMOS image sensor die. A connection extends from the die circuitry to a plurality of terminal contacts for the package on the encapsulant, wherein the connection is exposed by the first cutting edge. An isolation structure is disposed on the first cutting edge passivating the exposed connection and co-planed with the second cutting edge.

Abstract: Isolation structure for CMOS image sensor device chip scale packages and fabrication methods thereof. A CMOS image sensor chip scale package includes a transparent substrate configured as a support structure for the package. The transparent substrate includes a first cutting edge and a second cutting edge. A CMOS image sensor die with a die circuitry is mounted on the transparent substrate. An encapsulant is disposed on the substrate encapsulating the CMOS image sensor die. A connection extends from the die circuitry to a plurality of terminal contacts for the package on the encapsulant, wherein the connection is exposed by the first cutting edge. An isolation structure is disposed on the first cutting edge passivating the exposed connection and co-planed with the second cutting edge.

Abstract: An optoelectronic device chip, and a method for making the chip, are disclosed. The chip comprises a device substrate, an optically transparent upper substrate, and a composite spacer layer which includes an adhesive material and a plurality of particles dispersed in said adhesive material. The distance between the device substrate and the upper substrate is controlled by the thickness of the composite spacer layer so that the variation is within the depth of focus of optical system.

Abstract: An optoelectronic device chip, and a method for making the chip, are disclosed. The chip comprises a device substrate, an optically transparent upper substrate, and a composite spacer layer which includes an adhesive material and a plurality of particles dispersed in said adhesive material. The distance between the device substrate and the upper substrate is controlled by the thickness of the composite spacer layer so that the variation is within the depth of focus of optical system.

Abstract: Isolation structure for CMOS image sensor device chip scale packages and fabrication methods thereof. A CMOS image sensor chip scale package includes a transparent substrate configured as a support structure for the package. The transparent substrate includes a first cutting edge and a second cutting edge. A CMOS image sensor die with a die circuitry is mounted on the transparent substrate. An encapsulant is disposed on the substrate encapsulating the CMOS image sensor die. A connection extends from the die circuitry to a plurality of terminal contacts for the package on the encapsulant, wherein the connection is exposed by the first cutting edge. An isolation structure is disposed on the first cutting edge passivating the exposed connection and co-planed with the second cutting edge.