Patents by Inventor Uk Jang

Uk Jang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11670716
    Abstract: A semiconductor device includes an active region extending in a first direction on a substrate, channel layers on the active region and spaced apart vertically, a gate structure intersecting the active region and the channel layers, the gate structure extending in a second direction and surrounding the channel layers, and a source/drain region on the active region at a side of the gate structure, the source/drain region contacting the channel layers, the source/drain region including first epitaxial layers having a first composition and including first layers on side surfaces of the channel layers and a second layer on the active region at a lower end of the source/drain region, and a second epitaxial layer having a second composition different from the first composition, the second epitaxial layer being between the first epitaxial layers in the first direction and being between the first epitaxial layers vertically in a third direction.
    Type: Grant
    Filed: June 3, 2021
    Date of Patent: June 6, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sung Uk Jang, Young Dae Cho, Ki Hwan Kim, Su Jin Jung
  • Publication number: 20230116342
    Abstract: A semiconductor device is provided. A semiconductor device includes: a first active pattern spaced apart from a substrate and extending in a first direction; a second active pattern spaced apart further from the substrate than the first active pattern and extending in the first direction; a gate structure on the substrate, the gate structure extending in a second direction crossing the first direction and penetrating the first active pattern and the second active pattern; a first source/drain region on at least one side surface of the gate structure and connected to the first active pattern; a second source/drain region on at least one side surface of the gate structure and connected to the second active pattern; and a buffer layer between the substrate and the first active pattern, the buffer layer containing germanium.
    Type: Application
    Filed: June 1, 2022
    Publication date: April 13, 2023
    Inventors: Won Hee Choi, Sung Uk Jang, Dong Suk Shin, Bong Jin Kuh, Kong Soo Lee
  • Publication number: 20230105044
    Abstract: Provided are a multi-channel isothermal amplification system and an operation method. The operation method comprises: a first step in which sample tubes are disposed in holes formed in a line in a heating block, respectively, wherein the heating block comprises: a first heating block area in which some of the plurality of holes are formed in a line; and a second heating block area in which the rest of the plurality of holes are formed in a line, and which is disposed to be in a line with the first heating block area, wherein the first heating block area and the second heating block area are spaced apart from each other at an interval as much as one hole area between two holes; and a second step in which an optical system moves in a longitudinal direction of the first heating block area and the second heating block area.
    Type: Application
    Filed: August 8, 2022
    Publication date: April 6, 2023
    Inventors: Soo Kyung KIM, Cha Ryong KOO, Dong Hoon NAM, Dong Chul LEE, Seong Uk JANG, Do Hyun JEONG
  • Patent number: 11594598
    Abstract: A semiconductor device including an active region defined in a substrate; at least one channel layer on the active region; a gate electrode intersecting the active region and on the active region and surrounding the at least one channel layer; and a pair of source/drain regions adjacent to both sides of the gate electrode, on the active region, and in contact with the at least one channel layer, wherein the pair of source/drain regions includes a selective epitaxial growth (SEG) layer, and a maximum width of each of the pair of source/drain regions in a first direction is 1.3 times or less a width of the active region in the first direction.
    Type: Grant
    Filed: December 9, 2021
    Date of Patent: February 28, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sung Uk Jang, Seung Hun Lee, Su Jin Jung, Young Dae Cho
  • Publication number: 20230025048
    Abstract: A battery cell, a battery pack and an electronic device with improved durability by reducing bend-induced damage, whereby a battery cell includes at least two battery units, each including a plurality of electrode leads, an electrode assembly, an electrolyte solution and an inner pouch in which the electrode assembly and the electrolyte solution are received, wherein at least one of the plurality of electrode leads of one battery unit is inserted into the other battery unit and electrically connected to the electrode assembly, and an outer pouch including at least two receiving portions in which the at least two battery units are received respectively, and a bending portion in which a part of the plurality of electrode leads is disposed and a part between the at least two receiving portions is bent.
    Type: Application
    Filed: May 27, 2021
    Publication date: January 26, 2023
    Applicant: LG ENERGY SOLUTION, LTD.
    Inventor: Ji-Uk JANG
  • Publication number: 20220415733
    Abstract: In one example, an electronic device comprises a cavity substrate comprising a substrate base comprising a top side and a bottom side and a cavity wall over the substrate base and defining a cavity, an electronic component over the substrate base and in the cavity, a lid comprising a top side and a bottom side, wherein the lid is over the substrate base and the cavity wall to define an interior of the cavity and an exterior of the cavity, an adhesive between the bottom side of the lid and a top side of the cavity wall, and a vent seal between the interior of the cavity and the exterior of the cavity. Other examples and related methods are also disclosed herein.
    Type: Application
    Filed: June 29, 2021
    Publication date: December 29, 2022
    Applicant: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Kwang Seok Oh, Chang Uk Jang, Jin Seok Ryu, Seung Jae Yu, Weilung Lu, Adrian Arcedera, Seung Mo Kim, Kyung Han Ryu, Yi Seul Han, Woo Jun Kim, Tae Yong Lee
  • Patent number: 11511725
    Abstract: The present disclosure provides a system and a method for correcting a friction coefficient of a brake pad for a vehicle, which can estimate a brake factor including a friction coefficient of a brake pad, and ultimately correct the brake factor through the calculation and the update of a brake factor offset based on the estimated brake factor, thereby enhancing the braking linearity of an electric brake system.
    Type: Grant
    Filed: November 6, 2019
    Date of Patent: November 29, 2022
    Assignees: Hyundai Motor Company, Kia Motors Corporation
    Inventors: Sang Hyup Lee, Dong Hoon Kang, Hyeong Uk Jang
  • Publication number: 20220213247
    Abstract: Disclosed is a method for producing a diene-based graft copolymer resin, and a diene-based graft copolymer resin produced therefrom, the method including: adding, into a reactor, a polymerization solution containing a diene-based rubber polymer, an aromatic vinyl-based monomer, a vinyl cyan-based monomer, a polymerization initiator, and a reaction solvent, and polymerizing the polymerization solution to prepare a polymer; recovering a solution containing unreacted monomers and a reaction solvent from the polymerization solution, dispersing a releasing agent in the recovered solution, and then adding the solution into the front end of a volatilization tank; and removing the unreacted monomers and the reaction solvent from the volatilization tank.
    Type: Application
    Filed: October 7, 2020
    Publication date: July 7, 2022
    Applicant: LG CHEM, LTD.
    Inventors: Ji Uk JANG, Dae Woo LEE, Jae Bum SEO, Jung Tae PARK, Gyu Sun KIM
  • Patent number: 11367381
    Abstract: An electroluminescent display device has a plurality of pixels and each pixel includes a driving transistor having a gate connected to a first node, a source connected to a third node, and a drain connected to a fourth node, the driving transistor generating pixel current corresponding to a data voltage when a high-level source voltage is applied to the third node, an internal compensator comprising a first capacitor connected between the first node and a second node, and a second capacitor connected between the second node and an input terminal for the high-level source voltage, the internal compensator controlling a threshold voltage of the driving transistor with reference to a first scan signal, a second scan signal opposite to the first scan signal in phase, a third scan signal lagging the first scan signal in phase, a fourth scan signal leading the first scan signal in phase, and an emission signal, and a light emitting element connected between a fifth node to be connected to the fourth node and an inp
    Type: Grant
    Filed: December 28, 2020
    Date of Patent: June 21, 2022
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Young-Sung Cho, Chui Nam, Byeong-Seong So, Hyung-Uk Jang
  • Publication number: 20220181459
    Abstract: An integrated circuit device includes a substrate having source and drain recesses therein that are lined with respective silicon-germanium liners and filled with doped semiconductor source and drain regions. A stacked plurality of semiconductor channel layers are provided, which are separated vertically from each other within the substrate by corresponding buried insulated gate electrode regions that extend laterally between the silicon-germanium liners. An insulated gate electrode is provided on an uppermost one of the plurality of semiconductor channel layers. The silicon-germanium liners may be doped with carbon.
    Type: Application
    Filed: July 22, 2021
    Publication date: June 9, 2022
    Inventors: Young Dae Cho, Ki Hwan Kim, Sung Uk Jang, Su Jin Jung
  • Publication number: 20220181499
    Abstract: A semiconductor device is provided. The semiconductor comprises an active pattern including a lower pattern and a plurality of sheet patterns that are spaced apart from the lower pattern in a first direction, a source/drain pattern on the lower pattern and in contact with the plurality of sheet patterns, and a gate structure on opposing sides of the source/drain pattern in a second direction different from the first direction, the gate structure including a gate electrode on the plurality of sheet patterns, wherein the source/drain pattern includes an epitaxial region that comprises a semiconductor material and a cavity region that is inside the epitaxial region and that is surrounded by the semiconductor material.
    Type: Application
    Filed: August 10, 2021
    Publication date: June 9, 2022
    Inventors: Su Jin Jung, Ki Hwan Kim, Sung Uk Jang, Young Dae Cho
  • Publication number: 20220157990
    Abstract: A semiconductor device including an active region extending in a first direction on a substrate; a gate structure intersecting the active region and extending in a second direction on the substrate; and a source/drain region on the active region and at least one side of the gate structure, wherein the source/drain region includes a plurality of first epitaxial layers spaced apart from each other in the first direction, the plurality of first epitaxial layers including first impurities of a first conductivity type; and a second epitaxial layer filling a space between the plurality of first epitaxial layers, the second epitaxial layer including second impurities of the first conductivity type.
    Type: Application
    Filed: January 28, 2022
    Publication date: May 19, 2022
    Inventors: Sung Uk JANG, Ki Hwan KIM, Su Jin JUNG, Bong Soo KIM, Young Dae CHO
  • Patent number: 11332568
    Abstract: Provided are a method for preparing a graft copolymer and a graft copolymer prepared thereby, the method comprising: preparing a reaction solution comprising a copolymer comprising a unit derived from a diene-based monomer and a unit derived from an alkene-based monomer, an aromatic vinyl-based monomer, a vinyl cyan-based monomer, and a reaction solvent; and adding the reaction solution to perform primary bulk polymerization at 100 to 110° C., wherein the copolymer comprises the unit derived from a diene-based monomer in an amount of 5 to 10 wt %, and the graft copolymer has an average rubber particle size of 2 to 5?m.
    Type: Grant
    Filed: October 26, 2018
    Date of Patent: May 17, 2022
    Assignee: LG CHEM, LTD.
    Inventors: Jae Bum Seo, Dae Woo Lee, Jung Tae Park, Gyu Sun Kim, Ji Uk Jang
  • Publication number: 20220135725
    Abstract: The present invention relates to a method for producing a diene-based graft copolymer resin, and a diene-based graft copolymer resin produced therefrom, the method including: mixing an aromatic vinyl-based monomer, a diene-based rubber polymer, and a polymerization initiator to prepare a first reactant; mixing a vinyl cyan-based monomer and an antioxidant to prepare a second reactant; adding and polymerizing the first reactant and the second reactant into a polymerization reactor to prepare a polymer; and removing unreacted monomers in a devolatilization tank.
    Type: Application
    Filed: October 6, 2020
    Publication date: May 5, 2022
    Inventors: Jae Bum SEO, Dae Woo LEE, Jung Tae PARK, Gyu Sun KIM, Ji Uk JANG
  • Publication number: 20220123071
    Abstract: The present disclosure relates to a display panel and a display device using the same, and includes a first region where a plurality of pixel groups are disposed; and a second region where a plurality of pixel groups and a plurality of light transmitting parts are disposed. The plurality of pixel groups disposed in the second region are disposed between the light transmitting parts. An aspect ratio of each of the pixel groups disposed in the second region is different from that of each of the pixel groups disposed in the first region. Each of the pixel groups of the second region includes the same number of sub-pixels as each of the pixel groups of the first region.
    Type: Application
    Filed: June 25, 2021
    Publication date: April 21, 2022
    Inventors: Young Sung Cho, Hyung Uk Jang, Sung Woo Jun
  • Publication number: 20220102497
    Abstract: A semiconductor device including an active region defined in a substrate; at least one channel layer on the active region; a gate electrode intersecting the active region and on the active region and surrounding the at least one channel layer; and a pair of source/drain regions adjacent to both sides of the gate electrode, on the active region, and in contact with the at least one channel layer, wherein the pair of source/drain regions includes a selective epitaxial growth (SEG) layer, and a maximum width of each of the pair of source/drain regions in a first direction is 1.3 times or less a width of the active region in the first direction.
    Type: Application
    Filed: December 9, 2021
    Publication date: March 31, 2022
    Inventors: Sung Uk JANG, Seung Hun LEE, Su Jin JUNG, Young Dae CHO
  • Publication number: 20220069028
    Abstract: An embodiment discloses a display panel and a display device including the same. The display panel includes a first display region in which a plurality of pixels are disposed, and a second display region including a plurality of pixel regions, in which a plurality of pixels are disposed, and a plurality of light-transmitting regions disposed between the plurality of pixel regions, wherein the second display region includes a plurality of first pixels disposed in the plurality of pixel regions, a plurality of second pixels disposed in the plurality of light-transmitting regions, and a plurality of first electrodes extending from the plurality of pixel regions to the plurality of light-transmitting regions to electrically connect the plurality of first pixels to the plurality of second pixels.
    Type: Application
    Filed: August 25, 2021
    Publication date: March 3, 2022
    Inventors: Hyung Uk Jang, Chul Nam
  • Patent number: 11257905
    Abstract: A semiconductor device including an active region defined in a substrate; at least one channel layer on the active region; a gate electrode intersecting the active region and on the active region and surrounding the at least one channel layer; and a pair of source/drain regions adjacent to both sides of the gate electrode, on the active region, and in contact with the at least one channel layer, wherein the pair of source/drain regions includes a selective epitaxial growth (SEG) layer, and a maximum width of each of the pair of source/drain regions in a first direction is 1.3 times or less a width of the active region in the first direction.
    Type: Grant
    Filed: April 17, 2019
    Date of Patent: February 22, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sung Uk Jang, Seung Hun Lee, Su Jin Jung, Young Dae Cho
  • Patent number: 11239363
    Abstract: A semiconductor device including an active region extending in a first direction on a substrate; a gate structure intersecting the active region and extending in a second direction on the substrate; and a source/drain region on the active region and at least one side of the gate structure, wherein the source/drain region includes a plurality of first epitaxial layers spaced apart from each other in the first direction, the plurality of first epitaxial layers including first impurities of a first conductivity type; and a second epitaxial layer filling a space between the plurality of first epitaxial layers, the second epitaxial layer including second impurities of the first conductivity type.
    Type: Grant
    Filed: October 10, 2019
    Date of Patent: February 1, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sung Uk Jang, Ki Hwan Kim, Su Jin Jung, Bong Soo Kim, Young Dae Cho
  • Patent number: D955989
    Type: Grant
    Filed: April 14, 2021
    Date of Patent: June 28, 2022
    Assignee: LUXROBO CO., LTD.
    Inventors: Son Yoon, Eung Soo Jang, Dong Uk Jang