Patents by Inventor Uli Hiller
Uli Hiller has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8796764Abstract: A semiconductor device includes a semiconductor substrate, a trench, a buried insulated source electrode arranged in a bottom portion of the trench, a first gate electrode and a second gate electrode arranged in an upper portion of the trench and spaced apart from one another. A surface gate contact extends into the upper portion of the trench and is in physical and electrical contact with the first gate electrode and second gate electrode.Type: GrantFiled: September 30, 2008Date of Patent: August 5, 2014Assignee: Infineon Technologies Austria AGInventors: Oliver Blank, Uli Hiller
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Publication number: 20130121024Abstract: A planar light guide includes a main body with a back face and a radiation outcoupling face opposite thereto, a main direction of light guidance parallel to the radiation outcoupling face, at least one plurality of identically shaped and identically oriented outcoupling structures formed on at least one of the main faces, and at least one structure main face per outcoupling structure, wherein an angle-dependent emission characteristic is provided asymmetrically in a first plane parallel to the main direction of light guidance and perpendicular to the radiation outcoupling face.Type: ApplicationFiled: March 21, 2011Publication date: May 16, 2013Applicant: OSRAM Opto Semiconductors GmbHInventors: Andreas Barth, Julius Muschaweck, Uli Hiller, Michael Sailer
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Publication number: 20130100696Abstract: The invention relates to a surface light source with a lighting surface that includes at least one semiconductor body that emits electromagnetic radiation from its front side during operation. Decoupling structures are suitable for producing a local variation of the light density on the lighting surface, so that the light density is increased in at least one illumination area with respect to a background area.Type: ApplicationFiled: April 4, 2011Publication date: April 25, 2013Applicant: OSRAM OPTO SEMICONDUCTORS GMBHInventors: Peter Brick, Joachim Frank, Uli Hiller, Stephan Kaiser, Gerhard Kuhn, Ales Markytan, Julius Muschaweck, Christian Neugirg
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Patent number: 8362551Abstract: In one embodiment, a field effect transistor has a semiconductor body, a drift region of a first conductivity type and a gate electrode. At least one trench extends into the drift region. A field plate is arranged at least in a portion of the at least one trench. A dielectric material at least partially surrounds both the gate electrode and the field plate. The field plate includes a first semiconducting material.Type: GrantFiled: October 11, 2011Date of Patent: January 29, 2013Assignee: Infineon Technologies Austria AGInventors: Franz Hirler, Walter Rieger, Andrew Wood, Mathias Born, Ralf Siemieniec, Jan Ropohl, Martin Poelzl, Oliver Blank, Uli Hiller, Oliver Haeberlein, Rudolf Zelsacher, Maximilian Roesch, Joachim Krumrey
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Patent number: 8114743Abstract: An integrated circuit device with a semiconductor body and a method for the production of a semiconductor device a provided. The semiconductor body comprises a cell field with a drift zone of a first conduction type. In addition, the semiconductor device comprises an edge region surrounding the cell field. Field plates with a trench gate structure are arranged in the cell field, and an edge trench surrounding the cell field is provided in the edge region. The front side of the semiconductor body is in the edge region provided with an edge zone of a conduction type complementing the first conduction type with doping materials of body zones of the cell field. The edge zone of the complementary conduction type extends both within and outside the edge trench.Type: GrantFiled: December 7, 2010Date of Patent: February 14, 2012Assignee: Infineon Technologies Austria AGInventors: Uli Hiller, Oliver Blank, Ralf Siemieniec, Maximilian Roesch
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Publication number: 20120025303Abstract: In one embodiment, a field effect transistor has a semiconductor body, a drift region of a first conductivity type and a gate electrode. At least one trench extends into the drift region. A field plate is arranged at least in a portion of the at least one trench. A dielectric material at least partially surrounds both the gate electrode and the field plate. The field plate includes a first semiconducting material.Type: ApplicationFiled: October 11, 2011Publication date: February 2, 2012Applicant: INFINEON TECHNOLOGIES AUSTRIA AGInventors: Franz Hirler, Walter Rieger, Andrew Wood, Mathias Born, Ralf Siemieniec, Jan Ropohl, Martin Poelzl, Oliver Blank, Uli Hiller, Oliver Haeberlen, Rudolf Zelsacher, Maximilian Roesch, Joachim Krumrey
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Patent number: 8044459Abstract: In one embodiment, a field effect transistor has a semiconductor body, a drift region of a first conductivity type and a gate electrode. At least one trench extends into the drift region. A field plate is arranged at least in a portion of the at least one trench. A dielectric material at least partially surrounds both the gate electrode and the field plate. The field plate includes a first semiconducting material.Type: GrantFiled: November 10, 2008Date of Patent: October 25, 2011Assignee: Infineon Technologies Austria AGInventors: Franz Hirler, Walter Rieger, Andrew Wood, Mathias Born, Ralf Siemieniec, Jan Ropohl, Martin Poelzl, Oliver Blank, Uli Hiller, Oliver Haeberlen, Rudolf Zelsacher, Maximilian Roesch, Joachim Krumrey
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Publication number: 20110076817Abstract: An integrated circuit device with a semiconductor body and a method for the production of a semiconductor device a provided. The semiconductor body comprises a cell field with a drift zone of a first conduction type. In addition, the semiconductor device comprises an edge region surrounding the cell field. Field plates with a trench gate structure are arranged in the cell field, and an edge trench surrounding the cell field is provided in the edge region. The front side of the semiconductor body is in the edge region provided with an edge zone of a conduction type complementing the first conduction type with doping materials of body zones of the cell field. The edge zone of the complementary conduction type extends both within and outside the edge trench.Type: ApplicationFiled: December 7, 2010Publication date: March 31, 2011Applicant: Infineon Technologies Austria AGInventors: Uli Hiller, Oliver Blank, Ralf Siemieniec, Maximilian Roesch
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Patent number: 7880226Abstract: An integrated circuit device with a semiconductor body and a method for the production of a semiconductor device a provided. The semiconductor body comprises a cell field with a drift zone of a first conduction type. In addition, the semiconductor device comprises an edge region surrounding the cell field. Field plates with a trench gate structure are arranged in the cell field, and an edge trench surrounding the cell field is provided in the edge region. The front side of the semiconductor body is in the edge region provided with an edge zone of a conduction type complementing the first conduction type with doping materials of body zones of the cell field. The edge zone of the complementary conduction type extends both within and outside the edge trench.Type: GrantFiled: January 25, 2008Date of Patent: February 1, 2011Assignee: Infineon Technologies Austria AGInventors: Uli Hiller, Oliver Blank, Ralf Siemieniec, Maximilian Roesch
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Patent number: 7833862Abstract: A semiconductor device and method. One embodiments provides a semiconductor substrate having a trench with a sidewall isolation comprising a first isolating material, a field electrode formed in lower portion of the trench, a cover comprising a second material above the field electrode, the second material being selectively etchable to the first isolating material, a gate dielectric on the sidewall in an upper portion of the trench and a gate electrode in the upper portion of the trench.Type: GrantFiled: March 3, 2008Date of Patent: November 16, 2010Assignee: Infineon Technologies Austria AGInventors: Oliver Blank, Uli Hiller, Maximilian Roesch, Walter Rieger
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Publication number: 20100117144Abstract: In one embodiment, a field effect transistor has a semiconductor body, a drift region of a first conductivity type and a gate electrode. At least one trench extends into the drift region. A field plate is arranged at least in a portion of the at least one trench. A dielectric material at least partially surrounds both the gate electrode and the field plate. The field plate includes a first semiconducting material.Type: ApplicationFiled: November 10, 2008Publication date: May 13, 2010Applicant: Infineon Technologies Austria AGInventors: Franz Hirler, Walter Rieger, Andrew Wood, Mathias Born, Ralf Siemieniec, Jan Ropohl, Martin Poelzl, Oliver Blank, Uli Hiller, Oliver Haeberlen, Rudolf Zelsacher, Maximilian Roesch, Joachim Krumrey
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Publication number: 20100078718Abstract: A semiconductor device includes a semiconductor substrate, a trench, a buried insulated source electrode arranged in a bottom portion of the trench, a first gate electrode and a second gate electrode arranged in an upper portion of the trench and spaced apart from one another. A surface gate contact extends into the upper portion of the trench and is in physical and electrical contact with the first gate electrode and second gate electrode.Type: ApplicationFiled: September 30, 2008Publication date: April 1, 2010Applicant: Infineon Technologies Austria AGInventors: Oliver Blank, Uli Hiller
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Patent number: 7674678Abstract: A method for producing a transistor component having a field plate. One embodiment includes providing a semiconductor body having a first side, and including a first trench extending into the semiconductor body. A field plate dielectric layer is produced on the first side and at uncovered areas of the first trench such that a residual trench remains. A field plate layer is produced in the residual trench. The first side of the semiconductor body is uncovered using a polishing method. The field plate dielectric layer is partially removed from the at least one first trench proceeding from the first side.Type: GrantFiled: May 5, 2008Date of Patent: March 9, 2010Assignee: Infineon Technologies Austria AGInventors: Uli Hiller, Oliver Blank
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Publication number: 20090273024Abstract: A method for producing a transistor component having a field plate. One embodiment includes providing a semiconductor body having a first side, and including a first trench extending into the semiconductor body. A field plate dielectric layer is produced on the first side and at uncovered areas of the first trench such that a residual trench remains. A field plate layer is produced in the residual trench. The first side of the semiconductor body is uncovered using a polishing method. The field plate dielectric layer is partially removed from the at least one first trench proceeding from the first side.Type: ApplicationFiled: May 5, 2008Publication date: November 5, 2009Applicant: INFINEON TECHNOLOGIES AUSTRIA AGInventors: Uli Hiller, Olivier Blank
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Publication number: 20090218618Abstract: A semiconductor device and method. One embodiments provides a semiconductor substrate having a trench with a sidewall isolation comprising a first isolating material, a field electrode formed in lower portion of the trench, a cover comprising a second material above the field electrode, the second material being selectively etchable to the first isolating material, a gate dielectric on the sidewall in an upper portion of the trench and a gate electrode in the upper portion of the trench.Type: ApplicationFiled: March 3, 2008Publication date: September 3, 2009Applicant: Infineon Technologies Austria AGInventors: Oliver Blank, Uli Hiller, Maximilian Roesch, Walter Rieger
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Publication number: 20090152624Abstract: An integrated circuit device with a semiconductor body and a method for the production of a semiconductor device a provided. The semiconductor body comprises a cell field with a drift zone of a first conduction type. In addition, the semiconductor device comprises an edge region surrounding the cell field. Field plates with a trench gate structure are arranged in the cell field, and an edge trench surrounding the cell field is provided in the edge region. The front side of the semiconductor body is in the edge region provided with an edge zone of a conduction type complementing the first conduction type with doping materials of body zones of the cell field. The edge zone of the complementary conduction type extends both within and outside the edge trench.Type: ApplicationFiled: January 25, 2008Publication date: June 18, 2009Applicant: INFINEON TECHNOLOGIES AUSTRIA AGInventors: Uli Hiller, Oliver Blank, Ralf Siemieniec, Maximilian Roesch
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Patent number: 7060562Abstract: A method for fabricating gate electrodes (7) in a field plate trench transistor (1) having a cell array with a plurality of trenches (3) and a plurality of mesa regions (8) arranged between the trenches comprises the following steps: application of a gate electrode layer (7) to the cell array in such a way that the gate electrode layer (7) has depressions within or above the trenches (3), application of a mask layer (10) to the cell array, etching-back of the mask layer (10) in such a way that mask layer residues (10) remain only within the depressions of the gate electrode layer (7), and etching-back of the gate electrode layer (7) using the mask layer residues (10) as an etching mask in such a way that gate electrode layer residues (7) remain only within/above the trenches (3).Type: GrantFiled: February 4, 2005Date of Patent: June 13, 2006Assignee: Infineon Technologies AGInventors: Ralf Henninger, Franz Hirler, Uli Hiller, Jan Ropohl
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Publication number: 20050215010Abstract: A method for fabricating gate electrodes (7) in a field plate trench transistor (1) having a cell array with a plurality of trenches (3) and a plurality of mesa regions (8) arranged between the trenches comprises the following steps: application of a gate electrode layer (7) to the cell array in such a way that the gate electrode layer (7) has depressions within or above the trenches (3), application of a mask layer (10) to the cell array, etching-back of the mask layer (10) in such a way that mask layer residues (10) remain only within the depressions of the gate electrode layer (7), and etching-back of the gate electrode layer (7) using the mask layer residues (10) as an etching mask in such a way that gate electrode layer residues (7) remain only within/above the trenches (3).Type: ApplicationFiled: February 4, 2005Publication date: September 29, 2005Applicant: Infineon Technologies AGInventors: Ralf Henninger, Franz Hirler, Uli Hiller, Jan Ropohl