Abstract: An integrated circuit having an ESD protection structure is described. One embodiment includes a circuit section interconnected with a first terminal and with a second terminal and being operable at voltage differences between the first terminal and second terminal of greater than +10 V and less than ?10 V. The integrated circuit additionally includes an ESD protection structure operable to protect the circuit section against electrostatic discharge between the first terminal and the second terminal. The ESD protection structure is operable with voltage differences between the first and second terminals of greater than +10 V and less than ?10 V without triggering. The ESD protection structure is electrically and optically coupled to a photon source such that photons emitted by the photon source upon ESD pulse loading are absorbable in the ESD protection structure and an avalanche breakdown is initiatable by electron-hole pairs generated by the absorbed photons.

Abstract: A circuit is described comprising electrostatic discharge (ESD) protection circuitry, keep-off circuitry and ESD detection circuitry. When the ESD detection circuitry detects an ESD event, the ESD detection circuitry is configured to both enable the ESD protection circuitry and disable the keep-off circuitry.

Abstract: A combined electro static discharge clamp for cascaded voltage pins can include an electronic switch, a plurality of discharge paths, and a plurality of trigger circuits. In response to detecting a voltage event across any two voltage pins, the trigger circuitry can turn on the electronic switch causing current caused by the voltage event to flow through one or more of the discharge paths instead of through functional circuitry which could potentially be damaged by the current caused by the voltage event.

Abstract: A semiconductor component includes an auxiliary semiconductor device configured to emit radiation. The semiconductor component further includes a semiconductor device. An electrical coupling and an optical coupling between the auxiliary semiconductor device and the semiconductor device are configured to trigger emission of radiation by the auxiliary semiconductor device and to trigger avalanche breakdown in the semiconductor device by absorption of the radiation in the semiconductor device. The semiconductor device includes a pn junction between a first layer of a first conductivity type buried below a surface of a semiconductor body and a doped semiconductor region of a second conductivity type disposed between the surface and the first layer.

Abstract: A semiconductor device includes a first semiconductor element including a first pn junction between a first terminal and a second terminal. The semiconductor device further includes a semiconductor element including a second pn junction between a third terminal and a fourth terminal. The semiconductor element further includes a semiconductor body including the first semiconductor element and the second semiconductor element monolithically integrated. The first and third terminals are electrically coupled to a first device terminal. The second and fourth terminals are electrically coupled to a second device terminal. A temperature coefficient ?1 of a breakdown voltage Vbr1 of the first pn junction and a temperature coefficient ?2 of a breakdown voltage Vbr2 of the second pn junction have a same algebraic sign and satisfy 0.6×?1<?2<1.1×?1 at T=300 K, wherein Vbr2<Vbr1.

Abstract: A protection circuit includes a controllable discharge element having a load path coupled between a first second circuit nodes. The discharge element provides a discharge path between the first and the second circuit nodes when in an on state. A trigger circuit has a first connection coupled to the first circuit node and a second connections coupled to the second circuit node. The trigger circuit is configured to produce a drive signal that switches the discharge element to its on state when the voltage between the first and the second circuit nodes reaches a trigger value. A setting circuit coupled to the trigger circuit is configured to change the trigger value from a first trigger value to a second trigger value depending on a voltage between the first and the second circuit nodes and/or on the drive signal.

Abstract: A two-stage protection device for an electronic component protects against transient disturbances. The electronic component may be a semiconductor component, and may include one or multiple transistors and/or an integrated circuit. The protection device is connected to at least a first contact and a second contact of the electronic component, and is disposed essentially in parallel to the component that is to be protected, between the first contact and the second contact. The protection device includes a first stage with at least one diode and a second stage separated from the first stage by a resistor. The second stage includes at least one diode arrangement having two back-to-back disposed diodes which are disposed cathode-to-cathode.

Abstract: A semiconductor device includes a first semiconductor element including a first pn junction between a first terminal and a second terminal. The semiconductor device further includes a semiconductor element including a second pn junction between a third terminal and a fourth terminal. The semiconductor element further includes a semiconductor body including the first semiconductor element and the second semiconductor element monolithically integrated. The first and third terminals are electrically coupled to a first device terminal. The second and fourth terminals are electrically coupled to a second device terminal. A temperature coefficient ?1 of a breakdown voltage Vbr1 of the first pn junction and a temperature coefficient ?2 of a breakdown voltage Vbr2 of the second pn junction have a same algebraic sign and satisfy 0.6×?1<?2<1.1×?1 at T=300 K, wherein Vbr2<Vbr1.

Abstract: One embodiment of an integrated circuit includes a semiconductor body. In the semiconductor body a first trench region extends into the semiconductor body from a first surface. The integrated circuit further includes a diode including an anode region and a cathode region. One of the anode region and the cathode region is at least partly arranged in the first trench region. The other one of the anode region and the cathode region includes a first semiconductor region adjoining the one of the anode region and the cathode region from outside of the first trench region.

Abstract: A semiconductor device includes a first semiconductor element including a first pn junction between a first terminal and a second terminal. The semiconductor device further includes a semiconductor element including a second pn junction between a third terminal and a fourth terminal. The semiconductor element further includes a semiconductor body including the first semiconductor element and the second semiconductor element monolithically integrated. The first and third terminals are electrically coupled to a first device terminal. The second and fourth terminals are electrically coupled to a second device terminal. A temperature coefficient ?1 of a breakdown voltage Vbr1 of the first pn junction and a temperature coefficient ?2 of a breakdown voltage Vbr2 of the second pn junction have a same algebraic sign and satisfy 0.6×?1<a2<1.1×?1 at T=300 K, wherein Vbr2<Vbr1.

Abstract: An integrated circuit arrangement includes a Shockley diode or a thyristor. An inner region of the diode or of the thyristor is completely or partially shielded during the implantation of a p-type well. This gives rise to a Shockley diode or a thyristor having improved electrical properties, in particular with regard to the use as an ESD protection element.

Abstract: A protection circuit includes a controllable discharge element having a load path coupled between a first second circuit nodes. The discharge element provides a discharge path between the first and the second circuit nodes when in an on state. A trigger circuit has a first connection coupled to the first circuit node and a second connections coupled to the second circuit node. The trigger circuit is configured to produce a drive signal that switches the discharge element to its on state when the voltage between the first and the second circuit nodes reaches a trigger value. A setting circuit coupled to the trigger circuit is configured to change the trigger value from a first trigger value to a second trigger value depending on a voltage between the first and the second circuit nodes and/or on the drive signal.

Abstract: An integrated circuit arrangement includes a Shockley diode or a thyristor. An inner region of the diode or of the thyristor is completely or partially shielded during the implantation of a p-type well. This gives rise to a Shockley diode or a thyristor having improved electrical properties, in particular with regard to the use as an ESD protection element.

Abstract: An integrated circuit arrangement includes a Shockley diode or a thyristor. An inner region of the diode or of the thyristor is completely or partially shielded during the implantation of a p-type well. This gives rise to a Shockley diode or a thyristor having improved electrical properties, in particular with regard to the use as an ESD protection element.

Abstract: An integrated circuit arrangement includes a Shockley diode or a thyristor. An inner region of the diode or of the thyristor is completely or partially shielded during the implantation of a p-type well. This gives rise to a Shockley diode or a thyristor having improved electrical properties, in particular with regard to the use as an ESD protection element.

Abstract: An integrated circuit arrangement includes a Shockley diode or a thyristor. An inner region of the diode or of the thyristor is completely or partially shielded during the implantation of a p-type well. This gives rise to a Shockley diode or a thyristor having improved electrical properties, in particular with regard to the use as an ESD protection element.

Abstract: An ESD protection device for protecting a circuit against electrostatic discharges. The ESD protection device having a series circuit of N diodes, each diode comprising an anode and a cathode. The series circuit being connected between two supply potentials. The diodes being so arranged that a spatial distance between the anode of a first diode and the cathode of an Nth diode of the series circuit is less than a maximum distance between the anode or cathode of a first spatially outer diode of the series circuit and the anode or cathode of a second spatially outer diode of the series circuit.

Abstract: An integrated circuit arrangement includes a Shockley diode or a thyristor. An inner region of the diode or of the thyristor is completely or partially shielded during the implantation of a p-type well. This gives rise to a Shockley diode or a thyristor having improved electrical properties, in particular with regard to the use as an ESD protection element.

Abstract: An ESD protection device for protecting a circuit against electrostatic discharges. The ESD protection device having a series circuit of N diodes, each diode comprising an anode and a cathode. The series circuit being connected between two supply potentials. The diodes being so arranged that a spatial distance between the anode of a first diode and the cathode of an Nth diode of the series circuit is less than a maximum distance between the anode or cathode of a first spatially outer diode of the series circuit and the anode or cathode of a second spatially outer diode of the series circuit.

Abstract: An electrostatic discharge (ESD) protective apparatus for a semiconductor circuit has at least one ESD protective element, which is connected between the substrate contact and a ground potential connection, and is electrically connected to the substrate contact. The ESD protective element may be in the form of an ESD protective diode or an ESD protective transistor. It is also possible to connect a resistor or an ESD protective transistor between the substrate contact and the ground potential connection as an ESD protective element, and additionally to connect an ESD protective diode or an ESD protective transistor between the substrate contact and a supply voltage potential connection.