Abstract: A semiconductor device and a method for making a semiconductor device are disclosed. In an embodiment a semiconductor device includes a semiconductor chip and a fiber reinforced encapsulation layer at least partly covering the semiconductor chip.

Abstract: A number of semiconductor chips each include a first main face and a second main face opposite to the first main face. A first encapsulation layer is applied over the second main faces of the semiconductor chips. An electrical wiring layer is applied over the first main faces of the first semiconductor chips. A second encapsulation layer is applied over the electrical wiring layer. The thickness of the first encapsulation layer and the thicknesses of the first semiconductor chips is reduced. The structure can be singulated to obtain a plurality of semiconductor devices.

Abstract: In various embodiments, a package arrangement may be provided. The package arrangement may include at least one chip. The package arrangement may further include encapsulation material at least partially encapsulating the chip. The package arrangement may also include a redistribution structure over a first side of the chip. The package arrangement may further include a metal structure over a second side of the chip. The second side may be opposite the first side. The package arrangement may additionally include at least one of a semiconductor structure and an electrically conductive plastic material structure electrically coupled to the redistribution structure and the metal structure to form a current path between the redistribution structure and the metal structure.

Abstract: A method of packaging integrated circuits includes providing a molded substrate including a first plurality of functional semiconductor dies and a plurality of placeholders laterally spaced apart from one another and covered by a molding compound. The molding compound is thinned to expose at least some of the placeholders. The exposed placeholders are removed to form cavities in the molded substrate. A second plurality of functional semiconductor dies is inserted in the cavities formed in the molded substrate. Electrical connections are formed to the first plurality and second plurality of functional semiconductor dies at a side of the dies uncovered by the molding compound.

Abstract: A number of semiconductor chips each include a first main face and a second main face opposite to the first main face. A first encapsulation layer is applied over the second main faces of the semiconductor chips. An electrical wiring layer is applied over the first main faces of the first semiconductor chips. A second encapsulation layer is applied over the electrical wiring layer. The thickness of the first encapsulation layer and the thicknesses of the first semiconductor chips is reduced. The structure can be singulated to obtain a plurality of semiconductor devices.

Abstract: What is described is a buckle cap for a belt buckle having two interconnected half-shells (10, 20) and connecting units which connect both half-shells (10, 20) to one another. Each connecting unit comprises at least one hole in each half-shell (10, 20) and a connecting pin (30) which is ribbed at least in certain sections, wherein one section of the connecting pin (30) is situated in the hole of the first connecting unit (10) and a second section of the connecting pin (30) is situated in the hole of the second half-shell (20). In order to achieve an easy mounting capability the hole in the first half-shell (10) is a through-hole (12) through which the connecting pin (30, 30?) extends completely, and the connecting pin (30, 30?) has a head (34, 34?) which is thickened with respect to the sections situated in the holes, said head adjoining the section of the connecting pin (30) which extends through the through-hole (12) and being situated outside the through-hole (12).

Abstract: A chip package is provided, the chip package including: a chip including at least one contact pad formed on a chip front side; an encapsulation material at least partially surrounding the chip and covering the at least one contact pad; and at least one electrical interconnect formed through the encapsulation material, wherein the at least one electrical interconnect is configured to electrically redirect the at least one contact pad from a chip package first side at the chip front side to at least one solder structure formed over a chip package second side at a chip back side.

Abstract: A method for manufacturing a chip package is provided. The method includes: forming an electrically insulating material over a chip side; selectively removing at least part of the electrically insulating material thereby forming a trench in the electrically insulating material, depositing electrically conductive material in the trench wherein the electrically conductive material is electrically connected to at least one contact pad formed over the chip side; forming an electrically conductive structure over the electrically insulating material, wherein at least part of the electrically conductive structure is in direct physical and electrical connection with the electrically conductive material; and depositing a joining structure over the electrically conductive structure.

Abstract: A chip package is provided, the chip package including: a chip including at least one contact pad formed on a chip front side; an encapsulation material at least partially surrounding the chip and covering the at least one contact pad; and at least one electrical interconnect formed through the encapsulation material, wherein the at least one electrical interconnect is configured to electrically redirect the at least one contact pad from a chip package first side at the chip front side to at least one solder structure formed over a chip package second side at a chip back side.

Abstract: In a method for fabricating a semiconductor device, a carrier and at least one semiconductor chip are provided.

Abstract: The disclosure relates to a cooking vessel which is of a prespecified cooking vessel type and comprises: a cooking vessel type encoding device which encodes the cooking vessel type of the cooking vessel, with the cooking vessel type encoding device being a passive, electrical resonant circuit, with a resonant frequency of the resonant circuit encoding the cooking vessel type of the cooking vessel.

Abstract: A shell element for the buckle cover of a seat belt buckle is disclosed. The shell element comprises a base body made of a hard elastomer and an outer and an inner surface. So that when the buckle cover bears against a further vehicle element with a hard surface, no wear and no undesirable noise is generated and so that the seat belt buckle permanently has attractive visual and haptic properties, a further element made of a soft elastomer is directly connected to the base body and is connected thereto by a material and/or positive connection, said further element forming at least one part of the outer surface of the shell element.

Abstract: A method of manufacturing semiconductor device comprises placing multiple chips onto a carrier. An encapsulation material is applied to the multiple chips and the carrier for forming an encapsulation workpiece. The encapsulation workpiece having a first main face facing the carrier and a second main face opposite to the first main face. Further, marking elements are applied to the encapsulation workpiece relative to the multiple chips, the marking elements being detectable on the first main face and on the second main face.

Abstract: A method of manufacturing semiconductor device comprises placing multiple chips onto a carrier. An encapsulation material is applied to the multiple chips and the carrier for forming an encapsulation workpiece. The encapsulation workpiece having a first main face facing the carrier and a second main face opposite to the first main face. Further, marking elements are applied to the encapsulation workpiece relative to the multiple chips, the marking elements being detectable on the first main face and on the second main face.