Abstract: A process for producing a magnetic core material is disclosed. The process includes distributing particles within a solution medium to form a colloidal solution. The process further includes modifying a surface chemistry of the particles by adding one or more additives to the colloidal solution. The process further includes gelating the colloidal solution to form the magnetic core material.

Abstract: A method including: providing a first wafer stack; applying a first bonding layer on the first wafer stack; providing a second wafer stack, where the second wafer stack includes vias; and applying a second bonding layer to the second wafer stack. The vias extend through the second wafer stack and to the second bonding layer. The second bonding layer is bonded to the first bonding layer. A seed layer is applied on a side of the second wafer stack opposite the second bonding layer such that a material of the seed layer (i) contacts the vias, and (ii) extends over and past ends of the second wafer stack and onto the first bonding layer.

Abstract: Methods of forming coaxial feedthroughs for 3d integrated circuits that provide excellent isolation of signal paths from the substrate and from adjacent feedthroughs. One method is to form a recess in a substrate and deposit alternate layers of insulation and conductive layers and then thin the substrate to make the layers available from both sides of the substrate, with the first metal layer forming the coaxial conductor and the second metal layer forming the central conductor. Alternatively the coaxial feedthroughs may be formed using a modified pillar process to form the coaxial conductor at the same time as the center conductor is formed so that the coaxial feedthrough is formed without requiring extra steps. Both processes are low temperature processes.

Abstract: A method including: providing a first wafer stack; applying a first bonding layer on the first wafer stack; providing a second wafer stack, where the second wafer stack includes vias; and applying a second bonding layer to the second wafer stack. The vias extend through the second wafer stack and to the second bonding layer. The second bonding layer is bonded to the first bonding layer. A seed layer is applied on a side of the second wafer stack opposite the second bonding layer such that a material of the seed layer (i) contacts the vias, and (ii) extends over and past ends of the second wafer stack and onto the first bonding layer.

Abstract: A method of deposition of magnetic nanocomposites. The method comprises providing an electron beam evaporation system having at least two independent hearths with independently controllable electron beams, each to melt and evaporate materials in the respective hearth, each hearth having a respective shutter for selectively controlling the deposition of the respective material in the respective hearth, placing a ferromagnetic material in a first hearth, placing an oxide in a second hearth which, when evaporated and deposited, will form an insulator, maintaining an oxygen environment in the electron beam evaporation system while evaporating the materials in the first hearth and second hearth, and depositing the magnetic nanocomposite on at least one wafer in the electron beam evaporation system. Various aspects of the method are disclosed.

Abstract: A wafer structure includes a first wafer stack and a first bonding layer disposed on the first wafer stack. The wafer structure further includes a second wafer stack that includes a first surface and a second surface opposing the first surface. A second bonding layer is disposed on the second surface and is in contact with the first bonding layer. The second wafer stack comprises through-silicon-vias (TSVs) that extend from the first surface to the second bonding layer. A seed layer is disposed on the first surface and is in contact with the TSVs.

Abstract: A bulk acoustic wave (BAW) resonator is constructed to reduce phase and amplitude ripples in a frequency response. The BAW resonator is fabricated on a substrate 400 ?m thick or less, preferably approximately 325 ?m, having a first side and a polished second side with a peak-to-peak roughness of approximately 1000 A. A Bragg mirror having alternate layers of a high acoustic impedance material, such as tungsten, and a low acoustic impedance material is fabricated on the first side of the substrate. A BAW resonator is fabricated on the Bragg mirror. A lossy material, such as epoxy, coats the second side of the substrate opposite the first side. The lossy material has an acoustic impedance in the range of 0.01× to 1.0× the acoustic impedance of the layers of high acoustic impedance material.

Abstract: Methods of forming coaxial feedthroughs for 3d integrated circuits that provide excellent isolation of signal paths from the substrate and from adjacent feedthroughs. One method is to form a recess in a substrate and deposit alternate layers of insulation and conductive layers and then thin the substrate to make the layers available from both sides of the substrate, with the first metal layer forming the coaxial conductor and the second metal layer forming the central conductor. Alternatively the coaxial feedthroughs may be formed using a modified pillar process to form the coaxial conductor at the same time as the center conductor is formed so that the coaxial feedthrough is formed without requiring extra steps. Both processes are low temperature processes.

Abstract: Exemplary embodiments provide a nanomagnetic structure and method of making the same, comprising a device substrate, a plurality of nanomagnetic composite layers disposed on the device substrate, wherein an adhesive layer is interposed between each of the plurality of nanomagnetic composite layers. Metal windings are integrated within the plurality of nanomagnetic composite layers to form an inductor core, wherein the nanomagnetic structure has a thickness ranging from about 5 to about 100 microns.

Abstract: A 3D chip package is disclosed that includes a carrier substrate with a first cavity and a second cavity formed therein. A first structure is attached to the carrier substrate at least partially in the first cavity, and a second structure is attached to the carrier substrate at least partially in the second cavity, where the first and second structures include electrical circuitry. A shield layer may be disposed between the carrier substrate and the first structure and/or the second structure for isolating the first structure and/or the second structure at least one of electrically, magnetically, optically, or thermally. In some embodiments, the shield layer may be a dielectric shield layer for dielectrically coupling the first structure and the second structure. The first structure and the second structure may be homogeneous or heterogeneous.

Abstract: A bulk acoustic wave (BAW) resonator is constructed to reduce phase and amplitude ripples in a frequency response. The BAW resonator is fabricated on a substrate 400 ?m thick or less, preferably approximately 325 ?m, having a first side and a polished second side with a peak-to-peak roughness of approximately 1000 A. A Bragg mirror having alternate layers of a high acoustic impedance material, such as tungsten, and a low acoustic impedance material is fabricated on the first side of the substrate. A BAW resonator is fabricated on the Bragg mirror. A lossy material, such as epoxy, coats the second side of the substrate opposite the first side. The lossy material has an acoustic impedance in the range of 0.01× to 1.0× the acoustic impedance of the layers of high acoustic impedance material.

Abstract: Methods of reducing phase and amplitude ripples in a BAW resonator frequency response by providing a substrate, fabricating a Bragg mirror having alternate layers of a high acoustic material and a low acoustic material on a first surface of the substrate, fabricating a BAW on the Bragg mirror, and coating a second side of the substrate opposite the first side with a lossy material having an acoustic impedance in the range of 0.01× to 1.0× the acoustic impedance of the layers of high impedance material, the second surface of the substrate being a polished surface. Various embodiments are disclosed.

Abstract: A 3D chip package is disclosed that includes a carrier substrate with a first cavity and a second cavity formed therein. A first structure is attached to the carrier substrate at least partially in the first cavity, and a second structure is attached to the carrier substrate at least partially in the second cavity, where the first and second structures include electrical circuitry. A shield layer may be disposed between the carrier substrate and the first structure and/or the second structure for isolating the first structure and/or the second structure at least one of electrically, magnetically, optically, or thermally. In some embodiments, the shield layer may be a dielectric shield layer for dielectrically coupling the first structure and the second structure. The first structure and the second structure may be homogeneous or heterogeneous.

Abstract: A micro relay of a micro-electro-mechanical system (MEMS), includes a cap substrate, a first electrical contact, an actuator, and a second electrical contact. The first electrical contact is formed on the cap substrate, includes a platinum group metal, and includes a first surface layer of an oxide of the platinum group metal. The second electrical contact is formed on the actuator, includes the platinum group metal, and includes a second surface layer of the oxide of the platinum group metal. At least a first portion of the first surface layer contacts at least a second portion of the second surface layer during cycling of the micro relay.

Abstract: A wafer structure includes a first wafer stack and a first bonding layer disposed on the first wafer stack. The wafer structure further includes a second wafer stack that includes a first surface and a second surface opposing the first surface. A second bonding layer is disposed on the second surface and is in contact with the first bonding layer. The second wafer stack comprises through-silicon-vias (TSVs) that extend from the first surface to the second bonding layer. A seed layer is disposed on the first surface and is in contact with the TSVs.

Abstract: Bonded wafer packages having first and second wafers bonded together forming a matrix of sealed devices, at least one of the wafers having a plurality of passive devices formed thereon, including at least one BAW resonator within each of the sealed devices, the first wafer having conductor filled through-holes forming electrical connections between the passive devices and connections assessable from outside the sealed devices, the bonded wafers being diced to form individual sealed devices. The devices may be duplexers, interstage filters or other circuits such as VCOs and RF circuits. Various embodiments are disclosed.

Abstract: Bonded wafer packages having first and second wafers bonded together forming a matrix of sealed devices, at least one of the wafers having a plurality of passive devices formed thereon, including at least one BAW resonator within each of the sealed devices, the first wafer having conductor filled through-holes forming electrical connections between the passive devices and connections assessable from outside the sealed devices, the bonded wafers being diced to form individual sealed devices. The devices may be duplexers, interstage filters or other circuits such as VCOs and RF circuits. Various embodiments are disclosed.

Abstract: Methods of reducing phase and amplitude ripples in a BAW resonator frequency response by providing a substrate, fabricating a Bragg mirror having alternate layers of a high acoustic material and a low acoustic material on a first surface of the substrate, fabricating a BAW on the Bragg mirror, and coating a second side of the substrate opposite the first side with a lossy material having an acoustic impedance in the range of 0.01x to 1.0x the acoustic impedance of the layers of high impedance material, the second surface of the substrate being a polished surface. Various embodiments are disclosed.

Abstract: Microrelays and microrelay fabrication and operating methods providing a microrelay actuator positively controllable between a switch closed position and a switch open position. The microrelays are a five terminal device, two terminals forming the switch contacts, one terminal controlling the actuating voltage on an actuator conductive area, one terminal controlling the actuating voltage on a first fixed conductive area, and one terminal controlling the actuating voltage on a second fixed conductive area deflecting the actuator in an opposite direction than the first fixed conductive area. Providing the actuating voltages as zero average voltage square waves and their complement provides maximum actuating forces, and positive retention of the actuator in both actuator positions. Various fabrication techniques are disclosed.

Abstract: Wafer level packaging process for packaging MEMS or other devices. In some embodiments, a MEMS wafer with normal thickness is firstly bonded to a cap wafer of normal thickness, followed by a thinning on the backside of the MEMS wafer. After this, the bonded wafer stack and the capping of the hermetically packaged MEMS devices are still rigid enough to do further processing. On this basis, through vias on the thinned substrate can be easily formed and stopped on the regions to be led out (e.g., metal pads/electrodes, highly doped silicon, etc.). Vias can be partially filled as this is the final surface of process. Even thick metal coated/patterned vias have much more space to relax possible thermal stress, as long as the vias are not completely filled with hard metal(s). Various embodiments are disclosed.