Patents by Inventor Uppili Sridhar

Uppili Sridhar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070099395
    Abstract: Wafer level packaging process for packaging MEMS or other devices. In some embodiments, a MEMS wafer with normal thickness is firstly bonded to a cap wafer of normal thickness, followed by a thinning on the backside of the MEMS wafer. After this, the bonded wafer stack and the capping of the hermetically packaged MEMS devices are still rigid enough to do further processing. On this basis, through vias on the thinned substrate can be easily formed and stopped on the regions to be led out (e.g., metal pads/electrodes, highly doped silicon, etc.). Vias can be partially filled as this is the final surface of process. Even thick metal coated/patterned vias have much more space to relax possible thermal stress, as long as the vias are not completely filled with hard metal(s). Various embodiments are disclosed.
    Type: Application
    Filed: November 3, 2005
    Publication date: May 3, 2007
    Inventors: Uppili Sridhar, Quanbo Zou
  • Publication number: 20070035364
    Abstract: Titanium-tungsten alloy based mirrors and electrodes in bulk acoustic wave devices simplify processing by eliminating the need for adhesion, barrier and seed layers, and preserve the advantages of tungsten layers. Alternate layers of high and low acoustic impedance materials are use, wherein the high acoustic impedance layers are titanium-tungsten alloy layers, preferably deposited by physical vapor deposition, and isotropically patterned with a wet etch. SiO2 is preferably used for the low acoustic impedance layers, though other low acoustic impedance materials may be used if desired. Electrodes and loads may also be a Titanium-tungsten alloy. Titanium-tungsten alloys in the range of 3 to 15 percent of titanium by weight are preferred.
    Type: Application
    Filed: August 11, 2005
    Publication date: February 15, 2007
    Inventors: Uppili Sridhar, Ralph Wall, Guillaume Bouche
  • Patent number: 6908825
    Abstract: The invention relates to a method of making an integrated circuit inductor that comprises a silicon substrate and an oxide layer on the silicon substrate. In one aspect, the method comprises depositing an inductive loop on the oxide layer, and making a plurality of apertures in the oxide layer beneath the inductive loop. The method also comprises providing a plurality of bridges adjacent the apertures and provided by portions of the oxide layer between an inner region within the inductive loop and an outer region of the oxide layer without the inductive loop, the inductive loop being supported on the bridges. The method comprises forming a trench in the silicon substrate beneath the bridges, to provide an air gap between the inductive loop and the silicon substrate.
    Type: Grant
    Filed: November 14, 2002
    Date of Patent: June 21, 2005
    Assignee: Institute of Microelectronics
    Inventors: Shuming Xu, Hanhua Feng, Pang Dow Foo, Bai Xu, Uppili Sridhar
  • Publication number: 20050121298
    Abstract: Microrelays and microrelay fabrication and operating methods providing a microrelay actuator positively controllable between a switch closed position and a switch open position. The microrelays are a five terminal device, two terminals forming the switch contacts, one terminal controlling the actuating voltage on an actuator conductive area, one terminal controlling the actuating voltage on a first fixed conductive area, and one terminal controlling the actuating voltage on a second fixed conductive area deflecting the actuator in an opposite direction than the first fixed conductive area. Providing the actuating voltages as zero average voltage square waves and their complement provides maximum actuating forces, and positive retention of the actuator in both actuator positions. Various fabrication techniques are disclosed.
    Type: Application
    Filed: November 2, 2004
    Publication date: June 9, 2005
    Inventors: Uppili Sridhar, Quanbo Zou
  • Patent number: 6858459
    Abstract: Method of fabricating a micro-mirror switching device in single crystal silicon are described. The device is fabricated as three main elements: silicon mirror plate with metal-mirror, secondary actuator, and hinge/spring mechanism to integrate the mirror plate with the actuator. p-n junction is first formed on p-type silicon. Trenches are then etched in n-silicon to define the device element boundaries and filled with silicon dioxide. Three layers of sacrificial oxide and two structural poly-silicon layers are deposited and patterned to form device elements. Novel release processes, consisting of backside electrochemical etching in potassium-hydroxide, reactive ion etching to expose oxide-filled trenches from the bottom, and hydrofluoric acid etching of sacrificial oxide layers and oxide in silicon trenches, form the silicon blocks; those that are not attached to structural poly-silicon are sacrificed and those that are attached are left in place to hold together the switching device elements.
    Type: Grant
    Filed: May 23, 2002
    Date of Patent: February 22, 2005
    Assignee: Institute of Microelectronics
    Inventors: Janak Singh, Uppili Sridhar, Ranganathan Nagarajan, Quanbo Zou
  • Patent number: 6841839
    Abstract: Microrelays and microrelay fabrication and operating methods providing a microrelay actuator positively controllable between a switch closed position and a switch open position. The microrelays are a five terminal device, two terminals forming the switch contacts, one terminal controlling the actuating voltage on an actuator conductive area, one terminal controlling the actuating voltage on a first fixed conductive area, and one terminal controlling the actuating voltage on a second fixed conductive area deflecting the actuator in an opposite direction than the first fixed conductive area. Providing the actuating voltages as zero average voltage square waves and their complement provides maximum actuating forces, and positive retention of the actuator in both actuator positions. Various fabrication techniques are disclosed.
    Type: Grant
    Filed: August 22, 2003
    Date of Patent: January 11, 2005
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Uppili Sridhar, Quanbo Zou
  • Patent number: 6765300
    Abstract: A microstructure relay is provided, having a body that includes upper and lower portions. The lower portion is formed from a substrate, and the upper portion is formed on the substrate to avoid bonding of the lower portion to the upper portion. A support member is fixed to the body at a first end of the support member to form a cantilever, wherein an upper surface of the support member and a lower surface of the upper portion of the body form a cavity. A first contact region is located on the upper surface at a second end of the support member. The first contact region comprises a first contact, wherein pivoting the support member toward the lower surface causes the first contact to be electrically coupled to a counter contact.
    Type: Grant
    Filed: February 11, 2002
    Date of Patent: July 20, 2004
    Assignees: Tyco Electronics Logistics, AG, Institute of Microelectronics
    Inventors: Dirk Wagenaar, Kay Krupka, Helmut Schlaak, Uppili Sridhar, Victor D. Samper, Pang Dow Foo
  • Patent number: 6762049
    Abstract: It is often desirable to be able to perform an array of micro-chemical reactions simultaneously but with each reaction proceeding at a different temperature and/or for a different time. A classic example is the polymerase chain reaction associated with DNA analysis. In the present invention, this is achieved by means of an apparatus made up of a chip of plastic, or similar low cost material, containing an array of reaction chambers. After all chambers have been filled with reagents, the chip is pressed up against a substrate, typically a printed circuit board, there being a set of temperature balancing blocks between the chip and the substrate. Individually controlled heaters and sensors located between the blocks and the substrate allow each chamber to follow its own individual thermal protocol while being well thermally isolated from all other chambers and the substrate. The latter rests on a large heat sink to avoid temperature drift over time. A process for manufacturing the apparatus is also disclosed.
    Type: Grant
    Filed: July 5, 2001
    Date of Patent: July 13, 2004
    Assignee: Institute of Microelectronics
    Inventors: Quanbo Zou, Uppili Sridhar
  • Publication number: 20040056320
    Abstract: Microrelays and microrelay fabrication and operating methods providing a microrelay actuator positively controllable between a switch closed position and a switch open position. The microrelays are a five terminal device, two terminals forming the switch contacts, one terminal controlling the actuating voltage on an actuator conductive area, one terminal controlling the actuating voltage on a first fixed conductive area, and one terminal controlling the actuating voltage on a second fixed conductive area deflecting the actuator in an opposite direction than the first fixed conductive area. Providing the actuating voltages as zero average voltage square waves and their complement provides maximum actuating forces, and positive retention of the actuator in both actuator positions. Various fabrication techniques are disclosed.
    Type: Application
    Filed: August 22, 2003
    Publication date: March 25, 2004
    Inventors: Uppili Sridhar, Quanbo Zou
  • Patent number: 6662654
    Abstract: An accelerometer design is described. It operates by measuring a change in capacitance when one plate is fixed and one is mobile (free to accelerate). Unlike prior art designs where such changes are caused by variations in the plate separation distance, in the design of the present invention the plate separation distance is fixed, it being the effective plate area that changes with acceleration. A key feature is that the basic unit is a pair of capacitors. The fixed plates in each case are at the same relative height but the mobile plates are offset relative to the fixed plates, one mobile plate somewhat higher than its fixed plate with the other mobile plate being somewhat lower. Then, when the mobile plates move (in the same direction), one capacitor increases in value while the other decreases by the same amount. This differential design renders the device insensitive to sources of systematic error such as temperature changes. A process for manufacturing the design is described.
    Type: Grant
    Filed: April 8, 2003
    Date of Patent: December 16, 2003
    Assignee: Institute of Microelectronics
    Inventors: Yubo Miao, Ranganathan Nagarajan, Uppili Sridhar, Rakesh Kumar, Qinxin Zhang
  • Publication number: 20030218227
    Abstract: Design of a micro-mirror switching device and its fabrication in single crystal silicon are described. The device is composed of three main elements: silicon mirror plate with metal-mirror, secondary actuator, and hinge/spring mechanism to integrate the mirror plate with the actuator. p-n junction is first formed on p-type silicon. Trenches are then etched in n-silicon to define the device element boundaries and filled with silicon dioxide. Three layers of sacrificial oxide and two structural poly-silicon layers are deposited and patterned to form device elements. Novel release processes, consisting of backside electrochemical etching in potassium-hydroxide, reactive ion etching to expose oxide-filled trenches from the bottom, and hydrofluoric acid etching of sacrificial oxide layers and oxide in silicon trenches, form the silicon blocks; those that are not attached to structural poly-silicon are sacrificed and those that are attached are left in place to hold together the switching device elements.
    Type: Application
    Filed: May 23, 2002
    Publication date: November 27, 2003
    Applicant: Institute of Microelectronics.
    Inventors: Janak Singh, Uppili Sridhar, Ranganathan Nagarajan, Quanbo Zou
  • Publication number: 20030209076
    Abstract: An accelerometer design is described. It operates by measuring a change in capacitance when one plate is fixed and one is mobile (free to accelerate). Unlike prior art designs where such changes are caused by variations in the plate separation distance, in the design of the present invention the plate separation distance is fixed, it being the effective plate area that changes with acceleration. A key feature is that the basic unit is a pair of capacitors. The fixed plates in each case are at the same relative height but the mobile plates are offset relative to the fixed plates, one mobile plate somewhat higher than its fixed plate with the other mobile plate being somewhat lower. Then, when the mobile plates move (in the same direction), one capacitor increases in value while the other decreases by the same amount. This differential design renders the device insensitive to sources of systematic error such as temperature changes. A process for manufacturing the design is described.
    Type: Application
    Filed: April 8, 2003
    Publication date: November 13, 2003
    Applicant: Institute of microelectronics
    Inventors: Yubo Miao, Ranganathan Nagarajan, Uppili Sridhar, Rakesh Kumar, Qinxin Zhang
  • Patent number: 6621135
    Abstract: Microrelays and microrelay fabrication and operating methods providing a microrelay actuator positively controllable between a switch closed position and a switch open position. The microrelays are a five terminal device, two terminals forming the switch contacts, one terminal controlling the actuating voltage on an actuator conductive area, one terminal controlling the actuating voltage on a first fixed conductive area, and one terminal controlling the actuating voltage on a second fixed conductive area deflecting the actuator in an opposite direction than the first fixed conductive area. Providing the actuating voltages as zero average voltage square waves and their complement provides maximum actuating forces, and positive retention of the actuator in both actuator positions. Various fabrication techniques are disclosed.
    Type: Grant
    Filed: September 24, 2002
    Date of Patent: September 16, 2003
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Uppili Sridhar, Quanbo Zou
  • Patent number: 6573154
    Abstract: A process for fabricating an integrated circuit sensor/actuator is described. High aspect ratio deep silicon beams are formed by a process of deep trench etch and silicon undercut release etch by using oxide spacers to protect the silicon beam sidewalls during release etch. An oxide layer is then formed, followed by deposition of a controlled thickness of polysilicon which is then thermally oxidized. The polysilicon layer inside the trenches gets fully oxidized resulting in void-free trench isolation. This process creates a silicon island or beam on three sides leaving the third side for interfacing with the sensor/actuator beams. The sensor/actuator is formed by a similar process of deep trench etch and release etch process on the same substrate. These suspended beams of the sensors and actuators are bridged with the silicon islands from the fourth side. The above process finally results in suspended silicon beams connected to electrically isolated silicon islands.
    Type: Grant
    Filed: October 26, 2000
    Date of Patent: June 3, 2003
    Assignee: Institute of Microelectronics
    Inventors: Uppili Sridhar, Ranganathan Nagarajan, Yu Bo Miao, Yi Su
  • Patent number: 6571628
    Abstract: An accelerometer design is described. It operates by measuring a change in capacitance when one plate is fixed and one is mobile (free to accelerate). Unlike prior art designs where such changes are caused by variations in the plate separation distance, in the design of the present invention the plate separation distance is fixed, it being the effective plate area that changes with acceleration. A key feature is that the basic unit is a pair of capacitors. The fixed plates in each case are at the same relative height but the mobile plates are offset relative to the fixed plates, one mobile plate somewhat higher than its fixed plate with the other mobile plate being somewhat lower. Then, when the mobile plates move (in the same direction), one capacitor increases in value while the other decreases by the same amount. This differential design renders the device insensitive to sources of systematic error such as temperature changes. A process for manufacturing the design is described.
    Type: Grant
    Filed: October 16, 2000
    Date of Patent: June 3, 2003
    Assignee: Institute of Microelectronics
    Inventors: Yubo Miao, Ranganathan Nagarajan, Uppili Sridhar, Rakesh Kumar, Zhang Qingxin
  • Publication number: 20030071325
    Abstract: The invention relates to a method of making an integrated circuit inductor that comprises a silicon substrate and an oxide layer on the silicon substrate. In one aspect, the method comprises depositing an inductive loop on the oxide layer, and making a plurality of apertures in the oxide layer beneath the inductive loop. The method also comprises providing a plurality of bridges adjacent the apertures and provided by portions of the oxide layer between an inner region within the inductive loop and an outer region of the oxide layer without the inductive loop, the inductive loop being supported on the bridges. The method comprises forming a trench in the silicon substrate beneath the bridges, to provide an air gap between the inductive loop and the silicon substrate.
    Type: Application
    Filed: November 14, 2002
    Publication date: April 17, 2003
    Inventors: Shuming Xu, Han Hua Feng, Pang Dow Foo, Bai Xu, Uppili Sridhar
  • Patent number: 6521447
    Abstract: The invention describes a thermal cycler which permits simultaneous treatment of multiple individual samples in independent thermal protocols, so as to implement large numbers of DNA experiments simultaneously in a short time. The chamber is thermally isolated from its surroundings, heat flow in and out of the unit being limited to one or two specific heat transfer areas. All heating elements are located within these transfer areas and at least one temperature sensor per heating element is positioned close by. Fluid bearing channels that facilitate sending fluid into, and removing fluid from, the chamber are provided. The chambers may be manufactured as integrated arrays to form units in which each cycler chamber has independent temperature and fluid flow control. Two embodiments of the invention are described together with a process for manufacturing them.
    Type: Grant
    Filed: July 3, 2002
    Date of Patent: February 18, 2003
    Assignee: Institute of Microelectronics
    Inventors: Quanbo Zou, Uppili Sridhar, Yu Chen, Tit Meng Lim, Emmanuel Selvanayagam Zachariah, Tie Yan
  • Patent number: 6509186
    Abstract: The invention describes a thermal cycler which permits simultaneous treatment of multiple individual samples in independent thermal protocols, so as to implement large numbers of DNA experiments simultaneously in a short time. The chamber is thermally isolated from its surroundings, heat flow in and out of the unit being limited to one or two specific heat transfer areas. All heating elements are located within these transfer areas and at least one temperature sensor per heating element is positioned close by. Fluid bearing channels that facilitate sending fluid into, and removing fluid from, the chamber are provided. The chambers may be manufactured as integrated arrays to form units in which each cycler chamber has independent temperature and fluid flow control. Two embodiments of the invention are described together with a process for manufacturing them as well as two schemes for making connections to the outside world.
    Type: Grant
    Filed: May 1, 2001
    Date of Patent: January 21, 2003
    Assignee: Institute of Microelectronics
    Inventors: Quanbo Zou, Uppili Sridhar, Yu Chen, Tit Meng Lim, Emmanuel Selvanayagam Zachariah, Tie Yan
  • Publication number: 20030008286
    Abstract: It is often desirable to be able to perform an array of micro-chemical reactions simultaneously but with each reaction proceeding at a different temperature and/or for a different time. A classic example is the polymerase chain reaction associated with DNA analysis. In the present invention, this is achieved by means of an apparatus made up of a chip of plastic, or similar low cost material, containing an array of reaction chambers. After all chambers have been filled with reagents, the chip is pressed up against a substrate, typically a printed circuit board, there being a set of temperature balancing blocks between the chip and the substrate. Individually controlled heaters and sensors located between the blocks and the substrate allow each chamber to follow its own individual thermal protocol while being well thermally isolated from all other chambers and the substrate. The latter rests on a large heat sink to avoid temperature drift over time. A process for manufacturing the apparatus is also disclosed.
    Type: Application
    Filed: July 5, 2001
    Publication date: January 9, 2003
    Applicant: Institute of Microelectronics
    Inventors: Quanbo Zou, Uppili Sridhar
  • Patent number: 6503847
    Abstract: A method of forming bonds between similar and dissimilar material surfaces particularly the surfaces of silicon wafers having various devices disposes thereon, wherein such bonds can be formed at room temperature and do not require the application of high pressures or voltages. The bonding material is polydimethylsiloxane, which is transparent and bio-compatible.
    Type: Grant
    Filed: April 26, 2001
    Date of Patent: January 7, 2003
    Assignee: Institute of Microelectronics
    Inventors: Yu Chen, Quanbo Zou, Uppili Sridhar, Pang Dow Foo