Abstract: To form a semiconductor device, an insulating layer is formed over a conductive region and a pattern transfer layer is formed over the insulating layer. The pattern transfer layer is patterned in the reverse tone of a layout of recesses to be formed in the insulating layer such that the pattern transfer layer remains over regions where the recesses are to be formed. A mask material is formed over the insulating layer and is aligned with the pattern transfer layer. Remaining portions of the pattern transfer layer are removed and recesses are etched in the insulating layer using the mask material as a mask.

Abstract: Lithography masks and methods of manufacture thereof are disclosed. A preferred embodiment includes a method of generating an assist feature of a lithography mask. The method includes providing a layout for a material layer of a semiconductor device, the layout including a pattern for at least one feature of the semiconductor device. The method includes forming an assist feature in the pattern for the at least one feature, wherein the assist feature extends completely through the pattern for the at least one feature.

Abstract: Lithography masks and methods of lithography for manufacturing semiconductor devices are disclosed. Forbidden pitches are circumvented by dividing a main feature into a set of two or more sub-features. The sum of the widths of the sub-features and the spaces between the sub-features is substantially equal to the width of the main feature. The set of two or more sub-features comprise a plurality of different distances between an adjacent set of two or more sub-features. At least one of the plurality of distances comprises a pitch that is resolvable by the lithography system, resulting in increased resolution for the main features, improved critical dimension (CD) control, and increased process windows.

Abstract: Lithography masks, lithography systems, methods of manufacturing lithography masks, methods of altering material layers of semiconductor devices, and methods of manufacturing semiconductor devices are disclosed. In one embodiment, a lithography mask includes a first pattern for at least one material layer of at least one die, the first pattern being oriented in a first position. The lithography mask includes a second pattern for at least one material layer of the at least one die, the second pattern being oriented in a second position. The second position is different than the first position.

Abstract: Semiconductor devices, methods of manufacturing thereof, and methods of arranging circuit components of an integrated circuit are disclosed. In one embodiment, a semiconductor device includes an array of a plurality of devices arranged in a plurality of rows. At least one radio frequency (RF) circuit or a portion thereof is disposed in at least one of the plurality of rows of the array of the plurality of devices.

Abstract: To form a semiconductor device, an insulating layer is formed over a conductive region and a pattern transfer layer is formed over the insulating layer. The pattern transfer layer is patterned in the reverse tone of a layout of recesses to be formed in the insulating layer such that the pattern transfer layer remains over regions where the recesses are to be formed. A mask material is formed over the insulating layer and is aligned with the pattern transfer layer. Remaining portions of the pattern transfer layer are removed and recesses are etched in the insulating layer using the mask material as a mask.

Abstract: Lithography masks and methods of manufacture thereof are disclosed. A preferred embodiment includes a method of generating an assist feature of a lithography mask. The method includes providing a layout for a material layer of a semiconductor device, the layout including a pattern for at least one feature of the semiconductor device. The method includes forming an assist feature in the pattern for the at least one feature, wherein the assist feature extends completely through the pattern for the at least one feature.

Abstract: To form a semiconductor device, an insulating layer is formed over a conductive region and a pattern transfer layer is formed over the insulating layer. The pattern transfer layer is patterned in the reverse tone of a layout of recesses to be formed in the insulating layer such that the pattern transfer layer remains over regions where the recesses are to be formed. A mask material is formed over the insulating layer and is aligned with the pattern transfer layer. Remaining portions of the pattern transfer layer are removed and recesses are etched in the insulating layer using the mask material as a mask.

Abstract: Lithography masks and methods of manufacture thereof are disclosed. A preferred embodiment includes a method of generating an assist feature of a lithography mask. The method includes providing a layout for a material layer of a semiconductor device, the layout including a pattern for at least one feature of the semiconductor device. The method includes forming an assist feature in the pattern for the at least one feature, wherein the assist feature extends completely through the pattern for the at least one feature.

Abstract: A method for etching a pattern on a surface is disclosed. A mask layer is disposed over a surface and a resist is disposed over the mask layer. The resist is exposed to light through the mask exposing primary pattern and sidelobe regions. The resist is developed and the mask layer is etched according to the resist pattern. A first material is deposited over the mask layer, wherein a gap is formed beneath the material and over the primary pattern region. The material is etched back so that the gap is exposed, and the primary pattern region is etched using the first material as a mask.

Abstract: Semiconductor devices, methods of manufacturing thereof, and methods of arranging circuit components of an integrated circuit are disclosed. In one embodiment, a semiconductor device includes an array of a plurality of devices arranged in a plurality of rows. At least one radio frequency (RF) circuit or a portion thereof is disposed in at least one of the plurality of rows of the array of the plurality of devices.

Abstract: Semiconductor devices, methods of manufacturing thereof, and methods of arranging circuit components of an integrated circuit are disclosed. In one embodiment, a semiconductor device includes an array of a plurality of devices arranged in a plurality of rows. At least one electrostatic discharge (ESD) protection circuit or a portion thereof is disposed in at least one of the plurality of rows of the array of the plurality of devices.

Abstract: Illumination sources, lithography systems, and methods of processing and fabricating semiconductor devices are disclosed. In a preferred embodiment, an illumination source includes a first aperture type generator and at least one second aperture type generator. The illumination source is adapted to emit energy simultaneously from the first aperture type generator and the at least one second aperture type generator.

Abstract: A lithographic mask having a mask substrate (3) and a patterned mask layer (4) which includes mask structures (5) and can be transferred by lithography to a further substrate is disclosed. With masks of this type, it is customary for a protective layer to be provided in the form of a membrane positioned at a distance from the mask layer (4), in order to keep impurity particles or other impurities away from the focal plane of the mask layer (4). According to the invention, the protective layer (6) is applied in liquid form directly to the mask structures (5) and fills up spaces between the mask structures (4). Then, the protective layer (6), while it is still in the liquid state, is covered with a plane-parallel plate. The continuously dense protective layer (6) which is formed in accordance with the invention is even more reliable in preventing impurity particles or impurities (20) from penetrating into spacers between the structures (5) of the mask layer (4).

Abstract: Lithography masks and methods of manufacture thereof are disclosed. A preferred embodiment includes a method of generating an assist feature of a lithography mask. The method includes providing a layout for a material layer of a semiconductor device, the layout including a pattern for at least one feature of the semiconductor device. The method includes forming an assist feature in the pattern for the at least one feature, wherein the assist feature extends completely through the pattern for the at least one feature.

Abstract: A memory cell includes diffusion regions formed in a substrate. Each of the diffusion regions extends along a vertical direction in a layout view at a substrate level. A first gate electrode structure at a gate electrode level is generally dogleg shaped. The first gate electrode structure extends in an oblique direction, turns to a horizontal direction, extends over and crosses the diffusion regions in the horizontal direction. A first contact structure at a contact level is generally rectangular shaped in the layout view of the cell. The first contact structure electrically connects a first source/drain region of the first diffusion region to the first gate electrode structure and the first source/drain region of the second diffusion region. The first contact structure extends from the first source/drain region of the first diffusion region to the first source/drain region of the second diffusion region at the contact level.

Abstract: An SRAM includes an SRAM cell with a semiconductor substrate material, and a capacitor. The capacitor includes a first electrode adjacent the substrate material, a thin oxide adjacent the first electrode and a second electrode adjacent the thin oxide.

Abstract: In order to form a contact in a layer on a substrate, in particular a contact in a logic circuit in a semiconductor component, the mask layer is structured for etching of the contact holes with a photoresist layer which is exposed using two masks, with the first mask containing a regular pattern of contact structures with a period which corresponds to the order of magnitude of twice the edge length of the contact hole, and with the second mask containing a pattern with a structure which surrounds at least the contact hole area, and thus covers it.

Abstract: A method for printing contacts utilizes photolithographic pattern reversal. A negative of the contact is printed on a resist layer. Unexposed portions of the resist layer are stripped to expose a first layer. The first layer is etched to remove exposed portions of the first layer not covered by the negative of the contact and to expose a second layer. A pattern reversal is performed to cure exposed portions of the second layer not covered by the first layer.

Abstract: A method of forming isolated features of semiconductor devices is disclosed. A first hard mask is deposited over a material layer to be patterned, and a second hard mask is deposited over the first hard mask. The second hard mask is patterned with a pattern for an array of features using an off-axis lithography method. A portion of the pattern for the array of features is transferred to the first hard mask. The first hard mask is then used as a mask to pattern the material layer.