Patents by Inventor Uwe Seidel

Uwe Seidel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145253
    Abstract: A device includes a thinned semiconductor substrate having a first side and a second side opposite to the first side; and at least one radio frequency device at the first side, wherein the second side of the thinned semiconductor substrate is processed to reduce leakage currents or to improve a radio frequency linearity of the at least one radio frequency device through Bosch etchin
    Type: Application
    Filed: January 9, 2024
    Publication date: May 2, 2024
    Inventors: Hans Taddiken, Christian Butschkow, Andrea Cattaneo, Henning Feick, Dominik Heiss, Christoph Kadow, Uwe Seidel, Valentyn Solomko, Anton Steltenpohl
  • Patent number: 11948802
    Abstract: A device includes a thinned semiconductor substrate having a first side and a second side opposite to the first side; and at least one radio frequency device at the first side, wherein the second side of the thinned semiconductor substrate is processed to reduce leakage currents or to improve a radio frequency linearity of the at least one radio frequency device through Bosch etching.
    Type: Grant
    Filed: December 22, 2021
    Date of Patent: April 2, 2024
    Assignee: Infineon Technologies Dresden GmbH & Co. KG
    Inventors: Hans Taddiken, Christian Butschkow, Andrea Cattaneo, Henning Feick, Dominik Heiss, Christoph Kadow, Uwe Seidel, Valentyn Solomko, Anton Steltenpohl
  • Patent number: 11938528
    Abstract: A method ascertains control variables for active profile and flatness control elements for at least one rolling stand for hot rolling metal strip with a plurality of i=1 . . . I successive passes and for ascertaining profile and center flatness values for the hot-rolled metal strip. The occurrence of fluctuations in the center flatness of the metal strip after the individual passes and the resulting disadvantages for the rolling stability and the product quality are prevented. The method provides that, also for the target center flatness of the metal strip after a predetermined pass k with i=1 . . . <k< . . . I and for the target center flatness after the subsequent passes, pass-specific interval ranges are also specified in each case, and in that the successive calculation of the control variables and profile values is then carried out taking into account such additional specifications as well.
    Type: Grant
    Filed: July 18, 2019
    Date of Patent: March 26, 2024
    Assignee: SMS group GmbH
    Inventors: Jürgen Seidel, Uwe Baumgärtel, Ralf Wachsmann, Peter Bonekemper
  • Publication number: 20240092742
    Abstract: The present invention relates to reagents which are suitable to be used in mass spectrometry as well as methods of mass spectrometric determination of analyte molecules using said reagents.
    Type: Application
    Filed: November 2, 2023
    Publication date: March 21, 2024
    Inventors: Dieter Heindl, Hans-Peter Josel, Uwe Kobold, Christoph Seidel, Martin Rempt, Andreas Leinenbach, Giuseppe Prencipe, Silvia Baecher, Simon Ferdinand Loibl, Anna-Skrollan Geiermann, Jelena Milic, Nicole Pirkl
  • Publication number: 20230187298
    Abstract: A package includes: an electronic component that includes a dielectric layer as a base and a semiconductor die attached on top of the dielectric layer, the semiconductor die having an active area with monolithically integrated circuit elements; and an encapsulant encapsulating the dielectric layer and the semiconductor die. The encapsulant is a mold compound having different material properties than the dielectric layer. A method of manufacturing package is also described.
    Type: Application
    Filed: February 9, 2023
    Publication date: June 15, 2023
    Inventors: Daniel Porwol, Thomas Fischer, Uwe Seidel, Anton Steltenpohl
  • Patent number: 11605572
    Abstract: An electronic component includes a mold layer and a semiconductor die including a low ohmic first portion and a high ohmic second portion. The low ohmic first portion has an active area. The high ohmic second portion is arranged on the mold layer.
    Type: Grant
    Filed: April 22, 2021
    Date of Patent: March 14, 2023
    Assignee: Infineon Technologies AG
    Inventors: Daniel Porwol, Thomas Fischer, Uwe Seidel, Anton Steltenpohl
  • Publication number: 20220115499
    Abstract: A device includes a thinned semiconductor substrate having a first side and a second side opposite to the first side; and at least one radio frequency device at the first side, wherein the second side of the thinned semiconductor substrate is processed to reduce leakage currents or to improve a radio frequency linearity of the at least one radio frequency device through Bosch etching.
    Type: Application
    Filed: December 22, 2021
    Publication date: April 14, 2022
    Inventors: Hans Taddiken, Christian Butschkow, Andrea Cattaneo, Henning Feick, Dominik Heiss, Christoph Kadow, Uwe Seidel, Valentyn Solomko, Anton Steltenpohl
  • Patent number: 11217453
    Abstract: A method includes providing a semiconductor substrate having a first side and a second side opposite to the first side, forming at least one radio frequency device at the first side; thinning the semiconductor substrate from the second side; and processing the second side of the thinned semiconductor substrate to reduce leakage currents or to improve a radio frequency linearity of the at least one radio frequency device.
    Type: Grant
    Filed: June 17, 2020
    Date of Patent: January 4, 2022
    Assignee: INFINEON TECHNOLOGIES DRESDEN GMBH & CO. KG
    Inventors: Hans Taddiken, Christian Butschkow, Andrea Cattaneo, Henning Feick, Dominik Heiss, Christoph Kadow, Uwe Seidel, Valentyn Solomko, Anton Steltenpohl
  • Publication number: 20210335687
    Abstract: An electronic component includes a mold layer and a semiconductor die including a low ohmic first portion and a high ohmic second portion. The low ohmic first portion has an active area. The high ohmic second portion is arranged on the mold layer.
    Type: Application
    Filed: April 22, 2021
    Publication date: October 28, 2021
    Inventors: Daniel Porwol, Thomas Fischer, Uwe Seidel, Anton Steltenpohl
  • Publication number: 20210043497
    Abstract: A method includes providing a semiconductor substrate having a first side and a second side opposite to the first side, forming at least one radio frequency device at the first side; thinning the semiconductor substrate from the second side; and processing the second side of the thinned semiconductor substrate to reduce leakage currents or to improve a radio frequency linearity of the at least one radio frequency device.
    Type: Application
    Filed: June 17, 2020
    Publication date: February 11, 2021
    Inventors: Hans Taddiken, Christian Butschkow, Andrea Cattaneo, Henning Feick, Dominik Heiss, Christoph Kadow, Uwe Seidel, Valentyn Solomko, Anton Steltenpohl
  • Patent number: 10800201
    Abstract: A security object has a document body. A lens array is formed on a top side and first information is stored in the document body. The optical detectability of the first information through the lens array is dependent on a detection direction. The document body has a top view section, in which the document body has a material layer that is translucent or opaque, and adjacent thereto a window section, in which the document body is formed of a material transparent in volume between a top side and a bottom side. The lens array extends over part of the window section and over part of the top view section and spans a section boundary between the sections. The first information also is formed partially in the top view section and partially in the window section and, in the window section, laser-marked, static second information is stored in the document body.
    Type: Grant
    Filed: March 3, 2017
    Date of Patent: October 13, 2020
    Assignees: Bundesdruckerei GmbH, Bundesrepublik Deutschland, vertreten durch das Bundesministerium des Innern, vertreten durch das Bundeskriminalamt
    Inventors: Simone Zernicek, Andreas Bosien, Michael Knebel, Andre Leopold, Uwe Seidel, Ulrich Schneider
  • Patent number: 10615029
    Abstract: A method for manufacturing a device includes: providing a semiconductor substrate having an RF-device; providing a BEOL-layer stack on the first main surface of the semiconductor substrate; attaching a carrier structure to a first main surface of the BEOL-layer stack; removing a lateral portion of the semiconductor substrate which laterally adjoins the device region to expose a lateral portion of the second main surface of the BEOL-layer stack; and opening a contacting region of the BEOL-layer stack at the lateral portion of second main surface of the BEOL-layer stack.
    Type: Grant
    Filed: July 24, 2018
    Date of Patent: April 7, 2020
    Assignee: Infineon Technologies AG
    Inventors: Christoph Kadow, Uwe Seidel
  • Publication number: 20190283482
    Abstract: A security object has a document body. A lens array is formed on a top side and first information is stored in the document body. The optical detectability of the first information through the lens array is dependent on a detection direction. The document body has a top view section, in which the document body has a material layer that is translucent or opaque, and adjacent thereto a window section, in which the document body is formed of a material transparent in volume between a top side and a bottom side. The lens array extends over part of the window section and over part of the top view section and spans a section boundary between the sections. The first information also is formed partially in the top view section and partially in the window section and, in the window section, laser-marked, static second information is stored in the document body.
    Type: Application
    Filed: March 3, 2017
    Publication date: September 19, 2019
    Applicants: BUNDESDRUCKEREI GMBH, BUNDESREPUBLIK DEUTSCHLAND, VETRETEN DURCH DAS BUNDESMINISTERIUM DES INNERN, VERTR. D. DAS BUNDES
    Inventors: SIMONE ZERNICEK, ANDREAS BOSIEN, MICHAEL KNEBEL, ANDRE LEOPOLD, UWE SEIDEL, ULRICH SCHNEIDER
  • Publication number: 20190043716
    Abstract: A method for manufacturing a device includes: providing a semiconductor substrate having an RF-device; providing a BEOL-layer stack on the first main surface of the semiconductor substrate; attaching a carrier structure to a first main surface of the BEOL-layer stack; removing a lateral portion of the semiconductor substrate which laterally adjoins the device region to expose a lateral portion of the second main surface of the BEOL-layer stack; and opening a contacting region of the BEOL-layer stack at the lateral portion of second main surface of the BEOL-layer stack.
    Type: Application
    Filed: July 24, 2018
    Publication date: February 7, 2019
    Inventors: Christoph Kadow, Uwe Seidel
  • Patent number: 9659877
    Abstract: One aspect of the invention relates to a shielding device for shielding from electromagnetic radiation, including a shielding base element, a shielding cover element and a shielding lateral element for electrically connecting the base element to the cover element in such that a circuit part to be shielded is arranged within the shielding elements. Since at least one partial section of the shielding elements includes a semiconductor material, a shielding device can be realized completely and cost-effectively in an integrated circuit.
    Type: Grant
    Filed: August 15, 2013
    Date of Patent: May 23, 2017
    Assignee: Infineon Technologies AG
    Inventors: Winfried Bakalski, Bernd Eisener, Uwe Seidel, Markus Zannoth
  • Patent number: 9165828
    Abstract: A semiconductor device comprises a semiconductor substrate, an anorganic isolation layer on the semiconductor substrate and a metallization layer on the anorganic isolation layer. The metallization layer comprises a fuse structure. At least in an area of the fuse structure the metallization layer and the anorganic isolation layer have a common interface.
    Type: Grant
    Filed: January 13, 2014
    Date of Patent: October 20, 2015
    Assignee: Infineon Technologies AG
    Inventors: Gabriele Bettineschi, Uwe Seidel, Wolfgang Walter, Michael Schrenk, Hubert Werthmann
  • Patent number: 9159620
    Abstract: One or more embodiments relate to a method for making a semiconductor structure, comprising: providing a substrate; forming a dielectric layer over the substrate; forming a first opening and a second opening at least partially simultaneously through the dielectric layer over the substrate; and forming a third opening through the bottom surface of the first opening and into at least a portion of the substrate.
    Type: Grant
    Filed: September 2, 2014
    Date of Patent: October 13, 2015
    Assignee: Infineon Technologies AG
    Inventors: Gunther Mackh, Uwe Seidel, Rainer Leuschner
  • Publication number: 20150017801
    Abstract: One or more embodiments relate to a method for making a semiconductor structure, comprising: providing a substrate; forming a dielectric layer over the substrate; forming a first opening and a second opening at least partially simultaneously through the dielectric layer over the substrate; and forming a third opening through the bottom surface of the first opening and into at least a portion of the substrate.
    Type: Application
    Filed: September 2, 2014
    Publication date: January 15, 2015
    Inventors: Gunther MACKH, Uwe SEIDEL, Rainer LEUSCHNER
  • Patent number: 8822329
    Abstract: One or more embodiments relate to a method for making a semiconductor structure, the method including: forming a first conductive interconnect at least partially through the substrate; and forming a second conductive interconnect over the substrate, wherein the first conductive interconnect and the second conductive interconnect are formed at least partially simultaneously.
    Type: Grant
    Filed: September 28, 2009
    Date of Patent: September 2, 2014
    Assignee: Infineon Technologies AG
    Inventors: Rainer Leuschner, Gunther Mackh, Uwe Seidel
  • Patent number: 8815743
    Abstract: A structure and method of forming through substrate vias in forming semiconductor components are described. In one embodiment, the invention describes a method of forming the through substrate via by filling an opening with a first fill material and depositing a first insulating layer over the first fill material, the first insulating layer not being deposited on sidewalls of the fill material in the opening, wherein sidewalls of the first insulating layer form a gap over the opening. The method further includes forming a void by sealing the opening using a second insulating layer.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: August 26, 2014
    Assignee: Infineon Technologies AG
    Inventors: Albert Birner, Uwe Hoeckele, Thomas Kunstmann, Uwe Seidel