Abstract: A state machine and an external interface, including its associated input-outputs (IOs), are always powered on and used to manage the chip power modes and power mode transitions. The chip power modes are defined as RUN, HIBERNATE, POWERDOWN, with many more possible with this invention. For example, once the device is in HIBERNATE or POWERDOWN modes, the power supplies to the IC are either reduced, or completely disconnected except for this controller state machine. This invention's state machine and control mechanism, in response to some external “wake up event”, will bring the chip to RUN mode by managing the state of the external power supplies through its control interface. The implementation achieves small die size and extreme low power consumption.

Abstract: An RFIC includes an RF section, a memory interface, a display interface, an audio codec, a bus matrix, and a processing unit. The RF section converts a first inbound RF signal into a first inbound symbol stream and converts a second inbound RF signal into a second inbound symbol stream. The memory interface is operably coupled to retrieve a video file from memory and the display interface is operable to provide video data to a display. The audio codec converts an output digital signal into an output voice signal. The processing unit converts the first inbound symbol stream into streaming video data; converts the second inbound symbol stream into the output digital signal; and facilitates providing, via the bus matrix, at least one of: the video file to the display interface as the video data; the streaming video data to the display interface as the video data; and the digital output signal to the audio codec.

Abstract: An integrated circuit (IC) includes at least one baseband section, at least one radio frequency (RF) section, and an interface module. The interface module is configured to couple the at least one baseband section to the at least one RF section, wherein the interface module includes an analog interface module and a digital interface module.

Abstract: An integrated circuit (IC) includes a first processing module that converts inbound data into an inbound digital audio signal and converts an outbound digital audio signal into outbound data. A second processing module performs a user application that includes at least one of generating of an inbound analog audio signal and generating an outbound analog audio signal. A third processing module performs an operating system algorithm to coordinate operation of at least one user application.

Abstract: A Voice-Data-RF IC includes a baseband processing module, an RF section, and an interface module. The baseband processing module converts an outbound voice signal into an outbound voice symbol stream, converts an inbound voice symbol stream into an inbound voice signal, converts outbound data into an outbound data symbol stream, and converts an inbound data symbol stream into inbound data. The interface module provides selective coupling between the baseband processing module, the RF section, and with off-chip circuits.

Abstract: A Voice-Data-RF IC includes a baseband processing module, an RF section, and an interface module. The baseband processing module converts an outbound voice signal into an outbound voice symbol stream, converts an inbound voice symbol stream into an inbound voice signal, converts outbound data into an outbound data symbol stream, and converts an inbound data symbol stream into inbound data. The RF section converts an inbound RF voice signal into the inbound voice symbol stream, converts the outbound voice symbol stream into an outbound RF voice signal, converts an inbound RF data signal into the inbound data symbol stream, and converts the outbound data symbol stream into an outbound RF data signal. The interface module provides coupling between the baseband processing module, the RF section, and with off-chip circuits.

Abstract: An integrated circuit (IC) includes a first processing module that converts inbound data into an inbound digital audio signal and converts an outbound digital audio signal into outbound data. A second processing module performs a user application that includes at least one of generating of an inbound analog audio signal and generating an outbound analog audio signal. A third processing module performs an operating system algorithm to coordinate operation of at least one user application.

Abstract: An integrated circuit (IC) includes at least one baseband section, at least one radio frequency (RF) section, and an interface module. The interface module is configured to couple the at least one baseband section to the at least one RF section, wherein the interface module includes an analog interface module and a digital interface module.

Abstract: A communication device includes a memory module that stores a plurality of applications corresponding to a plurality of uses of the communication device. A processing module executes a selected one of the plurality of applications and selects one of a plurality of power modes based on a current one of the plurality of uses of the communication device corresponding to the selected one of the plurality of applications. The processing module generates a power mode signal based on the selected one of the plurality of power modes. A power management circuit receives the power mode signal and that generates a plurality of power supply signals based on the power mode signal.

Abstract: An integrated circuit (IC) includes at least one baseband section, at least one radio frequency (RF) section, and an interface module. The interface module is operable to couple the at least one baseband section to the at least one RF section, wherein the interface module includes an analog interface module and a digital interface module.

Abstract: An integrated circuit (IC) includes an RF section, a DSP, and a plurality of processors. The RF section and the DSP process an inbound RF signal to produce inbound data and process outbound data to produce an outbound RF signal. In addition, the DSP converts an outbound analog audio signal into an outbound digital audio signal and converts an inbound digital audio signal into an inbound analog audio signal. A first processor converts the inbound data into the inbound digital audio signal and converts the outbound digital audio signal into the outbound data. A second processor performs a user application that includes at least one of generation of the inbound analog audio signal and generation of the outbound analog audio signal and performs an operating system algorithm to coordinate operation of the user application.

Abstract: A Voice-Data-RF IC includes a baseband processing module, an RF section, and an interface module. The baseband processing module converts an outbound voice signal into an outbound voice symbol stream, converts an inbound voice symbol stream into an inbound voice signal, converts outbound data into an outbound data symbol stream, and converts an inbound data symbol stream into inbound data. The RF section converts an inbound RF voice signal into the inbound voice symbol stream, converts the outbound voice symbol stream into an outbound RF voice signal, converts an inbound RF data signal into the inbound data symbol stream, and converts the outbound data symbol stream into an outbound RF data signal. The interface module provides coupling between the baseband processing module, the RF section, and with off-chip circuits.

Abstract: An adjustable antenna interface includes a single-ended to differential conversion circuit, an adjustable impedance matching circuit, an RF differential switch, and an input. The single-ended to differential conversion circuit converts inbound RF signals from single-ended signals to differential signals and converts outbound RF signals from differential signals to single-ended signals. The adjustable impedance matching circuit provides an impedance based on an impedance control signal. The RF differential switch provides the differential outbound RF signals from the IC to the single-ended to differential conversion circuit in accordance with a first antenna control signal and provides the differential inbound RF signals from the single-ended to differential conversion circuit to the IC in accordance with a second antenna control signal. The input receives the first antenna control signal, the second antenna control signal, and the impedance control signal from the IC.

Abstract: A system and method for regulating power consumption within an integrated circuit (IC) with a modular design. The IC is designed so that any one distinct functional module within the IC utilizes only transistors with a substantially same or similar critical voltage level, which may for example be the threshold voltage of the transistors. Consequently, the supply voltage delivered to each functional modules can be lowered to the minimum voltage necessary to enable the transistors within the module to operate. Similarly, modules within the IC may be designed with transistors which share a common value for a substrate bias voltage or a clock speed, or with a combination of common values for several electrical factors. In this way, it is possible to reduce power consumption by fine-tuning the voltages supplied to (or clock speeds driving) specific modules, in a way which is custom-tuned to each module.

Abstract: A communication device includes a memory module that stores a plurality of applications corresponding to a plurality of uses of the communication device. A processing module executes a selected one of the plurality of applications and selects one of a plurality of power modes based on a current one of the plurality of uses of the communication device corresponding to the selected one of the plurality of applications. The processing module generates a power mode signal based on the selected one of the plurality of power modes. A power management circuit receives the power mode signal and that generates a plurality of power supply signals based on the power mode signal.

Abstract: A radio frequency (RF) integrated circuit (IC) operable to support wireless communications is provided. The RF IC includes a plurality of processing modules wherein each processing module is operable to support one or more functions of the RF IC, and a plurality of power islands. Each power island is associated with one or more functions of the RF IC. Each of the power islands, through the function association, is operable to supply power for the processing modules accordingly. Power consumption by the RF IC may be reduced or secured when the one or more functions associated with the power island is not required.

Abstract: A communication device includes a voice data and RF integrated circuit (IC) that includes a memory module that stores a plurality of applications corresponding to a plurality of uses of the communication device. A processing module executes a selected one of the plurality of applications and selects one of a plurality of power modes based on a current one of the plurality of uses of the communication device corresponding to the selected one of the plurality of applications. The processing module generates a power mode signal based on the selected one of the plurality of power modes. An off-chip power management circuit receives the power mode signal and that generates a plurality of power supply signals to the voice data and RF IC based on the power mode signal.

Abstract: An integrated circuit (IC) includes an RF section, a DSP, and a plurality of processors. The RF section and the DSP process an inbound RF signal to produce inbound data and process outbound data to produce an outbound RF signal. In addition, the DSP converts an outbound analog audio signal into an outbound digital audio signal and converts an inbound digital audio signal into an inbound analog audio signal. A first processor converts the inbound data into the inbound digital audio signal and converts the outbound digital audio signal into the outbound data. A second processor performs a user application that includes at least one of generation of the inbound analog audio signal and generation of the outbound analog audio signal and performs an operating system algorithm to coordinate operation of the user application.

Abstract: A high-speed, low leakage-power Standard Cell Library is provided. The high-speed, low-leakage-power Standard Cell Library provides the extra drive-strength of a taller X-Track library (e.g., 14-Track library) and low leakage-power comparable to that of a smaller, N-Track library (e.g., 10-Track library). The high-speed, low leakage-power Standard Cell Library includes a set of cells each having a device area designed to provide maximum drive strength for the cell. The high-speed, low leakage-power Standard Cell Library further includes a second set of cells having varying device areas that provide reduced leakage power characteristics comparable to cells in the smaller, N-Track library. The modified reduced leakage-power cells are formed by adding padding to the cell to achieve a desired leakage-power characteristic of the cell.

Abstract: A single chip wireless transceiver operable to perform voice, data and radio frequency (RF) processing is provided. This processing may be divided between various processing modules. This single chip includes a processing module having an ARM microprocessor and a digital signal processor (DSP), an RF section, and an interface module. The processing module converts an outbound voice signal into an outbound voice symbol stream, converts an inbound voice symbol stream into an inbound voice signal, converts outbound data into an outbound data symbol stream, and converts an inbound data symbol stream into inbound data. These functions may be divided between the ARM microprocessor and DSP, where the DSP supports physically layer type applications and the ARM microprocessor supports higher layer applications. Further bifurcation may be based on voice applications, data applications, and/or RF control.