Patents by Inventor Vaidyanathan Balasubramaniam
Vaidyanathan Balasubramaniam has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8252192Abstract: A method of pattern etching a thin film on a substrate is described. The method comprises preparing a film stack on a substrate, wherein the film stack comprises a dielectric layer formed on the substrate and a mask layer formed above the dielectric layer. A pattern is created in the mask layer, and the pattern is transferred from the mask layer to the dielectric layer by performing a plasma etching process. While transferring the pattern to the dielectric layer, the mask layer is substantially removed using the plasma etching process. The plasma etching process can use a process gas comprising a first gaseous component that etches the dielectric layer at a greater rate than the mask layer, and a second gaseous component that etches the dielectric layer at a lesser rate than the mask layer.Type: GrantFiled: March 26, 2009Date of Patent: August 28, 2012Assignee: Tokyo Electron LimitedInventors: Yao-Sheng Lee, Vaidyanathan Balasubramaniam, Masaru Nishino, Kelvin Zin
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Patent number: 8048325Abstract: A method for etching an organic anti-reflective coating (ARC) layer on a substrate in a plasma processing system comprising: introducing a process gas comprising ammonia (NH3), and a passivation gas; forming a plasma from the process gas; and exposing the substrate to the plasma. The process gas can, for example, constitute NH3 and a hydrocarbon gas such as at least one of C2H4, CH4, C2H2, C2H6, C3H4, C3H6, C3H8, C4H6, C4H8, C4H10, C5H8, C5H10, C6H6, C6H10, and C6H12. Additionally, the process chemistry can further comprise the addition of helium. The present invention further presents a method for forming a bilayer mask for etching a thin film on a substrate, wherein the method comprises: forming the thin film on the substrate; forming an ARC layer on the thin film; forming a photoresist pattern on the ARC layer; and transferring the photoresist pattern to the ARC layer with an etch process using a process gas comprising ammonia (NH3), and a passivation gas.Type: GrantFiled: January 7, 2008Date of Patent: November 1, 2011Assignee: Tokyo Electron LimitedInventors: Vaidyanathan Balasubramaniam, Koichiro Inazawa, Rie Inazawa, Rich Wise, Arpan Mahorawala, Siddhartha Panda
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Publication number: 20110237084Abstract: A method for etching a differential metal gate structure on a substrate is described. The differential metal gate structure includes a metal gate layer overlying a high dielectric constant (high-k) dielectric layer, wherein the metal gate layer comprises a different thickness at different regions on the substrate. The metal gate layer is patterned by using a plasma etching process, wherein at least one etch step includes forming plasma using a halogen-containing gas and at least one etch step includes forming plasma using an additive gas having as atomic constituents C, H, and F.Type: ApplicationFiled: March 23, 2010Publication date: September 29, 2011Applicant: TOKYO ELECTRON LIMITEDInventors: Vinh Hoang LUONG, Hiroyuki TAKAHASHI, Akiteru KO, Asao YAMASHITA, Vaidyanathan BALASUBRAMANIAM, Takashi ENOMOTO, Daniel J. PRAGER
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Patent number: 7998872Abstract: A method of dry developing a multi-layer mask having a silicon-containing anti-reflective coating (ARC) layer on a substrate is described. The method comprises forming the multi-layer mask on the substrate, wherein the multi-layer mask comprises a lithographic layer overlying the silicon-containing ARC layer. A feature pattern is then formed in the lithographic layer using a lithographic process, wherein the feature pattern comprises a first critical dimension (CD). Thereafter, the feature pattern is transferred from the lithographic layer to the silicon-containing ARC layer using a dry plasma etching process, wherein the first CD in the lithographic layer is reduced to a second CD in the silicon-containing layer and a first edge roughness is reduced to a second edge roughness in the silicon-containing ARC layer.Type: GrantFiled: February 6, 2008Date of Patent: August 16, 2011Assignee: Tokyo Electron LimitedInventors: Vinh Hoang Luong, Masaru Nishino, Vaidyanathan Balasubramaniam
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Publication number: 20100243604Abstract: A method of pattern etching a thin film on a substrate is described. The method comprises preparing a film stack on a substrate, wherein the film stack comprises a dielectric layer formed on the substrate and a mask layer formed above the dielectric layer. A pattern is created in the mask layer, and the pattern is transferred from the mask layer to the dielectric layer by performing a plasma etching process. While transferring the pattern to the dielectric layer, the mask layer is substantially removed using the plasma etching process. The plasma etching process can use a process gas comprising a first gaseous component that etches the dielectric layer at a greater rate than the mask layer, and a second gaseous component that etches the dielectric layer at a lesser rate than the mask layer.Type: ApplicationFiled: March 26, 2009Publication date: September 30, 2010Applicant: TOKYO ELECTRON LIMITEDInventors: Yao-Sheng LEE, Vaidyanathan BALASUBRAMANIAM, Masaru NISHINO, Kelvin ZIN
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Publication number: 20100216310Abstract: A method of dry developing an anti-reflective coating (ARC) layer on a substrate is described. The method comprises disposing a substrate comprising a multi-layer mask in a plasma processing system, wherein the multi-layer mask comprises a lithographic layer overlying a silicon-containing ARC layer and wherein the lithographic layer comprises a feature pattern formed therein using a lithographic process. The method further comprises: introducing a process gas to the plasma processing system according to a process recipe, the process gas comprising a nitrogen-containing gas, a hydrogen-containing gas, and a CxHyFz-containing gas, wherein x, y, and z are integers greater than or equal to unity; forming plasma from the process gas in the plasma processing system according to the process recipe; and exposing the substrate to the plasma in order to transfer the feature pattern in the lithographic layer to the underlying silicon-containing ARC layer.Type: ApplicationFiled: February 20, 2009Publication date: August 26, 2010Applicant: TOKYO ELECTRON LIMITEDInventors: Andrew W. METZ, Shuhei OGAWA, Vaidyanathan BALASUBRAMANIAM, Masaru NISHINO
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Patent number: 7767926Abstract: A method and system for the dry development of a multi-layer mask is described. A first passivation gas comprises as an incipient ingredient a hydrocarbon gas, while a second passivation gas comprises as an incipient ingredient an oxygen-containing gas.Type: GrantFiled: March 29, 2006Date of Patent: August 3, 2010Assignee: Tokyo Electron LimitedInventor: Vaidyanathan Balasubramaniam
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Patent number: 7759249Abstract: A method of using a post-etch treatment system for removing photoresist and etch residue formed during an etching process is described. For example, the etch residue can include halogen containing material. The post-etch treatment system comprises a vacuum chamber, a radical generation system coupled to the vacuum chamber, a radical gas distribution system coupled to the radical generation system and configured to distribute reactive radicals above a substrate, and a high temperature pedestal coupled to the vacuum chamber and configured to support the substrate. The method comprises introducing a NxOy based process gas to the radical generation system.Type: GrantFiled: March 28, 2006Date of Patent: July 20, 2010Assignee: Tokyo Electron LimitedInventor: Vaidyanathan Balasubramaniam
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Patent number: 7700494Abstract: A method is provided for low-pressure plasma ashing to remove photoresist remnants and etch residues that are formed during preceding plasma etching of dielectric layers. The ashing method uses a two-step plasma process involving an oxygen-containing gas, where low or zero bias is applied to the substrate in the first cleaning step to remove significant amount of photoresist remnants and etch residues from the substrate, in addition to etching and removing detrimental fluoro-carbon residues from the chamber surfaces. An increased bias is applied to the substrate in the second cleaning step to remove the remains of the photoresist and etch residues from the substrate. A chamber pressure less than 20 mTorr is utilized in the second cleaning step. The two-step process reduces the memory effect commonly observed in conventional one-step ashing processes. A method of endpoint detection can be used to monitor the ashing process.Type: GrantFiled: December 30, 2004Date of Patent: April 20, 2010Assignee: Tokyo Electron Limited, Inc.Inventors: Vaidyanathan Balasubramaniam, Masaaki Hagihara, Eiichi Nishimura, Koichiro Inazawa, Rie Inazawa, legal representative
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Patent number: 7595005Abstract: A method and apparatus for removing residue, such as etch reside, from a substrate with substantially reduced damage to the substrate in a plasma processing system is described. A plasma ashing process comprising carbon dioxide (CO2) and optionally a passivation gas, such as a hydrocarbon gas, i.e., CxHy, wherein x, y represent integers greater than or equal to unity, is used to remove residue while reducing damage to underlying dielectric layers. Additionally, the process chemistry can further comprise the addition of an inert gas, such as a Noble gas (i.e., He, Ne, Ar, Kr, Xe, Rn).Type: GrantFiled: December 11, 2006Date of Patent: September 29, 2009Assignee: Tokyo Electron LimitedInventor: Vaidyanathan Balasubramaniam
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Publication number: 20090197420Abstract: A method of dry developing a multi-layer mask having a silicon-containing anti-reflective coating (ARC) layer on a substrate is described. The method comprises forming the multi-layer mask on the substrate, wherein the multi-layer mask comprises a lithographic layer overlying the silicon-containing ARC layer. A feature pattern is then formed in the lithographic layer using a lithographic process, wherein the feature pattern comprises a first critical dimension (CD). Thereafter, the feature pattern is transferred from the lithographic layer to the silicon-containing ARC layer using a dry plasma etching process, wherein the first CD in the lithographic layer is reduced to a second CD in the silicon-containing layer and a first edge roughness is reduced to a second edge roughness in the silicon-containing ARC layer.Type: ApplicationFiled: February 6, 2008Publication date: August 6, 2009Applicant: TOKYO ELECTRON LIMITEDInventors: Vinh Hoang Luong, Masaru Nishino, Vaidyanathan Balasubramaniam
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Patent number: 7465673Abstract: A method for etching an organic anti-reflective coating (ARC) layer on a substrate in a plasma processing system comprising: introducing a process gas comprising nitrogen (N), hydrogen (H), and oxygen (O); forming a plasma from the process gas; and exposing the substrate to the plasma. The process gas can, for example, constitute an NH3/O2, N2/H2/O2, N2/H2/CO, NH3/CO, or NH3/CO/O2 based chemistry. Additionally, the process chemistry can further comprise the addition of helium. The present invention further presents a method for forming a bilayer mask for etching a thin film on a substrate, wherein the method comprises: forming the thin film on the substrate; forming an ARC layer on the thin film; forming a photoresist pattern on the ARC layer; and transferring the photoresist pattern to the ARC layer with an etch process using a process gas comprising nitrogen (N), hydrogen (H), and oxygen (O).Type: GrantFiled: December 17, 2003Date of Patent: December 16, 2008Assignee: Tokyo Electron LimitedInventors: Yoshiki Igarashi, Kouichiro Inazawa, Kimihiro Higuchi, Vaidyanathan Balasubramaniam, Eiichi Nishimura, Ralph Kim, Philip Sansone, Masaaki Hagihara
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Publication number: 20080135517Abstract: A method and apparatus for removing residue, such as etch reside, from a substrate with substantially reduced damage to the substrate in a plasma processing system is described. A plasma ashing process comprising carbon dioxide (CO2) and optionally a passivation gas, such as a hydrocarbon gas, i.e., CxHy, wherein x, y represent integers greater than or equal to unity, is used to remove residue while reducing damage to underlying dielectric layers. Additionally, the process chemistry can further comprise the addition of an inert gas, such as a Noble gas (i.e., He, Ne, Ar, Kr, Xe, Rn).Type: ApplicationFiled: December 11, 2006Publication date: June 12, 2008Applicant: TOKYO ELECTRON LIMITEDInventor: Vaidyanathan Balasubramaniam
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Publication number: 20080128388Abstract: A method for etching an organic anti-reflective coating (ARC) layer on a substrate in a plasma processing system comprising: introducing a process gas comprising ammonia (NH3), and a passivation gas; forming a plasma from the process gas; and exposing the substrate to the plasma. The process gas can, for example, constitute NH3 and a hydrocarbon gas such as at least one of C2H4, CH4, C2H2, C2H6, C3H4, C3H6, C3H8, C4H6, C4H8, C4H10, C5H8, C5H10, C6H6, C6H10, and C6H12. Additionally, the process chemistry can further comprise the addition of helium. The present invention further presents a method for forming a bilayer mask for etching a thin film on a substrate, wherein the method comprises: forming the thin film on the substrate; forming an ARC layer on the thin film; forming a photoresist pattern on the ARC layer; and transferring the photoresist pattern to the ARC layer with an etch process using a process gas comprising ammonia (NH3), and a passivation gas.Type: ApplicationFiled: January 7, 2008Publication date: June 5, 2008Applicant: TOKYO ELECTRON LIMITEDInventors: Vaidyanathan BALASUBRAMANIAM, Koichiro INAZAWA, Rie INAZAWA, Rich WISE, Arpan P. MAHOROWALA, Siddhartha PANDA
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Patent number: 7344991Abstract: A method for etching an organic anti-reflective coating (ARC) layer on a substrate in a plasma processing system comprising: introducing a process gas comprising ammonia (NH3), and a passivation gas; forming a plasma from the process gas; and exposing the substrate to the plasma. The process gas can, for example, constitute NH3 and a hydrocarbon gas such as at least one of C2H4, CH4, C2H2, C2H6, C3H4, C3H6, C3H8, C4H6, C4H8, C4H10, C5H8, C5H10, C6H6, C6H10, and C6H12. Additionally, the process chemistry can further comprise the addition of helium. The present invention further presents a method for forming a bilayer mask for etching a thin film on a substrate, wherein the method comprises: forming the thin film on the substrate; forming an ARC layer on the thin film; forming a photoresist pattern on the ARC layer; and transferring the photoresist pattern to the ARC layer with an etch process using a process gas comprising ammonia (NH3), and a passivation gas.Type: GrantFiled: August 14, 2003Date of Patent: March 18, 2008Assignee: Tokyo Electron LimitedInventors: Vaidyanathan Balasubramaniam, Koichiro Inazawa, Rich Wise, Arpan Mahorowala, Siddhartha Panda
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Patent number: 7344993Abstract: A method is provided for plasma ashing to remove photoresist remnants and etch residues formed during preceding plasma etching of dielectric layers. The ashing method uses a two-step plasma process involving a hydrogen-containing gas, where low or zero bias is applied to the substrate in the first cleaning step to remove significant amount of photoresist remnants and etch residues from the substrate, in addition to etching and removing detrimental fluorocarbon residues from the chamber surfaces. An increased bias is applied to the substrate in the second cleaning step to remove the remains of the photoresist and etch residues from the substrate. A chamber pressure less than 20 mTorr is utilized in the second cleaning step. The two-step process reduces the memory effect commonly observed in conventional one-step ashing processes. A method of endpoint detection can be used to monitor the ashing process.Type: GrantFiled: January 11, 2005Date of Patent: March 18, 2008Assignee: Tokyo Electron Limited, Inc.Inventors: Vaidyanathan Balasubramaniam, Yasunori Hatamura, Masaaki Hagihara, Eiichi Nishimura, Rie Inazawa, legal representative, Koichiro Inazawa
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Publication number: 20070235424Abstract: A method and system for the dry development of a multi-layer mask is described. A first passivation gas comprises as an incipient ingredient a hydrocarbon gas, while a second passivation gas comprises as an incipient ingredient an oxygen-containing gas.Type: ApplicationFiled: March 29, 2006Publication date: October 11, 2007Inventor: Vaidyanathan Balasubramaniam
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Publication number: 20070231992Abstract: A method of using a post-etch treatment system for removing photoresist and etch residue formed during an etching process is described. For example, the etch residue can include halogen containing material. The post-etch treatment system comprises a vacuum chamber, a radical generation system coupled to the vacuum chamber, a radical gas distribution system coupled to the radical generation system and configured to distribute reactive radicals above a substrate, and a high temperature pedestal coupled to the vacuum chamber and configured to support the substrate. The method comprises introducing a NxOy based process gas to the radical generation system.Type: ApplicationFiled: March 28, 2006Publication date: October 4, 2007Applicant: TOKYO ELECTRON LIMITEDInventor: Vaidyanathan Balasubramaniam
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Patent number: 7169440Abstract: A method is provided for plasma ashing to remove photoresist remnants and etch residues that are formed during preceding plasma etching of dielectric layers. The ashing method uses a two-step plasma process involving an oxygen-containing gas, where low or zero bias is applied to the substrate in the first cleaning step to remove significant amount of photoresist remnants and etch residues from the substrate, in addition to etching and removing detrimental fluoro-carbon residues from the chamber surfaces. An increased bias is applied to the substrate in the second cleaning step to remove the remains of the photoresist and etch residues from the substrate. The two-step process reduces the memory effect commonly observed in conventional one-step ashing processes. A method of endpoint detection can be used to monitor the ashing process.Type: GrantFiled: September 30, 2002Date of Patent: January 30, 2007Assignee: Tokyo Electron LimitedInventors: Vaidyanathan Balasubramaniam, Masaaki Hagiwara, Eiichi Nishimura, Kouichiro Inazawa
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Publication number: 20060154486Abstract: A method is provided for plasma ashing to remove photoresist remnants and etch residues formed during preceding plasma etching of dielectric layers. The ashing method uses a two-step plasma process involving a hydrogen-containing gas, where low or zero bias is applied to the substrate in the first cleaning step to remove significant amount of photoresist remnants and etch residues from the substrate, in addition to etching and removing detrimental fluorocarbon residues from the chamber surfaces. An increased bias is applied to the substrate in the second cleaning step to remove the remains of the photoresist and etch residues from the substrate. A chamber pressure less than 20 mTorr is utilized in the second cleaning step. The two-step process reduces the memory effect commonly observed in conventional one-step ashing processes. A method of endpoint detection can be used to monitor the ashing process.Type: ApplicationFiled: January 11, 2005Publication date: July 13, 2006Applicant: TOKYO ELECTRON LIMITEDInventors: Vaidyanathan Balasubramaniam, Yasunori Hatamura, Masaaki Hagihara, Eiichi Nishimura, Koichiro Inazawa, Rie Inazawa