Patents by Inventor Vaidyanathan Balasubramaniam

Vaidyanathan Balasubramaniam has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060144817
    Abstract: A method is provided for low-pressure plasma ashing to remove photoresist remnants and etch residues that are formed during preceding plasma etching of dielectric layers. The ashing method uses a two-step plasma process involving an oxygen-containing gas, where low or zero bias is applied to the substrate in the first cleaning step to remove significant amount of photoresist remnants and etch residues from the substrate, in addition to etching and removing detrimental fluoro-carbon residues from the chamber surfaces. An increased bias is applied to the substrate in the second cleaning step to remove the remains of the photoresist and etch residues from the substrate. A chamber pressure less than 20 mTorr is utilized in the second cleaning step. The two-step process reduces the memory effect commonly observed in conventional one-step ashing processes. A method of endpoint detection can be used to monitor the ashing process.
    Type: Application
    Filed: December 30, 2004
    Publication date: July 6, 2006
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Vaidyanathan Balasubramaniam, Masaaki Hagihara, Eiichi Nishimura, Koichiro Inazawa, Rie Inazawa
  • Publication number: 20050136666
    Abstract: A method and system for etching an organic layer on a substrate in a plasma processing system comprising: introducing a process gas comprising NxOy, wherein x, y represent integers greater than or equal to unity. Additionally, the process chemistry can further comprise the addition of an inert gas, such as a Noble gas (i.e., He, Ne, Ar, Kr, Xe, Rn). The present invention further presents a method for forming a bilayer mask for etching a thin film on a substrate, wherein the method comprises: forming the thin film on the substrate; forming an organic layer on the thin film; forming a photoresist pattern on the organic layer; and transferring the photoresist pattern to the organic layer with an etch process using a process gas comprising NxOy, wherein x, y represent integers greater than or equal to unity.
    Type: Application
    Filed: February 27, 2004
    Publication date: June 23, 2005
    Applicants: Tokyo Electron Limited, International Business Machines Corporation
    Inventors: Vaidyanathan Balasubramaniam, Koichiro Inazawa, Siddhartha Panda, Rich Wise, Arpan Mahorowala
  • Publication number: 20050136681
    Abstract: A method and system for removing photoresist from a substrate in a plasma processing system comprising: introducing a process gas comprising NxOy, wherein x, y represent integers greater than or equal to unity. Additionally, the process chemistry can further comprise the addition of an inert gas, such as a Noble gas (i.e., He, Ne, Ar, Kr, Xe, Rn). The present invention further presents a method for forming a feature in a thin film on a substrate, wherein the method comprises: forming a dielectric layer on a substrate; forming a photoresist pattern on the dielectric layer; transferring the photoresist pattern to the dielectric layer by etching; and removing the photoresist from the dielectric layer using a process gas comprising NxOy, wherein x and y are integers greater than or equal to unity.
    Type: Application
    Filed: December 23, 2003
    Publication date: June 23, 2005
    Applicant: Tokyo Electron Limited
    Inventors: Vaidyanathan Balasubramaniam, Koichiro Inazawa
  • Patent number: 6849559
    Abstract: A method is provided for plasma ashing to remove photoresist remnants and etch residues that are formed during preceding plasma etching of dielectric layers. The ashing method uses a two-step plasma process involving an hydrogen-containing gas, where low or zero bias is applied to the substrate in the first cleaning step to remove significant amount of photoresist remnants and etch residues from the substrate, in addition to etching and removing detrimental fluoro-carbon residues from the chamber surfaces. An increased bias is applied to the substrate in the second cleaning step to remove the remains of the photoresist and etch residues from the substrate. The two-step process reduces the memory effect commonly observed in conventional one-step ashing processes. A method of endpoint detection can be used to monitor the ashing process.
    Type: Grant
    Filed: September 30, 2002
    Date of Patent: February 1, 2005
    Assignee: Tokyo Electron Limited
    Inventors: Vaidyanathan Balasubramaniam, Yasunori Hatamura, Masaaki Hagiwara, Eiichi Nishimura, Kouichiro Inazawa
  • Publication number: 20040185380
    Abstract: A method for etching an organic anti-reflective coating (ARC) layer on a substrate in a plasma processing system comprising: introducing a process gas comprising nitrogen (N), hydrogen (H), and oxygen (O); forming a plasma from the process gas; and exposing the substrate to the plasma. The process gas can, for example, constitute an NH3/O2, N2/H2/O2, N2/H2/CO, NH3/CO, or NH3/CO/O2 based chemistry. Additionally, the process chemistry can further comprise the addition of helium. The present invention further presents a method for forming a bilayer mask for etching a thin film on a substrate, wherein the method comprises: forming the thin film on the substrate; forming an ARC layer on the thin film; forming a photoresist pattern on the ARC layer; and transferring the photoresist pattern to the ARC layer with an etch process using a process gas comprising nitrogen (N), hydrogen (H), and oxygen (O).
    Type: Application
    Filed: December 17, 2003
    Publication date: September 23, 2004
    Applicant: Tokyo Electron Limited
    Inventors: Yoshiki Igarashi, Koichiro Inazawa, Kimihiro Higuchi, Vaidyanathan Balasubramaniam, Eiichi Nishimura, Ralph Kim, Philip Sansone, Masaaki Hagihara
  • Publication number: 20040180269
    Abstract: A method for etching an organic anti-reflective coating (ARC) layer on a substrate in a plasma processing system comprising: introducing a process gas comprising ammonia (NH3), and a passivation gas; forming a plasma from the process gas; and exposing the substrate to the plasma. The process gas can, for example, constitute NH3 and a hydrocarbon gas such as at least one of C2H4, CH4, C2H2, C2H6, C3H4, C3H6, C3H8, C4H6, C4H8, C4H10, C5H8, C5H10, C6H6, C6H10, and C6H12. Additionally, the process chemistry can further comprise the addition of helium. The present invention further presents a method for forming a bilayer mask for etching a thin film on a substrate, wherein the method comprises: forming the thin film on the substrate; forming an ARC layer on the thin film; forming a photoresist pattern on the ARC layer; and transferring the photoresist pattern to the ARC layer with an etch process using a process gas comprising ammonia (NH3), and a passivation gas.
    Type: Application
    Filed: August 14, 2003
    Publication date: September 16, 2004
    Applicants: Tokyo Electron Limited, International Business Machines Corporation
    Inventors: Vaidyanathan Balasubramaniam, Koichiro Inazawa, Rich Wise, Arpan P. Mahorowala, Siddhartha Panda
  • Patent number: 6670276
    Abstract: A wafer W is placed on a lower electrode 106 provided inside a processing chamber 102 of a plasma processing apparatus 100. A film constituted an organic polysiloxane, which is a Low-K material is formed at the wafer W. Plasma is generated inside the processing chamber 102 to implement an etching process by using a photoresist film on the organic polysiloxane film as a mask and an opening pattern in which a portion of the organic polysiloxane film is exposed is formed. After the etching process, the wafer W is left inside the processing chamber 102. The pressure inside the processing chamber 102 is set at a level within the range of 30 mTorr (4.00 Pa)˜150 mTorr (20.0 Pa) by inducing a processing gas into the processing chamber 102 and evacuating the gas from the processing chamber 102. At the pressure level the set, the gas inside the processing chamber 102 is raised to plasma and the photoresist film is ashed.
    Type: Grant
    Filed: October 19, 2000
    Date of Patent: December 30, 2003
    Assignee: Tokyo Electron Limited
    Inventors: Tomoki Suemasa, Vaidyanathan Balasubramaniam, Koichiro Inazawa
  • Publication number: 20030194876
    Abstract: A method is provided for plasma ashing to remove photoresist remnants and etch residues that are formed during preceding plasma etching of dielectric layers. The ashing method uses a two-step plasma process involving an hydrogen-containing gas, where low or zero bias is applied to the substrate in the first cleaning step to remove significant amount of photoresist remnants and etch residues from the substrate, in addition to etching and removing detrimental fluoro-carbon residues from the chamber surfaces. An increased bias is applied to the substrate in the second cleaning step to remove the remains of the photoresist and etch residues from the substrate. The two-step process reduces the memory effect commonly observed in conventional one-step ashing processes. A method of endpoint detection can be used to monitor the ashing process.
    Type: Application
    Filed: September 30, 2002
    Publication date: October 16, 2003
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Vaidyanathan Balasubramaniam, Yasunori Hatamura, Masaaki Hagiwara, Eiichi Nishimura, Kouichiro Inazawa
  • Publication number: 20030192856
    Abstract: A method is provided for plasma ashing to remove photoresist remnants and etch residues that are formed during preceding plasma etching of dielectric layers. The ashing method uses a two-step plasma process involving an oxygen-containing gas, where low or zero bias is applied to the substrate in the first cleaning step to remove significant amount of photoresist remnants and etch residues from the substrate, in addition to etching and removing detrimental fluorocarbon residues from the chamber surfaces. An increased bias is applied to the substrate in the second cleaning step to remove the remains of the photoresist and etch residues from the substrate. The two-step process reduces the memory effect commonly observed in conventional one-step ashing processes. A method of endpoint detection can be used to monitor the ashing process.
    Type: Application
    Filed: September 30, 2002
    Publication date: October 16, 2003
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Vaidyanathan Balasubramaniam, Masaaki Hagiwara, Eiichi Nishimura, Kouichiro Inazawa